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gerrit-public.fairphone.software / platform / external / valgrind / 48b279bb325f3ef821b1e715ad7915d6d5906d41 / priv
  1. 48b279b gcc-4.3 build fixes. by sewardj · 17 years ago
  2. a384eb9 Implement SALC. Fixes #147628. by sewardj · 17 years ago
  3. 7f45b2b Enable CMPXCHG Gb,Eb. Fixes #147498. by sewardj · 17 years ago
  4. 671da87 Handle the "alternative" (non-binutils) encoding of 'adc' and tidy up by sewardj · 17 years ago
  5. c4356f0 by sewardj · 17 years ago
  6. b4bf588 Accept some apparently redundant REX.W prefixes seen on code in the by sewardj · 17 years ago
  7. 02f79f1 Implement maskmovq and maskmovdq. by sewardj · 17 years ago
  8. 0f50004 Support x86 $int 0x40 .. 0x43 instructions on Linux. Apparently these by sewardj · 17 years ago
  9. b4f6d6b Support td (64-bit counterpart to r1784). by sewardj · 17 years ago
  10. 59c0d8f Better support for trap insns. This adds support for tw (previously twi and by sewardj · 17 years ago
  11. a0e3d42 Add missing return. by sewardj · 17 years ago
  12. be1b6ff by sewardj · 17 years ago
  13. 4d77a9c Merge from CGTUNE branch, code generation improvements for amd64: by sewardj · 17 years ago
  14. eb17e49 Merge from CGTUNE branch: by sewardj · 17 years ago
  15. fb7373a Merge, from CGTUNE branch: by sewardj · 17 years ago
  16. 607ca2d Merge, from CGTUNE branch: by sewardj · 17 years ago
  17. 54477e3 Allow up to 7 prefixes, so as to accept by sewardj · 17 years ago
  18. b707d10 * implement fistp by sewardj · 17 years ago
  19. e29a31d Oops. Fix longstanding bug which will have caused an unnecessary 4M by sewardj · 17 years ago
  20. 90e2e4b Handle x87 FCOMP. by sewardj · 17 years ago
  21. 905edbd Implement lahf/sahf on amd64. Also set NDEP on x86 sahf. Fixes #143907. by sewardj · 17 years ago
  22. 9c3b25a Fix various cases where the instruction decoder asserted/paniced by sewardj · 17 years ago
  23. 8165064 Fold Add8(t,t) ==> t << 1. Fixes #143817 (Unused bitfield pad bits by sewardj · 17 years ago
  24. 6ce1a23 Counterpart to r1745: teach the amd64 back end how to generate 'lea' by sewardj · 17 years ago
  25. 79e04f8 Teach the x86 back end how generate 'lea' instructions, and generate by sewardj · 17 years ago
  26. 7fb65eb x86 back end: use 80-bit loads/stores for floating point spills rather by sewardj · 17 years ago
  27. fd4203c amd64 equivalents of vx1742 (synthesise SIGILL in the normal way for by sewardj · 17 years ago
  28. d51dc81 x86 front end: synthesise SIGILL in the normal way for some obscure by sewardj · 17 years ago
  29. ada80ba Support 'INT $3' instruction on amd64 (counterpart to vx1736). by sewardj · 17 years ago
  30. 5619f79 Tolerate redundant REX.W prefix produced by Mono for 'fsqrt' (a lame kludge). by sewardj · 17 years ago
  31. 34085e3 When generating 64-bit code, ensure that any addresses used in 4 or 8 by sewardj · 17 years ago
  32. 6d83422 Comment-only changes. by sewardj · 17 years ago
  33. d8a6fe8 Handle the (bizarre) no-op "26 2E 64 65 90 %es:%cs:%fs:%gs:nop". This by sewardj · 17 years ago
  34. 322bfa0 Support 'INT $3' instruction. by sewardj · 17 years ago
  35. 1859ecd Handle FCOM and FCOMPP in 64-bit mode (see #141790) by sewardj · 17 years ago
  36. f6c8ebf More IRBB -> IRSB renaming. by sewardj · 18 years ago
  37. 0da5eb8 Fill in missing cases in eqIRConst. This stops iropt's CSE pass from by sewardj · 18 years ago
  38. 0474427 Constant fold XorV128(t,t) -> 0. Effect is that memcheck 'knows' by sewardj · 18 years ago
  39. b5e5c6d Implement rcl{b,w,l,q} on amd64. by sewardj · 18 years ago
  40. 5abcfe6 Implement FXSAVE on amd64. Mysteriously my Athlon64 does not seem to by sewardj · 18 years ago
  41. fc1b541 Add 'missing' primop Iop_ReinterpF32asI32 and code generation support by sewardj · 18 years ago
  42. e744153 Update copyright dates. by sewardj · 18 years ago
  43. 78ec32b Add mkIRExprVec_6/7. by sewardj · 18 years ago
  44. 7784bd2 Tidy up flags spec fn, and add a rule for INCW-CondZ. by sewardj · 18 years ago
  45. c7be3eb Tidy up and finalise x86/amd64 flag spec rules for 3.2.2. by sewardj · 18 years ago
  46. 87f471d Handle recent binutils padding "nopw %cs:0x0(%eax,%eax,1)" by sewardj · 18 years ago
  47. 923c65b Enable support for altivec prefetches: dss, dst, dstt, dstst, dststt. by sewardj · 18 years ago
  48. d2fd864 Enable lvxl and stvxl. by sewardj · 18 years ago
  49. abb321c Implement mfspr 268 and 269. Fixes #139050. by sewardj · 18 years ago
  50. d71ba83 x86 front end: Implement MASKMOVQ (MMX class insn, introduced in SSE1) by sewardj · 18 years ago
  51. dd40fdf by sewardj · 18 years ago
  52. c3bc60a Change a stupid algorithm that deals with real register live by sewardj · 18 years ago
  53. b235e5b Add a couple of %rflags spec rules which improve performance of amd64 by sewardj · 18 years ago
  54. 6f2f283 New function dopyIRBBExceptStmts which makes it a bit easier to write tools. by sewardj · 18 years ago
  55. 174c770 Specialise computation of carry flag after ADDL. by sewardj · 18 years ago
  56. 8a81970 Even more flag-spec rules: SUBL-CondNL, SUBL-CondNBE, SUBL-NB and redo by sewardj · 18 years ago
  57. 1ee3e18 A couple more x86 spec rules: COPY-CondNZ and SUBL-CondNS. by sewardj · 18 years ago
  58. c429324 On amd64, allow the register allocator to use %r10 which it previously by sewardj · 18 years ago
  59. 2890582 Handle long-form encoding of 'push{l,w} %reg'. by sewardj · 18 years ago
  60. dc5d084 Handle JCXZ. by sewardj · 18 years ago
  61. 47c2d4d Handle 'ret imm16'. Fixes #136650. by sewardj · 18 years ago
  62. c45aa52 Add an %eflags rule for COPY-CondP. by sewardj · 18 years ago
  63. cea9662 Re-enable 'repne movs' (fix for original bug in #126147). by sewardj · 18 years ago
  64. b69a6fa Re-enable 'repne stos' (fix for Gernot Tenchio's part of #126147). by sewardj · 18 years ago
  65. 048de4d Implement 'xlat' (fixes #125959 and #135012). by sewardj · 18 years ago
  66. ef4433b When doing rlwinm in 64-bit mode, bind the intermediate 32-bit result by sewardj · 18 years ago
  67. ee4a859 ppc64: detect rldicl/rldicr which are simply 64-bit shifts left/right by sewardj · 18 years ago
  68. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  69. 496b88f Reinstate support for 'mcrfs'. by sewardj · 18 years ago
  70. 2eb9ffa Another day, another %eflags reduction rule. by sewardj · 18 years ago
  71. 9e234f6 Support pextrw when the destination register is 64 bits too. Fixes #133678. by sewardj · 18 years ago
  72. f4c803b Add support for amd64 'fprem' (fixes bug 132918). This isn't exactly by sewardj · 18 years ago
  73. b2da8ec 64-bit counterpart to v1652 (Stop mkU16 asserting if d32 is a negative by sewardj · 18 years ago
  74. c4255a0 Stop mkU16 asserting if d32 is a negative 16-bit number (bug #132813). by sewardj · 18 years ago
  75. 32d615b More reduction rules, which further reduce memcheck's false error by sewardj · 18 years ago
  76. 9195aa1 Fix previous commit (r1640?) so that it's actually correct :-) by sewardj · 18 years ago
  77. a9cb67b Comparing a reg with itself produces a result which doesn't depend on by sewardj · 18 years ago
  78. d0aa0a5 Implement amd64 insns cmpxchg8b and cmpxchg16b. Fixes #127521. by sewardj · 18 years ago
  79. 6140822 Generate less verbose IR for amd64 'bswapq'. Fixes #132146. by sewardj · 18 years ago
  80. f355f6b amd64 insn printing fix. by sewardj · 18 years ago
  81. fcf21f3 64-bit equivalent to r1635: handle all SSE3 instructions except by sewardj · 18 years ago
  82. dd5d204 Handle all SSE3 instructions except monitor and mwait. 64-bit by sewardj · 18 years ago
  83. ec387ca Handle nop-with-an-amode (sheesh. Mutancy. whatever next?) for x86 and by sewardj · 18 years ago
  84. 11faabe Allow a redundant REX prefix for pushfq. Fixes #130785. by sewardj · 18 years ago
  85. 59e96c1 Implement SSE2 'psadbw'. Fixes #128917. by sewardj · 18 years ago
  86. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  87. 3be608d Specialisation rule which reduces memcheck false error rate for by sewardj · 18 years ago
  88. c5fd972 Comment-only change. by sewardj · 18 years ago
  89. b83767e Yet another %eflags folding rule - this one for performance reasons. by sewardj · 18 years ago
  90. cd90bfe ppc backend: handle vector constant of zero. by cerion · 18 years ago
  91. 6204590 Get rid of assertion getting in the way of handling 'sbbb G,E' where E by sewardj · 18 years ago
  92. 5328b10 Got a sudden attach of the implicit-type-casting paranoias whilst by sewardj · 18 years ago
  93. 346d9a1 A couple of IR simplification hacks for the amd64 front end, so as to by sewardj · 18 years ago
  94. 9088540 Clear up yet another gcc-4.1.0 stunt leading to false uninitialised by sewardj · 18 years ago
  95. 275ccdf A few more x86 eflags-helper rewrite cases, which further reduce the by sewardj · 18 years ago
  96. 89d89e9 Add an IR folding rule to convert Add32(x,x) into Shl32(x,1). This by sewardj · 18 years ago
  97. 54be8dd Add specialisation rules to simplify the IR for 'testl .. ; js ..', by sewardj · 18 years ago
  98. 1287ab4 Enable 'SHLDv imm8,Gv,Ev'. Fixes #126583. by sewardj · 18 years ago
  99. 5fadaf9 Enable 'sbb $imm,%al'. Fixes #126668. by sewardj · 18 years ago
  100. 3180446 Implement CLC/STC/CMC. Fixes #125651. by sewardj · 18 years ago