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gerrit-public.fairphone.software / platform / external / valgrind / 752f90673ebbb6b2f55fc5e46606dea371313713
  1. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  2. 2febc60 (re-commit r1976): Added new SSE4.1 instruction: PMAXUD by sewardj · 14 years ago
  3. e53a5e0 (re-commit r1975): Added new SSE4.1 instruction: PINSRQ by sewardj · 14 years ago
  4. 38523e9 (re-commit r1974): Fix up printing for some of the SSE4.1 insns. by sewardj · 14 years ago
  5. e76895d (re-commit r1973): by sewardj · 14 years ago
  6. 4342831 (re-commit r1972): Fixed copy+paste error in R1971 by sewardj · 14 years ago
  7. 733d589 (re-commit r1971) Added new SSE4 instructions PMINSD, PMAXSD. by sewardj · 14 years ago
  8. a1c1d9a (re-commit r1970): Tested BLENDPS Added new SSE4 instructions DPPD and DPPS by sewardj · 14 years ago
  9. d403e79 iselVecExpr_wrk: 128-bit constants: handle all 16 cases by de · 14 years ago
  10. b5afdbd Added new SSE4 instruction BLENDPS (backend needs a fix before testing) by de · 14 years ago
  11. 7cfc306 Enable PMOVSXBW and fix lane shift widths. by sewardj · 14 years ago
  12. 9ba870d Handle a few more cases in 128-bit constant generation, needed by by sewardj · 14 years ago
  13. 5a70f5c by de · 14 years ago
  14. 04ac5de Support FTOUIS, UXTAB, SXTAH. by sewardj · 15 years ago
  15. f7d3b2e Handle SBB Eb,Gb. by sewardj · 15 years ago
  16. 4df975f Fix incorrect spec rule for LE after INCB, for end-of range cases (arg = 0x7F). by sewardj · 15 years ago
  17. 30a20e9 CVTPI2PD (which converts 2 x I32 in M64 or MMX to 2 x F64 in XMM): by sewardj · 15 years ago
  18. 9581906 Majorly improved implementation of self-checking for translations. by sewardj · 15 years ago
  19. 0d925b1 x86/amd64 front ends: don't chase a conditional branch that leads by sewardj · 15 years ago
  20. 82f5688 Enable (optionally) chasing through conditional branches during trace by sewardj · 15 years ago
  21. 984d9b1 by sewardj · 15 years ago
  22. ff6b34a amd64: add a couple more spec cases: NLE after SUBL, and NZ after LOGICB. by sewardj · 15 years ago
  23. ef425db For 32-bit reads of integer guest registers, generate a 64-bit Get by sewardj · 15 years ago
  24. 80bea7b * support PLD (cache-preload-hint) instructions by sewardj · 15 years ago
  25. abb429b Don't force alignment for LDMxx/STMxx when presented with a misaligned by sewardj · 15 years ago
  26. 2a0cc85 gen{Spill,Reload}_PPC: track recent change in genSpill/Reload signature. by sewardj · 15 years ago
  27. 445dbef Generate a couple more ARM specific offsets; also R1 on ppc32/64. by sewardj · 15 years ago
  28. 2a1ed8e Make the x86 and amd64 back ends use the revised prototypes for by sewardj · 15 years ago
  29. 6c299f3 Merge r1925:1948 from branches/ARM. This temporarily breaks all other by sewardj · 15 years ago
  30. 8688a72 Testing hacklet, to fill the vex tmp allocation area before each by sewardj · 15 years ago
  31. e768e92 by sewardj · 15 years ago
  32. 95e154c Use a shorter instruction encoding for "mov $smallish positive int, %reg". by sewardj · 15 years ago
  33. 3b09235 Specialise "S after 32-bit SUB/CMP"; improves performance by about 2% by sewardj · 15 years ago
  34. 32bf791 Track recent file renaming. by sewardj · 15 years ago
  35. 36af94c Update ("cand1" committed for real use in immediately preceding r1918). by sewardj · 15 years ago
  36. 5eaf82b Use a much faster hash function to do the self-modifying-code checks. by sewardj · 15 years ago
  37. 1485935 Add test program for experimentation with smc-check hashing schemes by sewardj · 15 years ago
  38. 01f8cce Print raw machine code in an easier-to-parse way. by sewardj · 15 years ago
  39. 37b2ee8 Implement mfpvr (mfspr 287) (bug #201585). by sewardj · 15 years ago
  40. 9e341ca Tell the register allocator on x86 that xmm0..7 are trashed across by sewardj · 15 years ago
  41. 0f99be6 Support LODS on amd64. Fixes #189737. by sewardj · 15 years ago
  42. 05a2c38 deepCopyIRCAS: handle NULL dataHi and expdHi without segfaulting. by sewardj · 15 years ago
  43. 3187dc7 Get rid of LibVEX_Version(). by sewardj · 15 years ago
  44. 40d1d21 Fix disassembly printing of cmpxchg insns (don't print "lock" twice). by sewardj · 15 years ago
  45. 1fb8c92 Add new integer comparison primitives Iop_CasCmp{EQ,NE}{8,16,32,64}, by sewardj · 15 years ago
  46. 9c2f13d Fix ppc64 guest layout description following recent DCAS hackery. by sewardj · 15 years ago
  47. ff99b07 Unbreak the svn-version thing following r1904. by sewardj · 15 years ago
  48. cef7d3e by sewardj · 15 years ago
  49. d652012 Double the size of the spill area. Fixes #195838. by sewardj · 15 years ago
  50. c984765 Rename 'Makefile' to 'Makefile-gcc' so as to be compatible with recent by sewardj · 15 years ago
  51. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  52. 16a5960 Use more POSIX-standard flags for 'ar'. See #195287. by sewardj · 15 years ago
  53. 90472eb Make VexGuestAMD64State have a 16-aligned size once again, following r1886. by sewardj · 16 years ago
  54. f30883e Calculate next %rip correctly in palignr instructions (mmx and xmm-class). by sewardj · 16 years ago
  55. e86310f In order to make it possible for Valgrind to restart client syscalls by sewardj · 16 years ago
  56. 4771230 Change underscores in the middle of library names into dashes. by sewardj · 16 years ago
  57. 2306332 Handle redundant REX.W on PUNPCKHgg. Fixes test case dated 2009-01-22 by sewardj · 16 years ago
  58. ceccb29 Handle both %gs and %fs prefixes on amd64 a bit more "properly". by sewardj · 16 years ago
  59. d2dc14a genoffsets.c: don't use __builtin_offset since older gcc's don't by sewardj · 16 years ago
  60. ba69ffb Change the way pub/libvex_guest_offsets.h is created, so that it is by sewardj · 16 years ago
  61. 7bdd1bc Handle some redundant REX.W prefixes on code from IPP (Intel by sewardj · 16 years ago
  62. 2e28ac4 by sewardj · 16 years ago
  63. d660d41 Initial VEX-end support for Darwin (x86 and amd64). by sewardj · 16 years ago
  64. b7ba04f Handle "movsd G,E" for G and E both regs. This is the non-binutils by sewardj · 16 years ago
  65. 7d8f137 Support "repe scas" on amd64. Fixes #168943. by sewardj · 16 years ago
  66. 1685c28 Tighten up decoding of isel instruction. by sewardj · 16 years ago
  67. cb07be2 Support isel (integer conditional move). by sewardj · 16 years ago
  68. e5e837c Handle MOVSD reg,reg for the encoding which is not emitted by binutils. by sewardj · 16 years ago
  69. ecbaee7 Fixes for compilation warnings from the apparently very strict by sewardj · 16 years ago
  70. 792d771 In 32-bit mode only, accept primary opcode 0x82 and treat it the same by sewardj · 16 years ago
  71. 72cd337 Stop gcc-4.4.0 (snapshot) complaining about strict-aliasing violations. by sewardj · 16 years ago
  72. 4970e4e Support FPREM1 on amd64. Fixes #172563. by sewardj · 16 years ago
  73. a203330 Add a description of the FP offset/size to type VexGuestLayout. by sewardj · 16 years ago
  74. 2b8db3e C89 fixes (stop gcc complaining). by sewardj · 16 years ago
  75. 0f1ef86 Handle frin, frim, frip, friz, in 64-bit mode only, for now. by sewardj · 16 years ago
  76. fe397a2 Ignore .EH bit in lwarx / ldarx as it appears to be merely a hint. by sewardj · 16 years ago
  77. c07349e Add support needed for exp-ptrcheck on ppc32/64. by sewardj · 16 years ago
  78. 7950111 Handle Iop_ReinterpF32asI32, as needed for exp-ptrcheck. by sewardj · 16 years ago
  79. 228c7c8 Minor printing changes. by sewardj · 16 years ago
  80. 019f406 Add Imbe_SnoopedStoreBegin and Imbe_SnoopedStoreEnd, to be used for by sewardj · 16 years ago
  81. 1d2e77f Translate "fnstsw %ax" in a slightly different way, which plays better by sewardj · 16 years ago
  82. 7342b1b In some obscure circumstances, the allocator would incorrectly omit a by sewardj · 16 years ago
  83. c85bf02 Allow 64-byte line sizes (PA6T cpu). by sewardj · 16 years ago
  84. 80d6e6d Fix a couple of longstanding enum inconsistencies discovered by by sewardj · 16 years ago
  85. 0d923d7 Support 8 bit xadd. Fixes #158744. by sewardj · 16 years ago
  86. 068baa2 Compute the starting address of the instruction correctly. This has by sewardj · 16 years ago
  87. d86b6bb Update to check fxrstor too. by sewardj · 16 years ago
  88. 3800e2d Handle fxrstor on x86. Fixes #126389. by sewardj · 16 years ago
  89. dd9095e Allow pushfw and popfw. Fixes #157748. by sewardj · 16 years ago
  90. 842dfb4 Enable repne cmps{b,w,l}. Fixes #153196. by sewardj · 16 years ago
  91. beb5291 Specialise CondNZ after SUBW for both x86 and amd64. by sewardj · 16 years ago
  92. 478646f Merge branches/OTRACK_BY_INSTRUMENTATION into the trunk. This by sewardj · 16 years ago
  93. e7f277a Enable FUCOMPP on amd64. Fixes #161378. by sewardj · 16 years ago
  94. cd538b4 Specialise CondNS after SUBB on amd64. by sewardj · 16 years ago
  95. 9a3431c Specialise CondNS after SUBB. The lack of this was causing Memcheck to by sewardj · 17 years ago
  96. 2e025e8 Show x86 sreg offsets. by sewardj · 17 years ago
  97. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 17 years ago
  98. 32bfd3e Fix CPUID: by sewardj · 17 years ago
  99. 150c9cd by sewardj · 17 years ago
  100. d166e28 by sewardj · 17 years ago