1. a8415ff Fix various compilation warnings emitted by icc, mostly to do with by sewardj · 20 years ago
  2. 37a47aa Bring this up to date. by sewardj · 20 years ago
  3. b3a0429 First pass at doing amd64 address mode decoding. by sewardj · 20 years ago
  4. ecb9489 Lots of grunge for dealing with amd64 integer registers. by sewardj · 20 years ago
  5. 44d494d Add stub definitions for amd64 front end functions. by sewardj · 20 years ago
  6. d20c885 Add a dummy AMD64 front end, as a completely commented-out version of by sewardj · 20 years ago
  7. 65526c2 Fix comment. by sewardj · 20 years ago
  8. a24827f Program for making bootstrap .orig files from 'as -a' output. by sewardj · 20 years ago
  9. 11b3059 Put a ret (0xC3) after each insn, to keep the decoder happy. by sewardj · 20 years ago
  10. a4675cd A bunch of insns to get the amd64 front end hackery started. by sewardj · 20 years ago
  11. 78b150d New directory, for messing with the amd64 front end. by sewardj · 20 years ago
  12. e664ec4 Basic Block Profiler Roolz OK ! by sewardj · 20 years ago
  13. 07f284e Fix performance hole exposed by profiling gzip. by sewardj · 20 years ago
  14. 8d4d223 Reinstate "cmps" (without rep). gzip seems to require it. by sewardj · 20 years ago
  15. 4afab82 First fruits from using new bb profiler: improve handling of guest x86 by sewardj · 20 years ago
  16. 72c7281 Proper support for translation cache management: when a translation is by sewardj · 20 years ago
  17. 1526967 fixed shift_immed & branch by cerion · 20 years ago
  18. d887b86 Rename some functions and types in the top level interface to be more by sewardj · 20 years ago
  19. a245f90 Also test 64-bit add/sub insns (paddq/psubq), although these only by sewardj · 20 years ago
  20. d3f9de7 Instruction selection/emission for Add64 and Sub64. by sewardj · 20 years ago
  21. 1806918 Add new IR primops: Iop_CmpNEZ8x8, Iop_CmpNEZ16x4, Iop_CmpNEZ32x2 and by sewardj · 20 years ago
  22. 6915b97 Fix typos in comment. by sewardj · 20 years ago
  23. 812a858 Comment-only change: record code generation conventions and limitations for x86. by sewardj · 20 years ago
  24. 38a3f86 On x86 host and guest, re-implement the way MMX instructions are done, by sewardj · 20 years ago
  25. a336776 Add some starting-off material for PPC32. by sewardj · 20 years ago
  26. 5c71020 Rename ... by sewardj · 20 years ago
  27. 4fa3037 For holding 32-bit PPC originals. by sewardj · 20 years ago
  28. b5d1be1 This is no longer useful. by sewardj · 20 years ago
  29. c02043c Handle another PSLLDQ sub-case. by sewardj · 20 years ago
  30. 0c9907c Partial implementation of pslldq (SSE2). by sewardj · 20 years ago
  31. 9c32376 x86 floating point accuracy improvements. The aim is to make x86 FP by sewardj · 20 years ago
  32. b07d878 Program to check values of x87 constants. by sewardj · 20 years ago
  33. b941be6 Program for investigating FP rounding error effects. by sewardj · 20 years ago
  34. 55860d8 Observe the memory fencing properties of CPUID. by sewardj · 20 years ago
  35. 33dd31b Fix printing of various instructions when disassembling. by sewardj · 20 years ago
  36. bb3f52d Fix some minor things to do with memory fences and the Elan3 drivers. by sewardj · 20 years ago
  37. aade6d4 SSE2 fixes for mfence-ing. by sewardj · 20 years ago
  38. ce4a282 Machinery for investigation of LOCK prefixes. by sewardj · 20 years ago
  39. 3e83893 Add a trivial new IR construction: a memory fence statement. Connect by sewardj · 20 years ago
  40. 211465d Make it a more effective test. by sewardj · 20 years ago
  41. a741c5d Darn; fix stupid copy-n-paste bug introduced in previous fsave/frstor by sewardj · 20 years ago
  42. a0e83b0 * x86 guest: fix bug in stmxcsr -- rounding mode field set wrongly by sewardj · 20 years ago
  43. bbe85d0 Improve these test programs. by sewardj · 20 years ago
  44. 0bb9285 Test program for x86 fxsave insn. by sewardj · 20 years ago
  45. eecde93 Add crude 'minidist' target (not yet entirely satisfactory). by sewardj · 20 years ago
  46. 7dd2eb2 Remove old CPUID stuff that wasn't being used. by sewardj · 20 years ago
  47. 9df271d Push subarchitecture stuff through the x86 parts. by sewardj · 20 years ago
  48. 8fa4208 C89 police (make buildable with gcc-2.96) by sewardj · 20 years ago
  49. b5d0f3d No longer try to build the attached Valgrind snapshots. by sewardj · 20 years ago
  50. 69f9e3e Update the memcheck instrumenter embedded herein. by sewardj · 20 years ago
  51. ad572dd Rename some variables and types, to make it easier to read. No by sewardj · 20 years ago
  52. 17bbc21 Remove register preferencing mechanism; does not seem to help. by sewardj · 20 years ago
  53. b923075 In iropt, try and call flatten_BB less. Enhance the sanity checker by sewardj · 20 years ago
  54. b5749b0 Fix nonsensical assertion. by sewardj · 20 years ago
  55. c3263ee Oops. Track arch/subarch changes. by sewardj · 20 years ago
  56. 9843029 Sanity check re support for precise exceptions, resulting in more by sewardj · 20 years ago
  57. 0821053 Looks like major changes, but in fact are just rearrangements and by sewardj · 20 years ago
  58. bef170b Add support for subarchitectures. Currently ignored. by sewardj · 20 years ago
  59. 3835288 Duh. Un-break specialisation of x86 guest helper functions. Duh. by sewardj · 20 years ago
  60. 41c3d4a iselCondCode: better handling of a pattern frequently generated by memcheck. by sewardj · 20 years ago
  61. 1fec164 Fix autoversioning a bit more. by sewardj · 20 years ago
  62. 80f5fce New function LibVEX_Version, returning version string automagically by sewardj · 20 years ago
  63. 69933ac Move the IR tree matcher into its own module to get rid of duplication. by sewardj · 20 years ago
  64. cee3031 Skeleton work on host-arm/isel, plus some cleaning up of hdefs by cerion · 20 years ago
  65. cb2c99d Don't squawk about kludged RDTSC, and update list of limitations. by sewardj · 20 years ago
  66. 82edbb3 Cleaned up hdefs.h, fleshed out hdefs.c by cerion · 20 years ago
  67. 1df8311 ahem - copy/paste comment error by cerion · 20 years ago
  68. 0578287 First stab at host arm instruction defs by cerion · 20 years ago
  69. dcd6c88 constant folder: try a bit harder to clean up memcheck's output by sewardj · 20 years ago
  70. 4ea793f Special case for CmpNE64(x,0), which is frequently generated when by sewardj · 20 years ago
  71. 28e5c83 More needles in haystacks: pmovmskb (sse): pass args to helper in the by sewardj · 20 years ago
  72. f9c74fe Don't inadvertantly invert the D flag when doing pushfl. Real needle by sewardj · 20 years ago
  73. bbdc622 Implement pusha/popa. by sewardj · 20 years ago
  74. 95535fe More SSE2 cases needed for gsl-1.5 regtests with icc -O -xW (SSE2). by sewardj · 20 years ago
  75. 397f9e5 Added DIP()s everywhere, removed all the vex_printf()s by cerion · 20 years ago
  76. 09f4155 x86 guest: implement SSE1 movaps G -> E (stores) by sewardj · 20 years ago
  77. fa89fdc #if 0 some unused fns in an attempt to reduce the noise level from gcc. by sewardj · 20 years ago
  78. 5edfc26 Give different emulation warnings for setting of %mxcsr.fz and %mxcsr.daz. by sewardj · 20 years ago
  79. 519d66f Fixes to get gsl-1.5 regressions to work with icc-8.0 -xK (SSE1) by sewardj · 20 years ago
  80. dee0867 fixed oldFlagC usage by cerion · 20 years ago
  81. b64821b Fix push/pop/load/store of segment registers. by sewardj · 20 years ago
  82. 9ee8286 * x86 host: make SSE spills/restores work by sewardj · 20 years ago
  83. c819ec1 Improve redundant-PutI elimination a bit, so it is not completely by sewardj · 20 years ago
  84. 1d8ce20 Even more folding rules. by sewardj · 20 years ago
  85. 52444cb Mechanism for dealing with failures of instruction decodes, and also by sewardj · 20 years ago
  86. 3bd6f3e x86 guest: simulate LDT/GDT enough that code using segment override by sewardj · 20 years ago
  87. 3701059 Folding rule for Iop_64to32. by sewardj · 20 years ago
  88. 2e38386 x86 guest/host: fix enough 128-bit vector stuff that memcheck works for by sewardj · 20 years ago
  89. 109ffdb x86 host: Stuff in support of memchecking of 64x2 vector FP. by sewardj · 20 years ago
  90. a0037df Stuff needed for Memcheck of SSE1 instructions. by sewardj · 20 years ago
  91. 060c542 Dealt with more 'unpredictables' (all of them?) by cerion · 20 years ago
  92. 70f676d More support for memchecking 128-bit SIMD code. by sewardj · 20 years ago
  93. a512a65 Dealt with undefined instr's properly by cerion · 20 years ago
  94. ce57cd2 added padding to VexGuestArmState by cerion · 20 years ago
  95. 19e8a61 Finished dis_branch, so we get IR code for a complete bb now - yay! by cerion · 20 years ago
  96. 9e20359 Finish almost all SSE2 integer instructions. (!) by sewardj · 20 years ago
  97. b9fa69b x86 host/guest: SSE2 integer shifts and subtracts by sewardj · 20 years ago
  98. f7da63d by cerion · 20 years ago
  99. e5854d6 x86 guest/host: implement a whole bunch of SSE2 integer insns by sewardj · 20 years ago
  100. 164f927 IR level for support of 128 integer SIMD operations. Use this to do by sewardj · 20 years ago