- aedb859 guest_amd64_spechelper: fill in a number of missing cases for by sewardj · 10 years ago
- 8462d11 Constification part 4. by florian · 10 years ago
- 28d71ed Change how FXSAVE and FXRSTOR are done, so as to avoid pushing the XMM by sewardj · 10 years ago
- 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
- 89ae847 Update copyright dates (20XY-2012 ==> 20XY-2013) by sewardj · 11 years ago
- cc3d219 AMD64: Add support for AVX2, BMI1, BMI2 and FMA instructions (VEX side). by sewardj · 11 years ago
- 818c730 Implement RDTSCP on amd64, finally. This fixes #251569 and dups by sewardj · 11 years ago
- 442e51a Make diagnostics for SIGILL more controllable (VEX part). by sewardj · 12 years ago
- e13074c Improve accuracy of definedness tracking through the x86 PMOVMSKB and by sewardj · 12 years ago
- 1ff4756 Constify VEX's external interface. by florian · 12 years ago
- 58a637b Make header files compilable by itself to get two benefits: by florian · 12 years ago
- 6ef84be Followup to r2483, purely mechanical. Rename: by florian · 12 years ago
- 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
- 1407a36 by sewardj · 12 years ago
- fe0c5e7 Add a CPUID emulation which announces AVX support, but don't enable it yet. by sewardj · 12 years ago
- c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 12 years ago
- 4d5bce2 Implementation of SSE 4.1 MPSADBW instruction. Fixes #294048. by sewardj · 12 years ago
- 8cb931e Implement PHMINPOSUW (SSE 4.1). Fixes #287301. by sewardj · 12 years ago
- 9ae42a7 Adds 16 and 32 bit fnsave/frstor, and 0x66 prefix on fldl, to guest amd64. by sewardj · 12 years ago
- ff4d6be * fix Bug 290655 - Add support for AESKEYGENASSIST instruction by philippe · 12 years ago
- e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
- 5556e5e Implement rex.W/FXSAVE and also both variants of FXRSTOR. by sewardj · 14 years ago
- 186f869 Add support for SSE4.2 CRC32{B,W,L,Q}. Fixes #261966. by sewardj · 14 years ago
- 1a179b5 Support PCLMULDQ (Emmanuel Thomé, Emmanuel.Thome@gmail.com). Fixes #251251. by sewardj · 14 years ago
- be91791 Merge from branches/THUMB: A spechelper interface change that allows by sewardj · 14 years ago
- acfbd7d Add a moderately comprehensive implementation of the SSE4.2 string by sewardj · 14 years ago
- 0b2d3fe Add partial support for the SSE 4.2 PCMPISTRI instruction, at least by sewardj · 14 years ago
- b9dc243 Implement SIDT and SGDT as pass-throughs to the host. It's a pretty by sewardj · 14 years ago
- 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
- 984d9b1 by sewardj · 15 years ago
- cef7d3e by sewardj · 15 years ago[Renamed (97%) from priv/guest-amd64/gdefs.h]
- e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
- a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 16 years ago
- bb4396c Support in{b,w,l} and out{b,w,l} on amd64. Fixes #152357. by sewardj · 17 years ago
- b5e5c6d Implement rcl{b,w,l,q} on amd64. by sewardj · 18 years ago
- 5abcfe6 Implement FXSAVE on amd64. Mysteriously my Athlon64 does not seem to by sewardj · 18 years ago
- e744153 Update copyright dates. by sewardj · 18 years ago
- dd40fdf by sewardj · 18 years ago
- aca070a Merge r1663-r1666: by sewardj · 18 years ago
- a33e9a4 Update copyright dates. by sewardj · 18 years ago
- 5328b10 Got a sudden attach of the implicit-type-casting paranoias whilst by sewardj · 18 years ago
- a5f55da Don't use the bits VexArchInfo.hwcaps to distinguish ppc32 and ppc64, by sewardj · 18 years ago
- c716aea Two different sets of changes (hard to disentangle): by sewardj · 19 years ago
- 0585a03 Implement FINIT. by sewardj · 19 years ago
- 8707fef Rename a couple of inconsistently-named helper functions. by sewardj · 19 years ago
- bc6af53 Implement RDTSC (amd64). by sewardj · 19 years ago
- 7bd6ffe by sewardj · 19 years ago
- dbcfae7 by sewardj · 19 years ago
- 4f9847d Implement a couple of missing x87 insns. by sewardj · 19 years ago
- 112b099 An appallingly inefficient, but correct, implementation of rcr. On by sewardj · 19 years ago
- 9e6491a The logic that drove basic block to IR disassembly had been duplicated by sewardj · 19 years ago
- 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
- 4017a3b Implement fldenv/fstenv on amd64. by sewardj · 19 years ago
- a7ba8c4 First pass through SSE1 instructions. by sewardj · 19 years ago
- 5e20537 Even more x87 instructions. by sewardj · 19 years ago
- 25a8581 Make a whole bunch more x87 instructions work on amd64. by sewardj · 19 years ago
- bcbb9de Implement ldmxcsr/stmxcsr. by sewardj · 19 years ago
- 924215b amd64 front/back end stuff needed to support x87 extended-real loads/stores. by sewardj · 19 years ago
- d0a12df Fill in many amd64 front end and back end cases. by sewardj · 19 years ago
- 5827784 More typechecker police. Hopefully this doesn't break anything. by sewardj · 19 years ago
- 32b2bbe Do more insns: inc idiv imul by sewardj · 19 years ago
- df0e002 Mucho baseline hacking to get amd64 front end to work. No luck so far :-) by sewardj · 20 years ago
- 44d494d Add stub definitions for amd64 front end functions. by sewardj · 20 years ago
- d20c885 Add a dummy AMD64 front end, as a completely commented-out version of by sewardj · 20 years ago