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gerrit-public.fairphone.software / platform / external / valgrind / ad00ea9f40f930d98bb2d278291a6c4c6636d6d6 / priv / host_ppc_defs.h
  1. d8c64e0 Constification part 5. by florian · 10 years ago
  2. 99de41e This commit just makes white space changes to the three files in commit by carll · 10 years ago
  3. 9877fe5 msg by carll · 10 years ago
  4. 8462d11 Constification part 4. by florian · 10 years ago
  5. 7d6f81d Constification part 2. by florian · 10 years ago
  6. 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
  7. 89ae847 Update copyright dates (20XY-2012 ==> 20XY-2013) by sewardj · 11 years ago
  8. 60c6bac This commit adds support for the following instructions: by carll · 11 years ago
  9. 7deaf95 Power 8 support, phase 5 by carll · 11 years ago
  10. 48ae46b Phase 3 support for IBM Power ISA 2.07 by carll · 11 years ago
  11. 0c74bb5 Initial ISA 2.07 support for POWER8-tuned libc by carll · 11 years ago
  12. cea07cc Fix implementation of the DFP integer operands. by carll · 12 years ago
  13. cfe046e Merge, from branches/COMEM, revisions 2568 to 2641. by sewardj · 12 years ago
  14. 55085f8 Changes for -Wwrite-strings by florian · 12 years ago
  15. 58a637b Make header files compilable by itself to get two benefits: by florian · 12 years ago
  16. 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
  17. a7b0d10 Fix a few issues as reported by the BEAM tool. by florian · 12 years ago
  18. cdc376d POWER Processor decimal floating point instruction support, part 3 by sewardj · 12 years ago
  19. db01409 Merge branches/TCHAIN from r2271 (its creation point) into trunk. by sewardj · 12 years ago
  20. 3dee849 Add translation chaining support for ppc32 (tested) and to by sewardj · 12 years ago
  21. 26217b0 by sewardj · 12 years ago
  22. c6bbd47 Initial support for POWER Processor decimal floating point instruction by sewardj · 12 years ago
  23. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  24. 4aa412a Add support for IBM Power ISA 2.06 -- stage 2. Bug 276784. by sewardj · 13 years ago
  25. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  26. 7d810d7 Handle Iop_I64UtoF32 in the ppc32/ppc64 insn selector. Fixes #270851. by sewardj · 13 years ago
  27. 7e30807 Tighten up condition code handling in the back end, so as to placate by sewardj · 13 years ago
  28. e522d4b Fix up enum confusion between PPCAvOp and PPCAvFpOp, as found by by sewardj · 13 years ago
  29. 66d5ef2 Add support for IBM Power ISA 2.06 -- stage 1. Bug #267630 and by sewardj · 13 years ago
  30. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  31. 2a0cc85 gen{Spill,Reload}_PPC: track recent change in genSpill/Reload signature. by sewardj · 15 years ago
  32. cef7d3e by sewardj · 15 years ago[Renamed (98%) from priv/host-ppc/hdefs.h]
  33. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  34. 0f1ef86 Handle frin, frim, frip, friz, in 64-bit mode only, for now. by sewardj · 16 years ago
  35. 478646f Merge branches/OTRACK_BY_INSTRUMENTATION into the trunk. This by sewardj · 16 years ago
  36. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 16 years ago
  37. e744153 Update copyright dates. by sewardj · 18 years ago
  38. dd40fdf by sewardj · 18 years ago
  39. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  40. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  41. 8f07359 Counterpart to r1605: in the ppc insn selector, don't use the bits by sewardj · 18 years ago
  42. 40c8026 Redo the way FP multiply-accumulate insns are done on ppc32/64. by sewardj · 18 years ago
  43. b183b85 by sewardj · 18 years ago
  44. baf971a Handle ppc32/64 fres, frsqrte. by sewardj · 18 years ago
  45. 7fd5bb0 A bit more backend tidying: by sewardj · 19 years ago
  46. 92923de by sewardj · 19 years ago
  47. d0eae2d renamed VEX dirs guest-ppc32/ -> guest-ppc/, host-ppc32/ -> host-ppc/ by cerion · 19 years ago[Renamed (99%) from priv/host-ppc32/hdefs.h]
  48. 5b2325f Changed naming convention from 'PPC32' to 'PPC' for all VEX code common to both PPC32 and PPC64. by cerion · 19 years ago
  49. 07b07a9 Implemented almost all of the remaining 64bit-mode insns. by cerion · 19 years ago
  50. 59b2c31 Fix typos. by cerion · 19 years ago
  51. bb01b7c Fixed up front and backend for 32bit mul,div,cmp,shift in mode64 by cerion · 19 years ago
  52. b8a8dba Make suitable changes for ppc32/ppc64 following recent x86/amd64 by sewardj · 19 years ago
  53. f0de28c Implemented backend for ppc64, sharing ppc32 backend. by cerion · 19 years ago
  54. 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
  55. d963eb4 Implemented most of the remaining altivec fp ops: by cerion · 19 years ago
  56. 8ea0d3e Frontend by cerion · 19 years ago
  57. 4a49b03 Frontend: by cerion · 19 years ago
  58. f34ccc4 spacing and var name chages only by cerion · 19 years ago
  59. 92d9d87 Added AltiVec permutation insns: - vperm, vsldoi, vmrg*, vsplt* by cerion · 19 years ago
  60. 27b3d7e more altivec insns: vsr, vspltw - only working with with --tool=none by cerion · 19 years ago
  61. 225a034 by cerion · 19 years ago
  62. 6a64a9f On a PPC32Instr_Call, don't merely record how many integer registers by sewardj · 19 years ago
  63. 7bd6ffe by sewardj · 19 years ago
  64. dbcfae7 by sewardj · 19 years ago
  65. b51f0f4 by sewardj · 19 years ago
  66. a5f957d Fix backend bug: the immediate on PPC32AMode_IR is 16 bits signed, not unsigned. by sewardj · 19 years ago
  67. 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
  68. 91c62fd Fixed coupla altivec typos - hopefully fixes FC4 build by cerion · 19 years ago
  69. 6b6f59e Reshuffled host-ppc32 AltiVec integer insns Added some AltiVec fp insns and CMov by cerion · 19 years ago
  70. c3d8bdc PPC32 AltiVec host-end framework & intruction output - no fp yet by cerion · 19 years ago
  71. 094d139 Floating-point for ppc32 by cerion · 19 years ago
  72. ed623db guest-ppc32 by cerion · 19 years ago
  73. a2f7588 Cleanup backend: var name chages like src1,2 -> srcL,R etc by cerion · 19 years ago
  74. 9e263e3 Cleaned up backend a little by cerion · 19 years ago
  75. 5e2527e Alu32::SUB was broken in the backend. by cerion · 19 years ago
  76. 9abfcbc Added a couple of unhandled isel instrs: by cerion · 19 years ago
  77. 7f000af Added new instruction RdWrLR to read/write link register. by cerion · 19 years ago
  78. a56e9cc Cleaned up a little more by cerion · 19 years ago
  79. 7cf8e4e Fixed emit_PPC32Instr::Pin_Goto by cerion · 19 years ago
  80. 98411db hdefs by cerion · 19 years ago
  81. 33aa6da More instr emitting: - most 'forms' done - had a go at Pin_Call, Pin_Goto by cerion · 19 years ago
  82. b85e8bb spacing/comment cleanup only by cerion · 19 years ago
  83. ab9132d Sorted out the condcode stuff - hopefully correctly... by cerion · 19 years ago
  84. c0e707e Added Div32 - that's the last for this .orig file! by cerion · 19 years ago
  85. e13bb31 Added CLZ Fixed Unary32 Added genSpill_PPC32, genReload_PPC32 by cerion · 19 years ago
  86. 92f5dc7 hdefs: MulL, MFence by cerion · 19 years ago
  87. b536af9 hdefs: CMov32, Set32 by cerion · 19 years ago
  88. b4a632a Changed the register setup a little by cerion · 19 years ago
  89. 2c49e03 A whole bunch more ppc32 backend code - just the isel stuff so far, no assembly by cerion · 19 years ago
  90. cd30449 A first swing at getting ppc32 backend working. Done: tmp, get, put, load, store by cerion · 19 years ago
  91. bcf8c3e Get the PPC32 back-end show on the road. by cerion · 19 years ago