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gerrit-public.fairphone.software / platform / external / valgrind / ad00ea9f40f930d98bb2d278291a6c4c6636d6d6 / priv / host_x86_defs.h
  1. d8c64e0 Constification part 5. by florian · 10 years ago
  2. 8462d11 Constification part 4. by florian · 10 years ago
  3. 7d6f81d Constification part 2. by florian · 10 years ago
  4. 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
  5. 89ae847 Update copyright dates (20XY-2012 ==> 20XY-2013) by sewardj · 11 years ago
  6. 6c65c12 Support mmxext (integer sse) subset on i386 (athlon). by mjw · 11 years ago
  7. cfe046e Merge, from branches/COMEM, revisions 2568 to 2641. by sewardj · 12 years ago
  8. 55085f8 Changes for -Wwrite-strings by florian · 12 years ago
  9. 58a637b Make header files compilable by itself to get two benefits: by florian · 12 years ago
  10. 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
  11. c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 12 years ago
  12. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  13. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  14. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  15. 2a1ed8e Make the x86 and amd64 back ends use the revised prototypes for by sewardj · 15 years ago
  16. cef7d3e by sewardj · 15 years ago[Renamed (97%) from priv/host-x86/hdefs.h]
  17. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  18. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 16 years ago
  19. fb7373a Merge, from CGTUNE branch: by sewardj · 17 years ago
  20. 79e04f8 Teach the x86 back end how generate 'lea' instructions, and generate by sewardj · 17 years ago
  21. e744153 Update copyright dates. by sewardj · 18 years ago
  22. dd40fdf by sewardj · 18 years ago
  23. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  24. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  25. 8f07359 Counterpart to r1605: in the ppc insn selector, don't use the bits by sewardj · 18 years ago
  26. 5117ce1 Change the way Vex represents architecture variants into something by sewardj · 18 years ago
  27. 17c7f95 - x86 back end: change code generation convention, so that instead of by sewardj · 19 years ago
  28. 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
  29. 7bd6ffe by sewardj · 19 years ago
  30. dbcfae7 by sewardj · 19 years ago
  31. 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
  32. eba63f8 Cleaning up the x86 back end: get rid of instruction variants which by sewardj · 19 years ago
  33. f01659e Fix out-of-date comment. by sewardj · 19 years ago
  34. df53045 It seems we never generate x86 rotate insns, so get rid of these. by sewardj · 19 years ago
  35. c0250e4 Fix comment error. by sewardj · 19 years ago
  36. 5dd5eb9 Fix misc naming things (unimportant) by sewardj · 19 years ago
  37. 3e83893 Add a trivial new IR construction: a memory fence statement. Connect by sewardj · 20 years ago
  38. 9df271d Push subarchitecture stuff through the x86 parts. by sewardj · 20 years ago
  39. 109ffdb x86 host: Stuff in support of memchecking of 64x2 vector FP. by sewardj · 20 years ago
  40. 9e20359 Finish almost all SSE2 integer instructions. (!) by sewardj · 20 years ago
  41. b9fa69b x86 host/guest: SSE2 integer shifts and subtracts by sewardj · 20 years ago
  42. 164f927 IR level for support of 128 integer SIMD operations. Use this to do by sewardj · 20 years ago
  43. 636ad76 Copy-n-paste 32x4 floating point stuff into 64x2 floating point stuff so by sewardj · 20 years ago
  44. c1e7dfc Finish SSE1 instructions! Finallyatlast. by sewardj · 20 years ago
  45. 129b3d9 Fix a load of confusion with SSE scalar float insns and memory. by sewardj · 20 years ago
  46. 0bd7ce6 Even more SSE insns. by sewardj · 20 years ago
  47. 3bca906 Rationalisation/cleanup of float to/from int conversions and rounding by sewardj · 20 years ago
  48. 176a59c Add a bunch of easy SSE insns. by sewardj · 20 years ago
  49. 1e6ad74 x86 guest/host: do SSE comparisons. by sewardj · 20 years ago
  50. d08f2d7 x86 host: make a start on SSE code generation. by sewardj · 20 years ago
  51. 70dff0c Add -Wmissing-prototypes as a flag. by sewardj · 20 years ago
  52. 810dcf0 Make VEX's "Char" type always be signed, so as to bring it into line by sewardj · 20 years ago
  53. f8ed9d8 Add copyright notices. by sewardj · 20 years ago
  54. 358b7d4 Learn how to assemble an x86 negl insn. by sewardj · 20 years ago
  55. 218e29f x86 code generation for 64-bit integer stuff, required by Memchecking by sewardj · 20 years ago
  56. 4b861de Make the x86 back end capable of generating conditional calls. by sewardj · 20 years ago
  57. 7735254 Implement regparm (1 to 3) in the x86 back end. by sewardj · 20 years ago
  58. 8ea867b Instead of denoting helper call targets by their names, add a new type by sewardj · 20 years ago
  59. c5fc7aa Changes pertaining to supporting instrumentation: by sewardj · 20 years ago
  60. 442d0be Implement IEEE754-compliant fprem1. by sewardj · 20 years ago
  61. 99016a7 Implement guest x86 fptan. by sewardj · 20 years ago
  62. 06c32a0 Implement yet more x86 FP transcendental instructions. by sewardj · 20 years ago
  63. 46de407 x86: implement FPREM (sigh, nasty, complicated) by sewardj · 20 years ago
  64. 52ace3e * Clean up primop naming a bit * Implement x86 FYL2X insn by sewardj · 20 years ago
  65. 883b00b Fill in many x86 integer and FP cases, enough to get konqueror by sewardj · 20 years ago
  66. e670911 Implement x86 FRNDINT, taking into account of course the current rounding mode. by sewardj · 20 years ago
  67. cfded9a Fill in many more x86 FP cases. by sewardj · 20 years ago
  68. bdc7d21 Make floating-point comparisons work, and fill in a bunch of other x86 by sewardj · 20 years ago
  69. 8f3debf x86: make float to integer conversions observe the rounding mode in effect. by sewardj · 20 years ago
  70. 89cd093 Fix a large number of cases at both ends of the pipeline for x86 by sewardj · 20 years ago
  71. ce646f2 Do a bit more x86 floating point. As a result, had to do 'bsf' and 'bsr' by sewardj · 20 years ago
  72. 3fc76d2 Fill in enough to get through a simple x86 FP processing program by sewardj · 20 years ago
  73. 33124f6 Add FP conditional move insn (host) and isel rule to generate it. by sewardj · 20 years ago
  74. d7cb853 iropt: implement flattening (into SSA form). This caused various by sewardj · 20 years ago
  75. bb53f8c More x86 FP stuff, including conversion stuff to/from Ints. by sewardj · 20 years ago
  76. 3196daf Fix enough stuff to get the first x86 FP instruction through the pipeline. by sewardj · 20 years ago
  77. d1725d1 Lots of spadework for getting x86 floating point to work. by sewardj · 20 years ago
  78. e5f384c Fix up generation of shldl/shldr instructions, and thereby by sewardj · 20 years ago
  79. 5a820d9 More file renaming (still borked) by sewardj · 20 years ago[Renamed from priv/host-x86/defs.h]
  80. 33b6dee Rename some files. by sewardj · 20 years ago[Renamed from priv/host-x86/x86host_defs.h]
  81. 750f407 Fix enough bits and pieces so "int main (void) { return 0; }" works. by sewardj · 20 years ago
  82. 36ca513 Add mechanisms for calling helper functions from generated code. by sewardj · 20 years ago
  83. e8c922f Fill in many (most) x86 emission cases. by sewardj · 20 years ago
  84. 8af36f1 Rename x86h_defs.[ch] to x86host_defs.[ch]. by sewardj · 20 years ago[Renamed from priv/host-x86/x86h_defs.h]
  85. 81bd550 Assembler infrastructure. by sewardj · 20 years ago
  86. 1f40a0a - Fix up verbosity control. by sewardj · 20 years ago
  87. 5c34dc9 Complete first pass thru x86 instruction selector. by sewardj · 20 years ago
  88. 597b71b Teach x86 insn selector how to generate code for 64-bit expressions. by sewardj · 20 years ago
  89. 60f4e3c Refine x86 instruction representation a bit. by sewardj · 20 years ago
  90. 443cd9d Loads more x86 insn selector hacking. by sewardj · 20 years ago
  91. 4042c7e Mucho instruction selector hacking. by sewardj · 20 years ago
  92. e8e9d73 Mucho x86 instruction selector hacking. by sewardj · 20 years ago
  93. 887a11a Rename everything to use the "vex" name. by sewardj · 20 years ago
  94. f13a16a Try and fill in jit_main.c. by sewardj · 20 years ago
  95. 35421a3 Major hashing around to restructure the world. by sewardj · 20 years ago
  96. ac9af02 Mash around top-level library structure some more. by sewardj · 20 years ago
  97. 3e1b2d2 Start to move files into a new structure. by sewardj · 20 years ago[Renamed from include/x86h_defs.h]
  98. 194d54a * Move the x86 genSpill/genRestore functions to the right place. by sewardj · 20 years ago
  99. 6c77c95 Add prototype for isMove_X86Instr. by sewardj · 20 years ago
  100. 2cd80dc Tie everything together enough so the reg-allocator can be test-run. by sewardj · 20 years ago