- af1ceca Enhance IR so as to distinguish between little- and big-endian loads and by sewardj · 19 years ago
- f486035 deltaIRStmt: handle IRStmt_MFence. by sewardj · 19 years ago
- 02ef716 Fix pointer-type mismatches. by sewardj · 19 years ago
- 2c039c9 Comment wibble by sewardj · 19 years ago
- e523a4b Fill in guest_ppc32_state_requires_precise_mem_exns() properly, so Vex by sewardj · 19 years ago
- d94b73a Connect up the plumbing which allows the ppc32 front end to know the by sewardj · 19 years ago
- 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
- 0171310 We have more than 59 allocateable regs now (duh) by cerion · 19 years ago
- 6587f2f some more isel cases: v128,f32 by cerion · 19 years ago
- 336246a Fixed bug in doHelperCall, passing LONG_LONG params by cerion · 19 years ago
- 91c62fd Fixed coupla altivec typos - hopefully fixes FC4 build by cerion · 19 years ago
- e21595a Implemented just enough of isel for an AltiVec store - ls runs on g5 now, yay! by cerion · 19 years ago
- 6b6f59e Reshuffled host-ppc32 AltiVec integer insns Added some AltiVec fp insns and CMov by cerion · 19 years ago
- c3d8bdc PPC32 AltiVec host-end framework & intruction output - no fp yet by cerion · 19 years ago
- 6529aff PPC32 AltiVec reg offsets by cerion · 19 years ago
- a982c05 AltiVec insn parsing for guest end. by cerion · 19 years ago
- 6b30d85 fixed sign-extension bug for branches by cerion · 19 years ago
- a60e790 Disable i-am-kludged messages in the cache control insns. by sewardj · 19 years ago
- ee1357d Disable dangerous case in advance4 which is not currently needed. by sewardj · 19 years ago
- 84ad616 Added isel Ist_Tmp:Ity_I64, iselInt64Expr::Iex_Get by cerion · 19 years ago
- 82ea0d9 ... and write 64bit vals the right way around... by cerion · 19 years ago
- 02d0cb3 Added to insn selector: CmpNEZ8, Ist_Put::Ity_I64 by cerion · 19 years ago
- 9762bbf Fix ppc32 'Call' bug by cerion · 19 years ago
- ec93f98 amd64 back end: handle 8Uto32. by sewardj · 19 years ago
- 0fe6b7e comment wibble by cerion · 19 years ago
- 000a133 this one was x86 code. grr. by cerion · 19 years ago
- 80d326d more ppc32 .orig files by cerion · 19 years ago
- 094d139 Floating-point for ppc32 by cerion · 19 years ago
- ed623db guest-ppc32 by cerion · 19 years ago
- 7a41dd0 fix 'Usage:' by cerion · 19 years ago
- 81d72ea icc police strike again by sewardj · 19 years ago
- 328b54b Make iropt not complain about missing folding rules at the default by sewardj · 19 years ago
- 46813fc The guest-state effect declaration for x86 'fldenv' has been wrong for by sewardj · 19 years ago
- 4017a3b Implement fldenv/fstenv on amd64. by sewardj · 19 years ago
- 446d267 amd64: handle MOVUPS G to E by sewardj · 19 years ago
- 10ca4eb Apparently someone somewhere in some obscure library deep in the by sewardj · 19 years ago
- 4e1a1e9 Handle fnclex, needed by g95. by sewardj · 19 years ago
- 2716ff1 Add a folding rule for 1Uto64. by sewardj · 19 years ago
- 1bf9598 Handle XCHG Gb,Eb. by sewardj · 19 years ago
- 2d4fcd5 Handle XCHG rAX, reg for 32-bit regs as well as 64-bit regs. I'm not by sewardj · 19 years ago
- 8eb804f Handle XOR Ib, AL. by sewardj · 19 years ago
- 94a48b2 Fix behaviour of MOVQ on amd64. by sewardj · 19 years ago
- 6d7ccd5 Finally fix the behaviour of MOVQ (xmm -> xmm). by sewardj · 19 years ago
- 7f64c4c Handle NegF64. by sewardj · 19 years ago
- d38156e Reinstate a SBB case. by sewardj · 19 years ago
- 6847d8c Reinstate a bunch more x87 instructions. by sewardj · 19 years ago
- 5a9ffab Add the beginnings of what might be a general mechanism to pass by sewardj · 19 years ago
- 9f05a64 More floating-point tuning. by sewardj · 19 years ago
- db261e4 Add a couple more %rflag-helper specialisations. by sewardj · 19 years ago
- 9b457d8 Allow reg-alloc to use %rbx. This is a callee-saved register and by sewardj · 19 years ago
- 26b32fc Ah, the joys of register allocation. You might think that giving by sewardj · 19 years ago
- 0bc78ab Do a bit better for (part of) a very common memcheck idiom: "is this by sewardj · 19 years ago
- 1bd14e7 gcc-2.96 build fixes by sewardj · 19 years ago
- ac53044 Make the amd64 back end capable of dealing with the stuff memcheck by sewardj · 19 years ago
- 501a339 AMD64 backend cleanup: get rid of instruction variants which the insn by sewardj · 19 years ago
- e5f740c These cases are now verified. by sewardj · 19 years ago
- ca673ab Placate icc. by sewardj · 19 years ago
- 612be43 To a first approximation, this commit completes SSE2 support for AMD64. by sewardj · 19 years ago
- 703d6d6 Comment-only change. by sewardj · 19 years ago
- 5992bd0 Lots more SSE2 instructions. by sewardj · 19 years ago
- adffcef SSE2, on and on and on. There are more different SSE2 instructions by sewardj · 19 years ago
- 9762859 Enough SSE2 instructions to sink a small ship. And that's not even by sewardj · 19 years ago
- a7ba8c4 First pass through SSE1 instructions. by sewardj · 19 years ago
- 432f8b6 Many amd64 SSE1 instructions. by sewardj · 19 years ago
- 3d8107c Finish off amd64 MMX instructions before they finish me off (it's by sewardj · 19 years ago
- e790566 Handle primops created by memchecking MMX code. by sewardj · 19 years ago
- 8711f66 Make a whole bunch of mmx instructions work. by sewardj · 19 years ago
- e12d644 Support GetI/PutI of 32-bit integer arrays. by sewardj · 19 years ago
- 5e20537 Even more x87 instructions. by sewardj · 19 years ago
- 25a8581 Make a whole bunch more x87 instructions work on amd64. by sewardj · 19 years ago
- e6939f0 More x87 instructions. by sewardj · 19 years ago
- a82b476 Reinstate the specialisation rule which first exposed the bug fixed by r1167. by sewardj · 19 years ago
- e85bc40 Fix silly bug in folding rule. This 'silly bug' took hours to track down. Bah. by sewardj · 19 years ago
- 48a89d8 Make some more x87 instructions work. by sewardj · 19 years ago
- 74b4f89 Fix 64-bit bogon in bt/bts/btc/btr which caused it not to work right. by sewardj · 19 years ago
- 8bdb89a Fix up %rflags handling after 64-bit multiplies. by sewardj · 19 years ago
- 0971734 Implement a whole bunch more SSE instructions on amd64. by sewardj · 19 years ago
- 4c328cf Play a few more rounds of the SSE game on amd64. by sewardj · 19 years ago
- 7fc494b More %flags-helpers tuning. by sewardj · 19 years ago
- 45f1ff8 Update comment. by sewardj · 19 years ago
- 71a35e7 x86 guest: generate Iop_Neg* in the x86->IR phase. Intent is to by sewardj · 19 years ago
- 4a64fee Generate better code for CmpNEZ64(Or64(x,y)), a common idiom resulting by sewardj · 19 years ago
- 84a2c38 Memchecking very large BBs of FP insns on x86 sometimes needs a lot of by sewardj · 19 years ago
- 55efbdf When handling 'sbb %reg,%reg', first put zero into %reg. This removes by sewardj · 19 years ago
- 8ac39e4 Minor tweakage: use testl rather than andl in three places on the by sewardj · 19 years ago
- 65b17c6 Minor cleanups. by sewardj · 19 years ago
- e5e8b56 Get rid of some functions made redundant by recent isel reorganisation. by sewardj · 19 years ago
- 3bc8a59 Don't complain endlessly about missing folding rule for Iop_64HLto128. by sewardj · 19 years ago
- 86ec28b Handle CmpNEZ16. by sewardj · 19 years ago
- 176ad2f Handle various more primops, and reorganise iselCondCode_wrk in line by sewardj · 19 years ago
- b522077 Emit 'negq'. by sewardj · 19 years ago
- 6d709a9 * Use new 64-to/from-{16,8,1} conversion primops by sewardj · 19 years ago
- e58967e Use new 64-to/from-{16,8,1} conversion primops instead of going via Ity_I32. by sewardj · 19 years ago
- 291a7e8 Add even more 64-bit integer primops (sigh) by sewardj · 19 years ago
- 0f1a488 by sewardj · 19 years ago
- 0033ddc by sewardj · 19 years ago
- 0354035 Add various %rflag-helper specialisation cases and fast paths. This by sewardj · 19 years ago
- 0af46ab Handle more cases, and a bit of tuning. by sewardj · 19 years ago
- 9854007 Add 64-bit comparisons. by sewardj · 19 years ago
- 943fa54 Increase number of integer registers in use from 3 to 8. by sewardj · 19 years ago