1. bb01b7c Fixed up front and backend for 32bit mul,div,cmp,shift in mode64 by cerion · 19 years ago
  2. f774505 ppc32/64 backend: take r29 out of circulation so the Valgrind by sewardj · 19 years ago
  3. b8a8dba Make suitable changes for ppc32/ppc64 following recent x86/amd64 by sewardj · 19 years ago
  4. 18e3189 Stop gcc complaining. by sewardj · 19 years ago
  5. f0de28c Implemented backend for ppc64, sharing ppc32 backend. by cerion · 19 years ago
  6. 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
  7. 41a7b70 gcc-2.96 build fixes by sewardj · 19 years ago
  8. d963eb4 Implemented most of the remaining altivec fp ops: by cerion · 19 years ago
  9. f7da610 gcc4 picked up a typo. by cerion · 19 years ago
  10. 8ea0d3e Frontend by cerion · 19 years ago
  11. 059601a Revise the PPC32 subarchitecture kinds, so as to facilitated by sewardj · 19 years ago
  12. 1bee561 Handle instrumentation artefacts arising from memchecking Altivec by sewardj · 19 years ago
  13. 24d06f1 Fix usage of Iop_MullEven* to give IR correct meaning of which lanes being multiplied, i.e. lowest significant lane = zero by cerion · 19 years ago
  14. 4a49b03 Frontend: by cerion · 19 years ago
  15. 1ac656a New irop Iop_MullEven* - a widening un/signed multiply of even lanes by cerion · 19 years ago
  16. 4fa325a API change: make the handling of syscall-denoting instructions a bit by sewardj · 19 years ago
  17. 62d0543 Tidy up a couple of format strings. by sewardj · 19 years ago
  18. dc1f913 Fill in a few missing Altivec cases: by sewardj · 19 years ago
  19. 197bd17 Build fixes for gcc-2.96 (which does not allow declarations after the by sewardj · 19 years ago
  20. f34ccc4 spacing and var name chages only by cerion · 19 years ago
  21. 0a7b4f4 More AltiVec: shifts and rotates - vrl*, vsl*, vsr* by cerion · 19 years ago
  22. 3c05279 Added packing/unpacking AltiVec insns - vpk*, vupk* by cerion · 19 years ago
  23. 92d9d87 Added AltiVec permutation insns: - vperm, vsldoi, vmrg*, vsplt* by cerion · 19 years ago
  24. 0c43922 Added AltiVec integer compare insns. by cerion · 19 years ago
  25. 36991ef Implemented simple AltiVec arithmetic insns: by cerion · 19 years ago
  26. d3e5241 implemented vaddcuw by cerion · 19 years ago
  27. 27b3d7e more altivec insns: vsr, vspltw - only working with with --tool=none by cerion · 19 years ago
  28. 6e7a0ea a couple more simple altivec insns - vandc, vnor, vsel by cerion · 19 years ago
  29. 225a034 by cerion · 19 years ago
  30. c7cd214 Typechecker cleanups (non-functional changes) by sewardj · 19 years ago
  31. a9135fd iselInt64Expr: handle 64-bit Mux0X. by sewardj · 19 years ago
  32. f5936dc implemented Iop_64HLtoV128 in iselVecExpr_wrk by cerion · 19 years ago
  33. 6a64a9f On a PPC32Instr_Call, don't merely record how many integer registers by sewardj · 19 years ago
  34. 7bd6ffe by sewardj · 19 years ago
  35. dbcfae7 by sewardj · 19 years ago
  36. a219519 More isel cases. by sewardj · 19 years ago
  37. 8a8588d Fix signedness of immediate. by sewardj · 19 years ago
  38. 20ef547 Do all ppc32 flag calculations in-line, partly for performance reasons by sewardj · 19 years ago
  39. b51f0f4 by sewardj · 19 years ago
  40. a27cfc4 Keep older versions of gcc (3.0.4) happy. by sewardj · 19 years ago
  41. 7d7f1b6 A further hack to reduce ppc32 reg-alloc costs: don't give the by sewardj · 19 years ago
  42. db36c0f Type casting cleanups. by sewardj · 19 years ago
  43. a5f957d Fix backend bug: the immediate on PPC32AMode_IR is 16 bits signed, not unsigned. by sewardj · 19 years ago
  44. a50fde5 Implemented altivec load: lvx - xfontsel runs now (tool=none) by cerion · 19 years ago
  45. af1ceca Enhance IR so as to distinguish between little- and big-endian loads and by sewardj · 19 years ago
  46. 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
  47. 0171310 We have more than 59 allocateable regs now (duh) by cerion · 19 years ago
  48. 6587f2f some more isel cases: v128,f32 by cerion · 19 years ago
  49. 336246a Fixed bug in doHelperCall, passing LONG_LONG params by cerion · 19 years ago
  50. 91c62fd Fixed coupla altivec typos - hopefully fixes FC4 build by cerion · 19 years ago
  51. e21595a Implemented just enough of isel for an AltiVec store - ls runs on g5 now, yay! by cerion · 19 years ago
  52. 6b6f59e Reshuffled host-ppc32 AltiVec integer insns Added some AltiVec fp insns and CMov by cerion · 19 years ago
  53. c3d8bdc PPC32 AltiVec host-end framework & intruction output - no fp yet by cerion · 19 years ago
  54. ee1357d Disable dangerous case in advance4 which is not currently needed. by sewardj · 19 years ago
  55. 84ad616 Added isel Ist_Tmp:Ity_I64, iselInt64Expr::Iex_Get by cerion · 19 years ago
  56. 82ea0d9 ... and write 64bit vals the right way around... by cerion · 19 years ago
  57. 02d0cb3 Added to insn selector: CmpNEZ8, Ist_Put::Ity_I64 by cerion · 19 years ago
  58. 9762bbf Fix ppc32 'Call' bug by cerion · 19 years ago
  59. 094d139 Floating-point for ppc32 by cerion · 19 years ago
  60. ed623db guest-ppc32 by cerion · 19 years ago
  61. 40e144d more icc -Wall cleanups by sewardj · 20 years ago
  62. 428fabd Make several more files compile cleanly with icc -Wall. Hopefully by sewardj · 20 years ago
  63. 7ce9d15 Support for vex-directed instruction-cache invalidation, needed for by sewardj · 20 years ago
  64. 99f3577 Fix backend cntlzw by cerion · 20 years ago
  65. a2f7588 Cleanup backend: var name chages like src1,2 -> srcL,R etc by cerion · 20 years ago
  66. 9a036bf Build fixes for gcc-2.96 (be more ANSI C compliant wrt placement by sewardj · 20 years ago
  67. 9e263e3 Cleaned up backend a little by cerion · 20 years ago
  68. 01ca53e Dealt properly with immediates in the backend - reduces emmitted code by ~1/3 by cerion · 20 years ago
  69. 47c526b Cleaned up isel for instns taking an RI arg by cerion · 20 years ago
  70. 4f7daf2 Fixed sign-extend bug for compares (just putting imm in a reg, for now) - test_bzip works now! by cerion · 20 years ago
  71. b8c3b7f Small backend printout changes only by cerion · 20 years ago
  72. 35663a7 Backend bug: mkFormD wasn't smallifying the imm by cerion · 20 years ago
  73. e6b39c4 Fixed isel::load of small imm to reg - these are UInts: we don't want sign extension. by cerion · 20 years ago
  74. 5e2527e Alu32::SUB was broken in the backend. by cerion · 20 years ago
  75. be112dd Correction to iselCC::IexTmp by cerion · 20 years ago
  76. 9abfcbc Added a couple of unhandled isel instrs: by cerion · 20 years ago
  77. fbda9b7 Fixed a backend shift bug: src/dst were swapped in emitted code. by cerion · 20 years ago
  78. 48090c0 Some simplifying of guest register access in toIR.c by cerion · 20 years ago
  79. 3007c7f Added front-end code for conditional register logic instrs by cerion · 20 years ago
  80. f9d6e22 Just some assembly printout changes by cerion · 20 years ago
  81. 7f000af Added new instruction RdWrLR to read/write link register. by cerion · 20 years ago
  82. 8c51ed4 Better assembly printouts, and added iselCondCode 1:Bit Const by cerion · 20 years ago
  83. 9a934a9 just turned off some debug printfs by cerion · 20 years ago
  84. e97e106 Fixes to host_ppc32: by cerion · 20 years ago
  85. a56e9cc Cleaned up a little more by cerion · 20 years ago
  86. 7cf8e4e Fixed emit_PPC32Instr::Pin_Goto by cerion · 20 years ago
  87. fd0b87f Emitted Div, fixed mul... that's the lot for return0.orig\! by cerion · 20 years ago
  88. 98411db hdefs by cerion · 20 years ago
  89. 33aa6da More instr emitting: - most 'forms' done - had a go at Pin_Call, Pin_Goto by cerion · 20 years ago
  90. b85e8bb spacing/comment cleanup only by cerion · 20 years ago
  91. ab9132d Sorted out the condcode stuff - hopefully correctly... by cerion · 20 years ago
  92. c056a88 and now emit instrs big-endianly... :-) by cerion · 20 years ago
  93. d5e3838 Added the first instrs (load,store) to emit_PPC32Instr() by cerion · 20 years ago
  94. c0e707e Added Div32 - that's the last for this .orig file! by cerion · 20 years ago
  95. e13bb31 Added CLZ Fixed Unary32 Added genSpill_PPC32, genReload_PPC32 by cerion · 20 years ago
  96. 92f5dc7 hdefs: MulL, MFence by cerion · 20 years ago
  97. b536af9 hdefs: CMov32, Set32 by cerion · 20 years ago
  98. 3c0b12b Dealt with some cases where imm > 0xFFFF by cerion · 20 years ago
  99. b4a632a Changed the register setup a little by cerion · 20 years ago
  100. 2c49e03 A whole bunch more ppc32 backend code - just the isel stuff so far, no assembly by cerion · 20 years ago