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gerrit-public.fairphone.software / platform / external / valgrind / d86b6bb04b60b9bcd869597c3f142646c1017842
  1. d86b6bb Update to check fxrstor too. by sewardj · 16 years ago
  2. 3800e2d Handle fxrstor on x86. Fixes #126389. by sewardj · 16 years ago
  3. dd9095e Allow pushfw and popfw. Fixes #157748. by sewardj · 16 years ago
  4. 842dfb4 Enable repne cmps{b,w,l}. Fixes #153196. by sewardj · 16 years ago
  5. beb5291 Specialise CondNZ after SUBW for both x86 and amd64. by sewardj · 16 years ago
  6. 478646f Merge branches/OTRACK_BY_INSTRUMENTATION into the trunk. This by sewardj · 16 years ago
  7. e7f277a Enable FUCOMPP on amd64. Fixes #161378. by sewardj · 16 years ago
  8. cd538b4 Specialise CondNS after SUBB on amd64. by sewardj · 16 years ago
  9. 9a3431c Specialise CondNS after SUBB. The lack of this was causing Memcheck to by sewardj · 16 years ago
  10. 2e025e8 Show x86 sreg offsets. by sewardj · 17 years ago
  11. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 17 years ago
  12. 32bfd3e Fix CPUID: by sewardj · 17 years ago
  13. 150c9cd by sewardj · 17 years ago
  14. d166e28 by sewardj · 17 years ago
  15. 0e9a0f5 Very kludgey implementation of IRET. May or may not fix #155011. by sewardj · 17 years ago
  16. e2957d6 Generate code to handle 64-bit integer loads and stores on 32-bit by sewardj · 17 years ago
  17. 3252c07 Handle the case Add64(expr,const) a bit better. Apparently Massif The by sewardj · 17 years ago
  18. bf0d86c Fix stupid bug in x86 isel: when generating code for a 64-bit integer by sewardj · 17 years ago
  19. dfb038d Implement lods{b,w,l}. Fixes #152818. by sewardj · 17 years ago
  20. 8edc36b Implement DAA/DAS/AAA/AAS. Really stupid and ugly instructions which by sewardj · 17 years ago
  21. bb4396c Support in{b,w,l} and out{b,w,l} on amd64. Fixes #152357. by sewardj · 17 years ago
  22. d7a544b Fix this: by sewardj · 17 years ago
  23. 48b279b gcc-4.3 build fixes. by sewardj · 17 years ago
  24. a384eb9 Implement SALC. Fixes #147628. by sewardj · 17 years ago
  25. 7f45b2b Enable CMPXCHG Gb,Eb. Fixes #147498. by sewardj · 17 years ago
  26. 671da87 Handle the "alternative" (non-binutils) encoding of 'adc' and tidy up by sewardj · 17 years ago
  27. c4356f0 by sewardj · 17 years ago
  28. b4bf588 Accept some apparently redundant REX.W prefixes seen on code in the by sewardj · 17 years ago
  29. 02f79f1 Implement maskmovq and maskmovdq. by sewardj · 17 years ago
  30. 0f50004 Support x86 $int 0x40 .. 0x43 instructions on Linux. Apparently these by sewardj · 17 years ago
  31. b4f6d6b Support td (64-bit counterpart to r1784). by sewardj · 17 years ago
  32. 59c0d8f Better support for trap insns. This adds support for tw (previously twi and by sewardj · 17 years ago
  33. a0e3d42 Add missing return. by sewardj · 17 years ago
  34. be1b6ff by sewardj · 17 years ago
  35. 4d77a9c Merge from CGTUNE branch, code generation improvements for amd64: by sewardj · 17 years ago
  36. eb17e49 Merge from CGTUNE branch: by sewardj · 17 years ago
  37. fb7373a Merge, from CGTUNE branch: by sewardj · 17 years ago
  38. 607ca2d Merge, from CGTUNE branch: by sewardj · 17 years ago
  39. 54477e3 Allow up to 7 prefixes, so as to accept by sewardj · 17 years ago
  40. b707d10 * implement fistp by sewardj · 17 years ago
  41. e29a31d Oops. Fix longstanding bug which will have caused an unnecessary 4M by sewardj · 17 years ago
  42. 90e2e4b Handle x87 FCOMP. by sewardj · 17 years ago
  43. 3465e75 Stop gcc-4.2 producing hundreds of complaints of the form "warning: by sewardj · 17 years ago
  44. 905edbd Implement lahf/sahf on amd64. Also set NDEP on x86 sahf. Fixes #143907. by sewardj · 17 years ago
  45. 9c3b25a Fix various cases where the instruction decoder asserted/paniced by sewardj · 17 years ago
  46. 8165064 Fold Add8(t,t) ==> t << 1. Fixes #143817 (Unused bitfield pad bits by sewardj · 17 years ago
  47. 6ce1a23 Counterpart to r1745: teach the amd64 back end how to generate 'lea' by sewardj · 17 years ago
  48. 79e04f8 Teach the x86 back end how generate 'lea' instructions, and generate by sewardj · 17 years ago
  49. 7fb65eb x86 back end: use 80-bit loads/stores for floating point spills rather by sewardj · 17 years ago
  50. fd4203c amd64 equivalents of vx1742 (synthesise SIGILL in the normal way for by sewardj · 17 years ago
  51. d51dc81 x86 front end: synthesise SIGILL in the normal way for some obscure by sewardj · 17 years ago
  52. ada80ba Support 'INT $3' instruction on amd64 (counterpart to vx1736). by sewardj · 18 years ago
  53. 5619f79 Tolerate redundant REX.W prefix produced by Mono for 'fsqrt' (a lame kludge). by sewardj · 18 years ago
  54. 34085e3 When generating 64-bit code, ensure that any addresses used in 4 or 8 by sewardj · 18 years ago
  55. 6d83422 Comment-only changes. by sewardj · 18 years ago
  56. d8a6fe8 Handle the (bizarre) no-op "26 2E 64 65 90 %es:%cs:%fs:%gs:nop". This by sewardj · 18 years ago
  57. 322bfa0 Support 'INT $3' instruction. by sewardj · 18 years ago
  58. 1859ecd Handle FCOM and FCOMPP in 64-bit mode (see #141790) by sewardj · 18 years ago
  59. f6c8ebf More IRBB -> IRSB renaming. by sewardj · 18 years ago
  60. 0da5eb8 Fill in missing cases in eqIRConst. This stops iropt's CSE pass from by sewardj · 18 years ago
  61. 0474427 Constant fold XorV128(t,t) -> 0. Effect is that memcheck 'knows' by sewardj · 18 years ago
  62. d7f547f Update. by sewardj · 18 years ago
  63. b5e5c6d Implement rcl{b,w,l,q} on amd64. by sewardj · 18 years ago
  64. 5abcfe6 Implement FXSAVE on amd64. Mysteriously my Athlon64 does not seem to by sewardj · 18 years ago
  65. fc1b541 Add 'missing' primop Iop_ReinterpF32asI32 and code generation support by sewardj · 18 years ago
  66. 20fd839 Straggler by sewardj · 18 years ago
  67. e744153 Update copyright dates. by sewardj · 18 years ago
  68. 78ec32b Add mkIRExprVec_6/7. by sewardj · 18 years ago
  69. 7937c5e Use 'ifndef' in the makefile correctly. by sewardj · 18 years ago
  70. 7784bd2 Tidy up flags spec fn, and add a rule for INCW-CondZ. by sewardj · 18 years ago
  71. c7be3eb Tidy up and finalise x86/amd64 flag spec rules for 3.2.2. by sewardj · 18 years ago
  72. 87f471d Handle recent binutils padding "nopw %cs:0x0(%eax,%eax,1)" by sewardj · 18 years ago
  73. 923c65b Enable support for altivec prefetches: dss, dst, dstt, dstst, dststt. by sewardj · 18 years ago
  74. d2fd864 Enable lvxl and stvxl. by sewardj · 18 years ago
  75. abb321c Implement mfspr 268 and 269. Fixes #139050. by sewardj · 18 years ago
  76. d71ba83 x86 front end: Implement MASKMOVQ (MMX class insn, introduced in SSE1) by sewardj · 18 years ago
  77. dd40fdf by sewardj · 18 years ago
  78. 3862b24 Make compilable again. by sewardj · 18 years ago
  79. 0849772 Make this compilable again. by sewardj · 18 years ago
  80. c3bc60a Change a stupid algorithm that deals with real register live by sewardj · 18 years ago
  81. b235e5b Add a couple of %rflags spec rules which improve performance of amd64 by sewardj · 18 years ago
  82. 6f2f283 New function dopyIRBBExceptStmts which makes it a bit easier to write tools. by sewardj · 18 years ago
  83. 174c770 Specialise computation of carry flag after ADDL. by sewardj · 18 years ago
  84. 8a81970 Even more flag-spec rules: SUBL-CondNL, SUBL-CondNBE, SUBL-NB and redo by sewardj · 18 years ago
  85. 1ee3e18 A couple more x86 spec rules: COPY-CondNZ and SUBL-CondNS. by sewardj · 18 years ago
  86. c429324 On amd64, allow the register allocator to use %r10 which it previously by sewardj · 18 years ago
  87. 2890582 Handle long-form encoding of 'push{l,w} %reg'. by sewardj · 18 years ago
  88. dc5d084 Handle JCXZ. by sewardj · 18 years ago
  89. 57c10c8 Add many extra comments describing the IR. by sewardj · 18 years ago
  90. 47c2d4d Handle 'ret imm16'. Fixes #136650. by sewardj · 18 years ago
  91. c45aa52 Add an %eflags rule for COPY-CondP. by sewardj · 18 years ago
  92. cea9662 Re-enable 'repne movs' (fix for original bug in #126147). by sewardj · 18 years ago
  93. b69a6fa Re-enable 'repne stos' (fix for Gernot Tenchio's part of #126147). by sewardj · 18 years ago
  94. 048de4d Implement 'xlat' (fixes #125959 and #135012). by sewardj · 18 years ago
  95. ef4433b When doing rlwinm in 64-bit mode, bind the intermediate 32-bit result by sewardj · 18 years ago
  96. ee4a859 ppc64: detect rldicl/rldicr which are simply 64-bit shifts left/right by sewardj · 18 years ago
  97. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  98. 496b88f Reinstate support for 'mcrfs'. by sewardj · 18 years ago
  99. 2eb9ffa Another day, another %eflags reduction rule. by sewardj · 18 years ago
  100. 9e234f6 Support pextrw when the destination register is 64 bits too. Fixes #133678. by sewardj · 18 years ago