- e5e837c Handle MOVSD reg,reg for the encoding which is not emitted by binutils. by sewardj · 16 years ago
- 4970e4e Support FPREM1 on amd64. Fixes #172563. by sewardj · 16 years ago
- 0d923d7 Support 8 bit xadd. Fixes #158744. by sewardj · 16 years ago
- 478646f Merge branches/OTRACK_BY_INSTRUMENTATION into the trunk. This by sewardj · 17 years ago
- e7f277a Enable FUCOMPP on amd64. Fixes #161378. by sewardj · 17 years ago
- a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 17 years ago
- 32bfd3e Fix CPUID: by sewardj · 17 years ago
- 150c9cd by sewardj · 17 years ago
- d166e28 by sewardj · 17 years ago
- bb4396c Support in{b,w,l} and out{b,w,l} on amd64. Fixes #152357. by sewardj · 17 years ago
- d7a544b Fix this: by sewardj · 17 years ago
- 7f45b2b Enable CMPXCHG Gb,Eb. Fixes #147498. by sewardj · 17 years ago
- 671da87 Handle the "alternative" (non-binutils) encoding of 'adc' and tidy up by sewardj · 17 years ago
- c4356f0 by sewardj · 17 years ago
- b4bf588 Accept some apparently redundant REX.W prefixes seen on code in the by sewardj · 17 years ago
- 02f79f1 Implement maskmovq and maskmovdq. by sewardj · 17 years ago
- 0f50004 Support x86 $int 0x40 .. 0x43 instructions on Linux. Apparently these by sewardj · 17 years ago
- 54477e3 Allow up to 7 prefixes, so as to accept by sewardj · 17 years ago
- b707d10 * implement fistp by sewardj · 17 years ago
- 90e2e4b Handle x87 FCOMP. by sewardj · 18 years ago
- 905edbd Implement lahf/sahf on amd64. Also set NDEP on x86 sahf. Fixes #143907. by sewardj · 18 years ago
- fd4203c amd64 equivalents of vx1742 (synthesise SIGILL in the normal way for by sewardj · 18 years ago
- ada80ba Support 'INT $3' instruction on amd64 (counterpart to vx1736). by sewardj · 18 years ago
- 5619f79 Tolerate redundant REX.W prefix produced by Mono for 'fsqrt' (a lame kludge). by sewardj · 18 years ago
- 1859ecd Handle FCOM and FCOMPP in 64-bit mode (see #141790) by sewardj · 18 years ago
- b5e5c6d Implement rcl{b,w,l,q} on amd64. by sewardj · 18 years ago
- 5abcfe6 Implement FXSAVE on amd64. Mysteriously my Athlon64 does not seem to by sewardj · 18 years ago
- e744153 Update copyright dates. by sewardj · 18 years ago
- dd40fdf by sewardj · 18 years ago
- 47c2d4d Handle 'ret imm16'. Fixes #136650. by sewardj · 18 years ago
- aca070a Merge r1663-r1666: by sewardj · 18 years ago
- 9e234f6 Support pextrw when the destination register is 64 bits too. Fixes #133678. by sewardj · 18 years ago
- f4c803b Add support for amd64 'fprem' (fixes bug 132918). This isn't exactly by sewardj · 18 years ago
- b2da8ec 64-bit counterpart to v1652 (Stop mkU16 asserting if d32 is a negative by sewardj · 18 years ago
- d0aa0a5 Implement amd64 insns cmpxchg8b and cmpxchg16b. Fixes #127521. by sewardj · 18 years ago
- 6140822 Generate less verbose IR for amd64 'bswapq'. Fixes #132146. by sewardj · 18 years ago
- fcf21f3 64-bit equivalent to r1635: handle all SSE3 instructions except by sewardj · 18 years ago
- ec387ca Handle nop-with-an-amode (sheesh. Mutancy. whatever next?) for x86 and by sewardj · 18 years ago
- 11faabe Allow a redundant REX prefix for pushfq. Fixes #130785. by sewardj · 18 years ago
- 59e96c1 Implement SSE2 'psadbw'. Fixes #128917. by sewardj · 18 years ago
- a33e9a4 Update copyright dates. by sewardj · 18 years ago
- 6204590 Get rid of assertion getting in the way of handling 'sbbb G,E' where E by sewardj · 18 years ago
- 1287ab4 Enable 'SHLDv imm8,Gv,Ev'. Fixes #126583. by sewardj · 19 years ago
- 5fadaf9 Enable 'sbb $imm,%al'. Fixes #126668. by sewardj · 19 years ago
- 3180446 Implement CLC/STC/CMC. Fixes #125651. by sewardj · 19 years ago
- 25d2386 (1) Fix longstanding bug causing erroneous register zeroing for 'btl'. by sewardj · 19 years ago
- a5f55da Don't use the bits VexArchInfo.hwcaps to distinguish ppc32 and ppc64, by sewardj · 19 years ago
- ae84d78 Fix for instruction-decoding failures reported in #124499. by sewardj · 19 years ago
- db85903 Implement amd64 pmaddwd for SSE2. by sewardj · 19 years ago
- 879cee0 Move the helper function for x86 'fxtract' to g_generic_x87.c so by sewardj · 19 years ago
- 7c2d282 Implement fnstsw. by sewardj · 19 years ago
- 3368e10 Implement fcmovnu. by sewardj · 19 years ago
- 4796d66 Fixups following recent FP rounding mode changes. by sewardj · 19 years ago
- b183b85 by sewardj · 19 years ago
- 5117ce1 Change the way Vex represents architecture variants into something by sewardj · 19 years ago
- c716aea Two different sets of changes (hard to disentangle): by sewardj · 19 years ago
- ce02aa7 Merge in function wrapping support from the FNWRAP branch. That by sewardj · 19 years ago
- 3e616e6 Implement clflush. by sewardj · 19 years ago
- ab9055b For SSE scalar comparison operations where one operand is in memory, by sewardj · 19 years ago
- 43f4573 format string wibble by sewardj · 19 years ago
- f526843 Stop gcc4 complaining. by sewardj · 19 years ago
- 0585a03 Implement FINIT. by sewardj · 19 years ago
- 9fb2f47 Reenable FUCOMP %st(0),%st(?). by sewardj · 19 years ago
- 75ce365 Implement SHRDv imm8. by sewardj · 19 years ago
- 33ef9c2 Implement shld/shrd on amd64. Total timewasting nightmare, not helped by sewardj · 19 years ago
- c01c1fa Handle jecxz in addition to jrcxz. by sewardj · 19 years ago
- 42561ef Handle address-size overrides in the common case (explicit memory references). by sewardj · 19 years ago
- 4fa325a API change: make the handling of syscall-denoting instructions a bit by sewardj · 19 years ago
- 240fd86 Implement 66 0F 11 = MOVUPD (untested) by sewardj · 19 years ago
- 62d0543 Tidy up a couple of format strings. by sewardj · 19 years ago
- fb6c179 Handle FUCOM %st(0),%st(?). by sewardj · 19 years ago
- a7690fb Handle BT/BTS/BTR/BTC at size 4 as well as 8. by sewardj · 19 years ago
- fdfa886 Implement JRCXZ. by sewardj · 19 years ago
- c7cd214 Typechecker cleanups (non-functional changes) by sewardj · 19 years ago
- 820611e Build rflag thunk for adc/sbb correctly. by sewardj · 19 years ago
- 9ed1680 amd64: Handle BT/BTS/BTR/BTC Gv, Ev. by sewardj · 19 years ago
- e8f6525 Implement LOOP{,E,NE}. by sewardj · 19 years ago
- 8707fef Rename a couple of inconsistently-named helper functions. by sewardj · 19 years ago
- bc6af53 Implement RDTSC (amd64). by sewardj · 19 years ago
- 3587c6b dis_Grp2: decode address mode correctly by sewardj · 19 years ago
- b04a47c Implement PREFETCH{W} m8. by sewardj · 19 years ago
- 566d2c7 Implement DC /3 (FCOMP double-real). by sewardj · 19 years ago
- bfabcc4 Reenable FST %st(0),%st(?) (0xDD 0xD0 .. 0xDD 0xD7). by sewardj · 19 years ago
- 564f7ea Reinstate SBB r/m, reg. by sewardj · 19 years ago
- 7bd6ffe by sewardj · 19 years ago
- 2bd97d1 Implement 0xA0 /* MOV Ob,AL */ and 0xA2 /* MOV AL,Ob */. by sewardj · 19 years ago
- b7bcdf9 Ignore redundant REX.W prefix on CALL Ev. by sewardj · 19 years ago
- dbcfae7 by sewardj · 19 years ago
- 87277cb Implement 0xA1 /* MOV Ov,eAX */ and 0xA3 /* MOV eAX,Ov */. This by sewardj · 19 years ago
- 4f9847d Implement a couple of missing x87 insns. by sewardj · 19 years ago
- 9053d22 Reenable an ADC variant. by sewardj · 19 years ago
- 41c0109 Implement ADC Ib, AL. by sewardj · 19 years ago
- 112b099 An appallingly inefficient, but correct, implementation of rcr. On by sewardj · 19 years ago
- 98e9f34 Implement bswapq %reg. Generates pretty verbose code, but it works. by sewardj · 19 years ago
- 7a06b85 Implement SBB Ev,Gv. by sewardj · 19 years ago
- 6359f81 Implement LOOP disp8 (0xE2). by sewardj · 19 years ago
- c8b2635 Implement F3 90 (rep nop). by sewardj · 19 years ago
- 22cab06 Make ADC Ev,Gv work. by sewardj · 19 years ago
- 0bfc6b6 My life is one endless stream of small things which don't quite work. by sewardj · 19 years ago
- 270def4 Change type of deltas from ULong to Long throughout. Probably pointless. by sewardj · 19 years ago