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gerrit-public.fairphone.software / platform / external / valgrind / f6c8ebf1294fea43756683ba7089b746168abb8e
  1. f6c8ebf More IRBB -> IRSB renaming. by sewardj · 17 years ago
  2. 0da5eb8 Fill in missing cases in eqIRConst. This stops iropt's CSE pass from by sewardj · 17 years ago
  3. 0474427 Constant fold XorV128(t,t) -> 0. Effect is that memcheck 'knows' by sewardj · 18 years ago
  4. d7f547f Update. by sewardj · 18 years ago
  5. b5e5c6d Implement rcl{b,w,l,q} on amd64. by sewardj · 18 years ago
  6. 5abcfe6 Implement FXSAVE on amd64. Mysteriously my Athlon64 does not seem to by sewardj · 18 years ago
  7. fc1b541 Add 'missing' primop Iop_ReinterpF32asI32 and code generation support by sewardj · 18 years ago
  8. 20fd839 Straggler by sewardj · 18 years ago
  9. e744153 Update copyright dates. by sewardj · 18 years ago
  10. 78ec32b Add mkIRExprVec_6/7. by sewardj · 18 years ago
  11. 7937c5e Use 'ifndef' in the makefile correctly. by sewardj · 18 years ago
  12. 7784bd2 Tidy up flags spec fn, and add a rule for INCW-CondZ. by sewardj · 18 years ago
  13. c7be3eb Tidy up and finalise x86/amd64 flag spec rules for 3.2.2. by sewardj · 18 years ago
  14. 87f471d Handle recent binutils padding "nopw %cs:0x0(%eax,%eax,1)" by sewardj · 18 years ago
  15. 923c65b Enable support for altivec prefetches: dss, dst, dstt, dstst, dststt. by sewardj · 18 years ago
  16. d2fd864 Enable lvxl and stvxl. by sewardj · 18 years ago
  17. abb321c Implement mfspr 268 and 269. Fixes #139050. by sewardj · 18 years ago
  18. d71ba83 x86 front end: Implement MASKMOVQ (MMX class insn, introduced in SSE1) by sewardj · 18 years ago
  19. dd40fdf by sewardj · 18 years ago
  20. 3862b24 Make compilable again. by sewardj · 18 years ago
  21. 0849772 Make this compilable again. by sewardj · 18 years ago
  22. c3bc60a Change a stupid algorithm that deals with real register live by sewardj · 18 years ago
  23. b235e5b Add a couple of %rflags spec rules which improve performance of amd64 by sewardj · 18 years ago
  24. 6f2f283 New function dopyIRBBExceptStmts which makes it a bit easier to write tools. by sewardj · 18 years ago
  25. 174c770 Specialise computation of carry flag after ADDL. by sewardj · 18 years ago
  26. 8a81970 Even more flag-spec rules: SUBL-CondNL, SUBL-CondNBE, SUBL-NB and redo by sewardj · 18 years ago
  27. 1ee3e18 A couple more x86 spec rules: COPY-CondNZ and SUBL-CondNS. by sewardj · 18 years ago
  28. c429324 On amd64, allow the register allocator to use %r10 which it previously by sewardj · 18 years ago
  29. 2890582 Handle long-form encoding of 'push{l,w} %reg'. by sewardj · 18 years ago
  30. dc5d084 Handle JCXZ. by sewardj · 18 years ago
  31. 57c10c8 Add many extra comments describing the IR. by sewardj · 18 years ago
  32. 47c2d4d Handle 'ret imm16'. Fixes #136650. by sewardj · 18 years ago
  33. c45aa52 Add an %eflags rule for COPY-CondP. by sewardj · 18 years ago
  34. cea9662 Re-enable 'repne movs' (fix for original bug in #126147). by sewardj · 18 years ago
  35. b69a6fa Re-enable 'repne stos' (fix for Gernot Tenchio's part of #126147). by sewardj · 18 years ago
  36. 048de4d Implement 'xlat' (fixes #125959 and #135012). by sewardj · 18 years ago
  37. ef4433b When doing rlwinm in 64-bit mode, bind the intermediate 32-bit result by sewardj · 18 years ago
  38. ee4a859 ppc64: detect rldicl/rldicr which are simply 64-bit shifts left/right by sewardj · 18 years ago
  39. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  40. 496b88f Reinstate support for 'mcrfs'. by sewardj · 18 years ago
  41. 2eb9ffa Another day, another %eflags reduction rule. by sewardj · 18 years ago
  42. 9e234f6 Support pextrw when the destination register is 64 bits too. Fixes #133678. by sewardj · 18 years ago
  43. f4c803b Add support for amd64 'fprem' (fixes bug 132918). This isn't exactly by sewardj · 18 years ago
  44. b2da8ec 64-bit counterpart to v1652 (Stop mkU16 asserting if d32 is a negative by sewardj · 18 years ago
  45. c4255a0 Stop mkU16 asserting if d32 is a negative 16-bit number (bug #132813). by sewardj · 18 years ago
  46. 32d615b More reduction rules, which further reduce memcheck's false error by sewardj · 18 years ago
  47. 9195aa1 Fix previous commit (r1640?) so that it's actually correct :-) by sewardj · 18 years ago
  48. a9cb67b Comparing a reg with itself produces a result which doesn't depend on by sewardj · 18 years ago
  49. d0aa0a5 Implement amd64 insns cmpxchg8b and cmpxchg16b. Fixes #127521. by sewardj · 18 years ago
  50. 6140822 Generate less verbose IR for amd64 'bswapq'. Fixes #132146. by sewardj · 18 years ago
  51. f355f6b amd64 insn printing fix. by sewardj · 18 years ago
  52. fcf21f3 64-bit equivalent to r1635: handle all SSE3 instructions except by sewardj · 18 years ago
  53. dd5d204 Handle all SSE3 instructions except monitor and mwait. 64-bit by sewardj · 18 years ago
  54. ec387ca Handle nop-with-an-amode (sheesh. Mutancy. whatever next?) for x86 and by sewardj · 18 years ago
  55. 11faabe Allow a redundant REX prefix for pushfq. Fixes #130785. by sewardj · 18 years ago
  56. 59e96c1 Implement SSE2 'psadbw'. Fixes #128917. by sewardj · 18 years ago
  57. 2d258d8 More copyright updates. by sewardj · 18 years ago
  58. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  59. 3be608d Specialisation rule which reduces memcheck false error rate for by sewardj · 18 years ago
  60. c5fd972 Comment-only change. by sewardj · 18 years ago
  61. b83767e Yet another %eflags folding rule - this one for performance reasons. by sewardj · 18 years ago
  62. cd90bfe ppc backend: handle vector constant of zero. by cerion · 18 years ago
  63. 6204590 Get rid of assertion getting in the way of handling 'sbbb G,E' where E by sewardj · 18 years ago
  64. 5328b10 Got a sudden attach of the implicit-type-casting paranoias whilst by sewardj · 18 years ago
  65. 346d9a1 A couple of IR simplification hacks for the amd64 front end, so as to by sewardj · 18 years ago
  66. 9088540 Clear up yet another gcc-4.1.0 stunt leading to false uninitialised by sewardj · 18 years ago
  67. 275ccdf A few more x86 eflags-helper rewrite cases, which further reduce the by sewardj · 18 years ago
  68. 89d89e9 Add an IR folding rule to convert Add32(x,x) into Shl32(x,1). This by sewardj · 18 years ago
  69. 54be8dd Add specialisation rules to simplify the IR for 'testl .. ; js ..', by sewardj · 18 years ago
  70. 1287ab4 Enable 'SHLDv imm8,Gv,Ev'. Fixes #126583. by sewardj · 18 years ago
  71. 5fadaf9 Enable 'sbb $imm,%al'. Fixes #126668. by sewardj · 18 years ago
  72. 3180446 Implement CLC/STC/CMC. Fixes #125651. by sewardj · 18 years ago
  73. 25d2386 (1) Fix longstanding bug causing erroneous register zeroing for 'btl'. by sewardj · 18 years ago
  74. fcff178 Support 'popw m16'. Fixes #126243. by sewardj · 18 years ago
  75. afd1639 Fix for 32-bit mode, as per comment. by sewardj · 18 years ago
  76. 413a468 Implement sthbrx. by sewardj · 18 years ago
  77. 40d8c09 Implement lhbrx. by sewardj · 18 years ago
  78. 6ba982f Fix incorrect behaviour of mov{s,z}bw (#126253). by sewardj · 18 years ago
  79. 8f07359 Counterpart to r1605: in the ppc insn selector, don't use the bits by sewardj · 18 years ago
  80. a5f55da Don't use the bits VexArchInfo.hwcaps to distinguish ppc32 and ppc64, by sewardj · 18 years ago
  81. ae84d78 Fix for instruction-decoding failures reported in #124499. by sewardj · 18 years ago
  82. 576f323 Allow 'repe scas' (possible fix for #124892). by sewardj · 18 years ago
  83. db85903 Implement amd64 pmaddwd for SSE2. by sewardj · 18 years ago
  84. f32d5a5 Add a function to set/clear the x86 carry flag. (untested) by sewardj · 18 years ago
  85. 5c5f72c Fix some segment register pushes/pops. by sewardj · 18 years ago
  86. 21bd7c7 upmerge r1597 (ppc32 needs a lot of spill slots sometimes) by sewardj · 18 years ago
  87. 879cee0 Move the helper function for x86 'fxtract' to g_generic_x87.c so by sewardj · 18 years ago
  88. 7c2d282 Implement fnstsw. by sewardj · 18 years ago
  89. d8862cf Fix debug printing. by sewardj · 18 years ago
  90. 3368e10 Implement fcmovnu. by sewardj · 18 years ago
  91. 8531768 Implement 3DNow! prefetch insn (prefetch, prefetchw). Fixes #120410. by sewardj · 18 years ago
  92. 0092e0d Handle byte-size 'xadd reg,mem'. Also, don't bomb out for the by sewardj · 18 years ago
  93. 72aefb2 Implement mtocrf/mfocrf. by sewardj · 18 years ago
  94. 1a866b4 Oops, stuff that should have been part of r1573 (4-arg primop change). by sewardj · 18 years ago
  95. 40c8026 Redo the way FP multiply-accumulate insns are done on ppc32/64. by sewardj · 18 years ago
  96. 2d19fe3 Word size fixes for twi/tdi (is trickier than it looks :-). Also add by sewardj · 18 years ago
  97. 334870d ppc32/64: handle twi/tdi (conditional trap) instructions by sewardj · 18 years ago
  98. 56de421 fre: observe the current rounding mode by sewardj · 18 years ago
  99. c3778a2 Redo x86g_calculate_FXTRACT to only use integer arithmetic. by sewardj · 18 years ago
  100. fa7fc6b Comment-only changes by sewardj · 18 years ago