- f0de28c Implemented backend for ppc64, sharing ppc32 backend. by cerion · 19 years ago
- 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
- 41a7b70 gcc-2.96 build fixes by sewardj · 19 years ago
- d963eb4 Implemented most of the remaining altivec fp ops: by cerion · 19 years ago
- 8ea0d3e Frontend by cerion · 19 years ago
- 059601a Revise the PPC32 subarchitecture kinds, so as to facilitated by sewardj · 19 years ago
- 1bee561 Handle instrumentation artefacts arising from memchecking Altivec by sewardj · 19 years ago
- 24d06f1 Fix usage of Iop_MullEven* to give IR correct meaning of which lanes being multiplied, i.e. lowest significant lane = zero by cerion · 19 years ago
- 4a49b03 Frontend: by cerion · 19 years ago
- 1ac656a New irop Iop_MullEven* - a widening un/signed multiply of even lanes by cerion · 19 years ago
- dc1f913 Fill in a few missing Altivec cases: by sewardj · 19 years ago
- 197bd17 Build fixes for gcc-2.96 (which does not allow declarations after the by sewardj · 19 years ago
- f34ccc4 spacing and var name chages only by cerion · 19 years ago
- 0a7b4f4 More AltiVec: shifts and rotates - vrl*, vsl*, vsr* by cerion · 19 years ago
- 3c05279 Added packing/unpacking AltiVec insns - vpk*, vupk* by cerion · 19 years ago
- 92d9d87 Added AltiVec permutation insns: - vperm, vsldoi, vmrg*, vsplt* by cerion · 19 years ago
- 0c43922 Added AltiVec integer compare insns. by cerion · 19 years ago
- 36991ef Implemented simple AltiVec arithmetic insns: by cerion · 19 years ago
- d3e5241 implemented vaddcuw by cerion · 19 years ago
- 27b3d7e more altivec insns: vsr, vspltw - only working with with --tool=none by cerion · 19 years ago
- 6e7a0ea a couple more simple altivec insns - vandc, vnor, vsel by cerion · 19 years ago
- 225a034 by cerion · 19 years ago
- c7cd214 Typechecker cleanups (non-functional changes) by sewardj · 19 years ago
- a9135fd iselInt64Expr: handle 64-bit Mux0X. by sewardj · 19 years ago
- f5936dc implemented Iop_64HLtoV128 in iselVecExpr_wrk by cerion · 19 years ago
- 6a64a9f On a PPC32Instr_Call, don't merely record how many integer registers by sewardj · 19 years ago
- 7bd6ffe by sewardj · 19 years ago
- dbcfae7 by sewardj · 19 years ago
- a219519 More isel cases. by sewardj · 19 years ago
- 8a8588d Fix signedness of immediate. by sewardj · 19 years ago
- 20ef547 Do all ppc32 flag calculations in-line, partly for performance reasons by sewardj · 19 years ago
- b51f0f4 by sewardj · 19 years ago
- a27cfc4 Keep older versions of gcc (3.0.4) happy. by sewardj · 19 years ago
- db36c0f Type casting cleanups. by sewardj · 19 years ago
- a5f957d Fix backend bug: the immediate on PPC32AMode_IR is 16 bits signed, not unsigned. by sewardj · 19 years ago
- a50fde5 Implemented altivec load: lvx - xfontsel runs now (tool=none) by cerion · 19 years ago
- af1ceca Enhance IR so as to distinguish between little- and big-endian loads and by sewardj · 19 years ago
- 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
- 6587f2f some more isel cases: v128,f32 by cerion · 19 years ago
- 336246a Fixed bug in doHelperCall, passing LONG_LONG params by cerion · 19 years ago
- e21595a Implemented just enough of isel for an AltiVec store - ls runs on g5 now, yay! by cerion · 19 years ago
- ee1357d Disable dangerous case in advance4 which is not currently needed. by sewardj · 19 years ago
- 84ad616 Added isel Ist_Tmp:Ity_I64, iselInt64Expr::Iex_Get by cerion · 19 years ago
- 82ea0d9 ... and write 64bit vals the right way around... by cerion · 19 years ago
- 02d0cb3 Added to insn selector: CmpNEZ8, Ist_Put::Ity_I64 by cerion · 19 years ago
- 094d139 Floating-point for ppc32 by cerion · 19 years ago
- ed623db guest-ppc32 by cerion · 19 years ago
- 40e144d more icc -Wall cleanups by sewardj · 20 years ago
- a2f7588 Cleanup backend: var name chages like src1,2 -> srcL,R etc by cerion · 20 years ago
- 9a036bf Build fixes for gcc-2.96 (be more ANSI C compliant wrt placement by sewardj · 20 years ago
- 9e263e3 Cleaned up backend a little by cerion · 20 years ago
- 01ca53e Dealt properly with immediates in the backend - reduces emmitted code by ~1/3 by cerion · 20 years ago
- 47c526b Cleaned up isel for instns taking an RI arg by cerion · 20 years ago
- 4f7daf2 Fixed sign-extend bug for compares (just putting imm in a reg, for now) - test_bzip works now! by cerion · 20 years ago
- e6b39c4 Fixed isel::load of small imm to reg - these are UInts: we don't want sign extension. by cerion · 20 years ago
- 5e2527e Alu32::SUB was broken in the backend. by cerion · 20 years ago
- be112dd Correction to iselCC::IexTmp by cerion · 20 years ago
- 9abfcbc Added a couple of unhandled isel instrs: by cerion · 20 years ago
- 48090c0 Some simplifying of guest register access in toIR.c by cerion · 20 years ago
- 3007c7f Added front-end code for conditional register logic instrs by cerion · 20 years ago
- 7f000af Added new instruction RdWrLR to read/write link register. by cerion · 20 years ago
- 8c51ed4 Better assembly printouts, and added iselCondCode 1:Bit Const by cerion · 20 years ago
- 9a934a9 just turned off some debug printfs by cerion · 20 years ago
- e97e106 Fixes to host_ppc32: by cerion · 20 years ago
- a56e9cc Cleaned up a little more by cerion · 20 years ago
- 7cf8e4e Fixed emit_PPC32Instr::Pin_Goto by cerion · 20 years ago
- fd0b87f Emitted Div, fixed mul... that's the lot for return0.orig\! by cerion · 20 years ago
- 98411db hdefs by cerion · 20 years ago
- 33aa6da More instr emitting: - most 'forms' done - had a go at Pin_Call, Pin_Goto by cerion · 20 years ago
- b85e8bb spacing/comment cleanup only by cerion · 20 years ago
- ab9132d Sorted out the condcode stuff - hopefully correctly... by cerion · 20 years ago
- c0e707e Added Div32 - that's the last for this .orig file! by cerion · 20 years ago
- e13bb31 Added CLZ Fixed Unary32 Added genSpill_PPC32, genReload_PPC32 by cerion · 20 years ago
- 92f5dc7 hdefs: MulL, MFence by cerion · 20 years ago
- b536af9 hdefs: CMov32, Set32 by cerion · 20 years ago
- 3c0b12b Dealt with some cases where imm > 0xFFFF by cerion · 20 years ago
- b4a632a Changed the register setup a little by cerion · 20 years ago
- 2c49e03 A whole bunch more ppc32 backend code - just the isel stuff so far, no assembly by cerion · 20 years ago
- cd30449 A first swing at getting ppc32 backend working. Done: tmp, get, put, load, store by cerion · 20 years ago
- bcf8c3e Get the PPC32 back-end show on the road. by cerion · 20 years ago