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gerrit-public.fairphone.software
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platform
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external
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vixl
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88c46b84df005638546de5e4e965bdcc31352f48
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.
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test
/
a32
tree: ebde9891124c1b67422fced1c4cd846a56c07177 [
path history
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[
tgz
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config/
traces/
test-assembler-a32.cc
test-assembler-cond-rd-memop-immediate-512-a32.cc
test-assembler-cond-rd-memop-immediate-8192-a32.cc
test-assembler-cond-rd-memop-rs-a32.cc
test-assembler-cond-rd-memop-rs-shift-amount-1to31-a32.cc
test-assembler-cond-rd-memop-rs-shift-amount-1to32-a32.cc
test-assembler-cond-rd-operand-const-a32.cc
test-assembler-cond-rd-operand-const-t32.cc
test-assembler-cond-rd-operand-imm16-t32.cc
test-assembler-cond-rd-operand-rn-a32.cc
test-assembler-cond-rd-operand-rn-ror-amount-a32.cc
test-assembler-cond-rd-operand-rn-ror-amount-t32.cc
test-assembler-cond-rd-operand-rn-shift-amount-1to31-a32.cc
test-assembler-cond-rd-operand-rn-shift-amount-1to31-t32-in-it-block.cc
test-assembler-cond-rd-operand-rn-shift-amount-1to31-t32.cc
test-assembler-cond-rd-operand-rn-shift-amount-1to32-a32.cc
test-assembler-cond-rd-operand-rn-shift-amount-1to32-t32-in-it-block.cc
test-assembler-cond-rd-operand-rn-shift-amount-1to32-t32.cc
test-assembler-cond-rd-operand-rn-shift-rs-a32.cc
test-assembler-cond-rd-operand-rn-shift-rs-t32-in-it-block.cc
test-assembler-cond-rd-operand-rn-shift-rs-t32-narrow-out-it-block.cc
test-assembler-cond-rd-operand-rn-shift-rs-t32.cc
test-assembler-cond-rd-operand-rn-t32-identical-low-registers-in-it-block.cc
test-assembler-cond-rd-operand-rn-t32-in-it-block.cc
test-assembler-cond-rd-operand-rn-t32-low-registers-in-it-block.cc
test-assembler-cond-rd-operand-rn-t32.cc
test-assembler-cond-rd-pc-operand-imm12-t32.cc
test-assembler-cond-rd-pc-operand-imm8-t32.cc
test-assembler-cond-rd-rn-a32.cc
test-assembler-cond-rd-rn-operand-const-a32.cc
test-assembler-cond-rd-rn-operand-const-t32.cc
test-assembler-cond-rd-rn-operand-imm12-t32.cc
test-assembler-cond-rd-rn-operand-rm-a32.cc
test-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc
test-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc
test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc
test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc
test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc
test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc
test-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc
test-assembler-cond-rd-rn-operand-rm-t32-all-low-in-it-block.cc
test-assembler-cond-rd-rn-operand-rm-t32-all-low-rd-is-rn-in-it-block.cc
test-assembler-cond-rd-rn-operand-rm-t32-rd-is-rn-in-it-block.cc
test-assembler-cond-rd-rn-operand-rm-t32-rd-is-rn-is-sp-in-it-block.cc
test-assembler-cond-rd-rn-operand-rm-t32-rn-is-sp-in-it-block.cc
test-assembler-cond-rd-rn-operand-rm-t32.cc
test-assembler-cond-rd-rn-rm-a32.cc
test-assembler-cond-rd-rn-rm-t32.cc
test-assembler-cond-rd-rn-t32.cc
test-assembler-cond-rd-sp-operand-imm8-t32.cc
test-assembler-cond-rdlow-operand-imm8-t32-in-it-block.cc
test-assembler-cond-rdlow-operand-imm8-t32.cc
test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm3-in-it-block.cc
test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm3.cc
test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm8-in-it-block.cc
test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm8.cc
test-assembler-cond-rdlow-rnlow-operand-immediate-t32-zero-in-it-block.cc
test-assembler-cond-rdlow-rnlow-operand-immediate-t32-zero.cc
test-assembler-cond-rdlow-rnlow-rmlow-t32-in-it-block.cc
test-assembler-cond-rdlow-rnlow-rmlow-t32.cc
test-assembler-cond-sp-sp-operand-imm7-t32.cc
test-assembler-rd-rn-rm-a32.cc
test-assembler-rd-rn-rm-t32.cc
test-disasm-a32.cc
test-simulator-cond-rd-memop-immediate-512-a32.cc
test-simulator-cond-rd-memop-immediate-8192-a32.cc
test-simulator-cond-rd-memop-rs-a32.cc
test-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc
test-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc
test-simulator-cond-rd-operand-const-a32.cc
test-simulator-cond-rd-operand-const-t32.cc
test-simulator-cond-rd-operand-imm16-t32.cc
test-simulator-cond-rd-operand-rn-a32.cc
test-simulator-cond-rd-operand-rn-ror-amount-a32.cc
test-simulator-cond-rd-operand-rn-ror-amount-t32.cc
test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc
test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc
test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc
test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc
test-simulator-cond-rd-operand-rn-shift-rs-a32.cc
test-simulator-cond-rd-operand-rn-shift-rs-t32.cc
test-simulator-cond-rd-operand-rn-t32.cc
test-simulator-cond-rd-rn-a32.cc
test-simulator-cond-rd-rn-operand-const-a32.cc
test-simulator-cond-rd-rn-operand-const-t32.cc
test-simulator-cond-rd-rn-operand-imm12-t32.cc
test-simulator-cond-rd-rn-operand-rm-a32.cc
test-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc
test-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc
test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc
test-simulator-cond-rd-rn-operand-rm-t32.cc
test-simulator-cond-rd-rn-rm-a32-ge.cc
test-simulator-cond-rd-rn-rm-a32-q.cc
test-simulator-cond-rd-rn-rm-a32-sel.cc
test-simulator-cond-rd-rn-rm-a32.cc
test-simulator-cond-rd-rn-rm-t32-ge.cc
test-simulator-cond-rd-rn-rm-t32-q.cc
test-simulator-cond-rd-rn-rm-t32-sel.cc
test-simulator-cond-rd-rn-rm-t32.cc
test-simulator-cond-rd-rn-t32.cc
test-simulator-cond-rdlow-operand-imm8-t32.cc
test-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc
test-simulator-cond-rdlow-rnlow-rmlow-t32.cc
test-simulator-rd-rn-rm-a32.cc
test-simulator-rd-rn-rm-t32.cc
test-utils-a32.cc
test-utils-a32.h