commit 00c8436195eed3fe7cdb41edbd5f65b26d3e1cc7
author Chia-I Wu <olv@lunarg.com> Thu Dec 11 10:14:40 2014 +0800
committer Courtney Goeltzenleuchter <courtney@LunarG.com> Wed Feb 04 17:58:04 2015 -0700
tree 00817e8cebf9888710dfddaa6dab3172dfe9461e
parent 33c6c507263ba499493b8e803ae809a2c1605dd2

intel: pass XGL_PIPELINE_SHADER to intel_pipeline_shader_compile()

We will need more than intel_ir, which is a part of XGL_PIPELINE_SHADER.

icd/intel/pipeline_shader.c

diff --git a/icd/intel/pipeline_shader.c b/icd/intel/pipeline_shader.c
index 0136786..6ce7910 100644
--- a/icd/intel/pipeline_shader.c
+++ b/icd/intel/pipeline_shader.c
@@ -279,8 +279,7 @@
 
     // Right here, lower the IR to ISA using NOS
     // This must be after assignment of pipeline constant buffer
-    ret = intel_pipeline_shader_compile(vs, pipeline->dev->gpu,
-            intel_shader(info->vs.shader)->ir);
+    ret = intel_pipeline_shader_compile(vs, pipeline->dev->gpu, &info->vs);
     if (ret != XGL_SUCCESS)
         return ret;
 
@@ -307,8 +306,7 @@
     struct intel_pipeline_shader *tcs = &pipeline->tcs;
     XGL_RESULT ret;
 
-    ret = intel_pipeline_shader_compile(tcs, pipeline->dev->gpu,
-            intel_shader(info->tcs.shader)->ir);
+    ret = intel_pipeline_shader_compile(tcs, pipeline->dev->gpu, &info->tcs);
     if (ret != XGL_SUCCESS)
         return ret;
 
@@ -325,8 +323,7 @@
     struct intel_pipeline_shader *tes = &pipeline->tes;
     XGL_RESULT ret;
 
-    ret = intel_pipeline_shader_compile(tes, pipeline->dev->gpu,
-            intel_shader(info->tes.shader)->ir);
+    ret = intel_pipeline_shader_compile(tes, pipeline->dev->gpu, &info->tes);
     if (ret != XGL_SUCCESS)
         return ret;
 
@@ -343,8 +340,7 @@
     struct intel_pipeline_shader *gs = &pipeline->gs;
     XGL_RESULT ret;
 
-    ret = intel_pipeline_shader_compile(gs, pipeline->dev->gpu,
-            intel_shader(info->gs.shader)->ir);
+    ret = intel_pipeline_shader_compile(gs, pipeline->dev->gpu, &info->gs);
     if (ret != XGL_SUCCESS)
         return ret;
 
@@ -387,8 +383,7 @@
 
     // Right here, lower the IR to ISA using NOS
     // This must be after assignment of pipeline constant buffer
-    ret = intel_pipeline_shader_compile(fs, pipeline->dev->gpu,
-            intel_shader(info->fs.shader)->ir);
+    ret = intel_pipeline_shader_compile(fs, pipeline->dev->gpu, &info->fs);
     if (ret != XGL_SUCCESS)
         return ret;
 
@@ -415,8 +410,7 @@
     struct intel_pipeline_shader *cs = &pipeline->cs;
     XGL_RESULT ret;
 
-    ret = intel_pipeline_shader_compile(cs, pipeline->dev->gpu,
-            intel_shader(info->compute.cs.shader)->ir);
+    ret = intel_pipeline_shader_compile(cs, pipeline->dev->gpu, &info->compute.cs);
     if (ret != XGL_SUCCESS)
         return ret;