commit 1586f6e12eb95d8b312e86cdf303436c69658de5
author Chia-I Wu <olvaffe@gmail.com> Sat Aug 30 15:28:35 2014 +0800
committer Chia-I Wu <olvaffe@gmail.com> Sat Aug 30 15:32:10 2014 +0800
tree aab49a249306d22d2f2a3074489fb7f6d2d051da
parent c3f9c099e8eba5f558200d89b9969a590d7acf3f

intel: correct non-MSAA sample position

icd/intel/state.c

diff --git a/icd/intel/state.c b/icd/intel/state.c
index 881e103..c1b0125 100644
--- a/icd/intel/state.c
+++ b/icd/intel/state.c
@@ -355,7 +355,6 @@
                 const XGL_MSAA_STATE_CREATE_INFO *info)
 {
     /* taken from Mesa */
-    static const uint32_t brw_multisample_positions_1x_2x = 0x0088cc44;
     static const uint32_t brw_multisample_positions_4x = 0xae2ae662;
     static const uint32_t brw_multisample_positions_8x[] = { 0xdbb39d79, 0x3ff55117 };
     uint32_t cmd, cmd_len;
@@ -375,7 +374,7 @@
     dw[0] = cmd | (cmd_len - 2);
     if (info->samples <= 1) {
         dw[1] = GEN6_MULTISAMPLE_DW1_NUMSAMPLES_1;
-        dw[2] = brw_multisample_positions_1x_2x;
+        dw[2] = 0;
     } else if (info->samples <= 4 || intel_gpu_gen(gpu) == INTEL_GEN(6)) {
         dw[1] = GEN6_MULTISAMPLE_DW1_NUMSAMPLES_4;
         dw[2] = brw_multisample_positions_4x;