intel: work around raw/structured buffers
The compiler supports only UBOs and the support is tricky. This should make
things work mostly, except when some array in the buffer is indexed by a
variable in FS.
diff --git a/icd/intel/view.c b/icd/intel/view.c
index e942853..a1bc9e7 100644
--- a/icd/intel/view.c
+++ b/icd/intel/view.c
@@ -1058,8 +1058,32 @@
struct intel_dev *dev,
const XGL_MEMORY_VIEW_ATTACH_INFO *info)
{
+ XGL_FORMAT format;
+ XGL_GPU_SIZE stride;
bool will_write;
+ if (icd_format_is_undef(info->format)) {
+ /*
+ * The compiler does not support raw/structured buffers. It always
+ * generates oword (dual) block read or ld. The use of ld in this
+ * case is an issue. Firstly, it expects the channel format to be
+ * XGL_CH_FMT_R32G32B32A32. This we can do. But it also expects the
+ * stride to be 16 for VS and 4 for FS. We have to break either of
+ * them.
+ */
+ format.channelFormat = XGL_CH_FMT_R32G32B32A32;
+ format.numericFormat = XGL_NUM_FMT_FLOAT;
+ stride = 16;
+ } else {
+ format = info->format;
+ stride = icd_format_get_size(format);
+
+ if (info->stride != stride) {
+ intel_dev_log(dev, XGL_DBG_MSG_WARNING, XGL_VALIDATION_LEVEL_0,
+ XGL_NULL_HANDLE, 0, 0, "invalid stride for typed buffer");
+ }
+ }
+
switch (info->state) {
case XGL_MEMORY_STATE_GRAPHICS_SHADER_WRITE_ONLY:
case XGL_MEMORY_STATE_GRAPHICS_SHADER_READ_WRITE:
@@ -1077,12 +1101,12 @@
if (intel_gpu_gen(dev->gpu) >= INTEL_GEN(7)) {
surface_state_buf_gen7(dev->gpu, info->offset,
- info->range, info->stride, info->format,
+ info->range, stride, format,
will_write, will_write, view->cmd);
view->cmd_len = 8;
} else {
surface_state_buf_gen6(dev->gpu, info->offset,
- info->range, info->stride, info->format,
+ info->range, stride, format,
will_write, will_write, view->cmd);
view->cmd_len = 6;
}