commit 5bdb096ea3f2f5e6d80533746128c8bc9ad5ca0a
author Chia-I Wu <olv@lunarg.com> Sat Jan 24 12:49:28 2015 +0800
committer Courtney Goeltzenleuchter <courtney@LunarG.com> Wed Feb 04 17:58:09 2015 -0700
tree 88517528cb2ec159a9a67e0b7eaac242a8176e10
parent 5a054a672a6ea0ae52546680b547fd594f3d2524

intel: fix DEPTH_STENCIL_STATE on Gen6

pipeline_build_depth_stencil() should be called on all Gens.

icd/intel/pipeline.c

diff --git a/icd/intel/pipeline.c b/icd/intel/pipeline.c
index 067be2f..f4cd5a2 100644
--- a/icd/intel/pipeline.c
+++ b/icd/intel/pipeline.c
@@ -1207,6 +1207,7 @@
     pipeline_build_vertex_elements(pipeline, info);
     pipeline_build_fragment_SBE(pipeline);
     pipeline_build_msaa(pipeline, info);
+    pipeline_build_depth_stencil(pipeline, info);
 
     if (intel_gpu_gen(pipeline->dev->gpu) >= INTEL_GEN(7)) {
         pipeline_build_urb_alloc_gen7(pipeline, info);
@@ -1215,7 +1216,6 @@
         pipeline_build_hs(pipeline, info);
         pipeline_build_te(pipeline, info);
         pipeline_build_ds(pipeline, info);
-        pipeline_build_depth_stencil(pipeline, info);
 
         pipeline->wa_flags = INTEL_CMD_WA_GEN6_PRE_DEPTH_STALL_WRITE |
                              INTEL_CMD_WA_GEN6_PRE_COMMAND_SCOREBOARD_STALL |