intel: remove unused members in intel_pipe_shader

This reverts 650983f049d782449b3b693da9eb5761c25dcb47 and more effectively.

The plan seems to be to emit 3DSTATE_GS and the like from cmd_pipeline.c,
without PSO doing any work.  Then intel_shader_cso should not exist, because
its purpose is for PSO to have partially initialized 3DSTATE_GS and
etc.

gen7_emit_3DSTATE_GS() is actually doing nothing because it uses
intel_shader_cso and nobody sets up intel_shader_cso.  Make it clear it does
nothing.
diff --git a/icd/intel/cmd_pipeline.c b/icd/intel/cmd_pipeline.c
index 58b6d5d..e544190 100644
--- a/icd/intel/cmd_pipeline.c
+++ b/icd/intel/cmd_pipeline.c
@@ -275,10 +275,9 @@
     cmd_batch_reloc(cmd, end_offset, mem->bo, 0);
 }
 
-static inline void
-gen75_3DSTATE_VF(struct intel_cmd *cmd,
-                 bool enable_cut_index,
-                 uint32_t cut_index)
+static void gen75_3DSTATE_VF(struct intel_cmd *cmd,
+                             bool enable_cut_index,
+                             uint32_t cut_index)
 {
     const uint8_t cmd_len = 2;
     uint32_t dw0;
@@ -294,6 +293,25 @@
     cmd_batch_write(cmd, cut_index);
 }
 
+static void gen7_3DSTATE_GS(struct intel_cmd *cmd)
+{
+    const uint8_t cmd_len = 7;
+    const uint32_t dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_GS) | (cmd_len - 2);
+
+    CMD_ASSERT(cmd, 7, 7.5);
+
+    assert(cmd->bind.gs.shader == NULL);
+
+    cmd_batch_reserve(cmd, cmd_len);
+    cmd_batch_write(cmd, dw0);
+    cmd_batch_write(cmd, 0);
+    cmd_batch_write(cmd, 0);
+    cmd_batch_write(cmd, 0);
+    cmd_batch_write(cmd, 0);
+    cmd_batch_write(cmd, GEN6_GS_DW5_STATISTICS);
+    cmd_batch_write(cmd, 0);
+}
+
 static void gen6_3DSTATE_DRAWING_RECTANGLE(struct intel_cmd *cmd,
                                            XGL_UINT width, XGL_UINT height)
 {
@@ -993,47 +1011,6 @@
     cmd_batch_write_n(cmd, msaa->cmd, msaa->cmd_len);
 }
 
-static void
-gen7_emit_3DSTATE_GS(struct intel_cmd *cmd)
-{
-    const uint8_t cmd_len = 7;
-    const uint32_t dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_GS) | (cmd_len - 2);
-    const struct intel_shader_cso *cso;
-    uint32_t dw2, dw4, dw5;
-
-    CMD_ASSERT(cmd, 7, 7.5);
-
-    if (cmd->bind.gs.shader == NULL) {
-        cmd_batch_reserve(cmd, cmd_len);
-        cmd_batch_write(cmd, dw0);
-        cmd_batch_write(cmd, 0);
-        cmd_batch_write(cmd, 0);
-        cmd_batch_write(cmd, 0);
-        cmd_batch_write(cmd, 0);
-        cmd_batch_write(cmd, GEN6_GS_DW5_STATISTICS);
-        cmd_batch_write(cmd, 0);
-        return;
-    }
-
-    cso = &cmd->bind.gs.shader->cso;
-    dw2 = cso->payload[0];
-    dw4 = cso->payload[1];
-    dw5 = cso->payload[2];
-
-    // TODO: This should come from genhw.h
-# define GEN6_GS_SAMPLER_COUNT_SHIFT			27
-    dw2 |= ((cmd->bind.gs.shader->num_samplers + 3) / 4) << GEN6_GS_SAMPLER_COUNT_SHIFT;
-
-    cmd_batch_reserve(cmd, cmd_len);
-    cmd_batch_write(cmd, dw0);
-    cmd_batch_write(cmd, cmd->bind.gs.kernel_pos);
-    cmd_batch_write(cmd, dw2);
-    cmd_batch_write(cmd, 0); /* scratch */
-    cmd_batch_write(cmd, dw4);
-    cmd_batch_write(cmd, dw5);
-    cmd_batch_write(cmd, 0);
-}
-
 static void emit_shader(struct intel_cmd *cmd,
                         const struct intel_pipe_shader *shader,
                         struct intel_cmd_shader *pCmdShader)
@@ -1120,7 +1097,7 @@
         emit_shader(cmd, &pipeline->tess_eval, &cmd->bind.tess_eval);
     }
 
-    gen7_emit_3DSTATE_GS(cmd);
+    gen7_3DSTATE_GS(cmd);
 
     if (pipeline->post_pso_wa_flags & GEN6_WA_POST_SYNC_FLUSH) {
         gen6_wa_post_sync_flush(cmd);