commit | 6ac9399b7d9ecf3a4431930880d69ef5ea3a2080 | [log] [tgz] |
---|---|---|
author | Chia-I Wu <olvaffe@gmail.com> | Sat Aug 30 18:23:28 2014 +0800 |
committer | Chia-I Wu <olvaffe@gmail.com> | Sat Aug 30 18:23:28 2014 +0800 |
tree | 2b81da68bfb39b37ef17d99b5d4078c14f469017 | |
parent | 1586f6e12eb95d8b312e86cdf303436c69658de5 [diff] [blame] |
intel: honor image tiling request
diff --git a/icd/intel/layout.c b/icd/intel/layout.c index 51bbd1c..f1894d4 100644 --- a/icd/intel/layout.c +++ b/icd/intel/layout.c
@@ -462,6 +462,9 @@ const XGL_FORMAT format = layout->format; unsigned valid_tilings = LAYOUT_TILING_ALL; + if (info->tiling == XGL_LINEAR_TILING) + valid_tilings &= LAYOUT_TILING_NONE; + /* * From the Sandy Bridge PRM, volume 2 part 1, page 318: *