commit b93427cf68ff3e8bde88e0f89379cc56a32fcd2c
author Courtney Goeltzenleuchter <courtney@LunarG.com> Thu Oct 15 16:57:32 2015 -0600
committer Courtney Goeltzenleuchter <courtney@LunarG.com> Fri Oct 23 17:31:14 2015 -0600
tree 51f5499041db7261100c13f445ad850fde01af23
parent c6fd2263876bb25d6ab7f2bfb76e6eab7b0d8053

bug-14084: Replace abbreviations in VkQueryPipelineStatisticFlags

icd/intel/query.c

diff --git a/icd/intel/query.c b/icd/intel/query.c
index 11506e6..ddcef73 100644
--- a/icd/intel/query.c
+++ b/icd/intel/query.c
@@ -47,16 +47,16 @@
      * Note: order defined by Vulkan spec.
      */
     const uint32_t regs[][2] = {
-        {VK_QUERY_PIPELINE_STATISTIC_IA_PRIMITIVES_BIT, GEN6_REG_IA_PRIMITIVES_COUNT},
-        {VK_QUERY_PIPELINE_STATISTIC_VS_INVOCATIONS_BIT, GEN6_REG_VS_INVOCATION_COUNT},
-        {VK_QUERY_PIPELINE_STATISTIC_GS_INVOCATIONS_BIT, GEN6_REG_GS_INVOCATION_COUNT},
-        {VK_QUERY_PIPELINE_STATISTIC_GS_PRIMITIVES_BIT, GEN6_REG_GS_PRIMITIVES_COUNT},
-        {VK_QUERY_PIPELINE_STATISTIC_C_INVOCATIONS_BIT, GEN6_REG_CL_INVOCATION_COUNT},
-        {VK_QUERY_PIPELINE_STATISTIC_C_PRIMITIVES_BIT, GEN6_REG_CL_PRIMITIVES_COUNT},
-        {VK_QUERY_PIPELINE_STATISTIC_FS_INVOCATIONS_BIT, GEN6_REG_PS_INVOCATION_COUNT},
-        {VK_QUERY_PIPELINE_STATISTIC_TCS_PATCHES_BIT, (intel_gpu_gen(dev->gpu) >= INTEL_GEN(7)) ? GEN7_REG_HS_INVOCATION_COUNT : 0},
-        {VK_QUERY_PIPELINE_STATISTIC_TES_INVOCATIONS_BIT, (intel_gpu_gen(dev->gpu) >= INTEL_GEN(7)) ? GEN7_REG_DS_INVOCATION_COUNT : 0},
-        {VK_QUERY_PIPELINE_STATISTIC_CS_INVOCATIONS_BIT, 0}
+        {VK_QUERY_PIPELINE_STATISTIC_INPUT_ASSEMBLY_PRIMITIVES_BIT, GEN6_REG_IA_PRIMITIVES_COUNT},
+        {VK_QUERY_PIPELINE_STATISTIC_VERTEX_SHADER_INVOCATIONS_BIT, GEN6_REG_VS_INVOCATION_COUNT},
+        {VK_QUERY_PIPELINE_STATISTIC_GEOMETRY_SHADER_INVOCATIONS_BIT, GEN6_REG_GS_INVOCATION_COUNT},
+        {VK_QUERY_PIPELINE_STATISTIC_GEOMETRY_SHADER_PRIMITIVES_BIT, GEN6_REG_GS_PRIMITIVES_COUNT},
+        {VK_QUERY_PIPELINE_STATISTIC_CLIPPING_INVOCATIONS_BIT, GEN6_REG_CL_INVOCATION_COUNT},
+        {VK_QUERY_PIPELINE_STATISTIC_CLIPPING_PRIMITIVES_BIT, GEN6_REG_CL_PRIMITIVES_COUNT},
+        {VK_QUERY_PIPELINE_STATISTIC_FRAGMENT_SHADER_INVOCATIONS_BIT, GEN6_REG_PS_INVOCATION_COUNT},
+        {VK_QUERY_PIPELINE_STATISTIC_TESSELLATION_CONTROL_SHADER_PATCHES_BIT, (intel_gpu_gen(dev->gpu) >= INTEL_GEN(7)) ? GEN7_REG_HS_INVOCATION_COUNT : 0},
+        {VK_QUERY_PIPELINE_STATISTIC_TESSELLATION_EVALUATION_SHADER_INVOCATIONS_BIT, (intel_gpu_gen(dev->gpu) >= INTEL_GEN(7)) ? GEN7_REG_DS_INVOCATION_COUNT : 0},
+        {VK_QUERY_PIPELINE_STATISTIC_COMPUTE_SHADER_INVOCATIONS_BIT, 0}
     };
     STATIC_ASSERT(ARRAY_SIZE(regs) < 32);
     uint32_t i;