intel: allow depthWriteEnable to be independently enabled
When depthTestEnable is false, the hardware works as if the depth test always
passes and depthWriteEnable can still be honored. It is unclear what the API
intends to do, but let's follow the hardware for now.
diff --git a/icd/intel/state.c b/icd/intel/state.c
index ad5e3d8..fb56186 100644
--- a/icd/intel/state.c
+++ b/icd/intel/state.c
@@ -535,13 +535,15 @@
* TODO We do not check these yet.
*/
if (info->depthTestEnable) {
- dw[2] = 1 << 31 |
- translate_compare_func(info->depthFunc) << 27 |
- (bool) info->depthWriteEnable << 26;
+ dw[2] = GEN6_ZS_DW2_DEPTH_TEST_ENABLE |
+ translate_compare_func(info->depthFunc) << 27;
} else {
dw[2] = GEN6_COMPAREFUNCTION_ALWAYS << 27;
}
+ if (info->depthWriteEnable)
+ dw[2] |= GEN6_ZS_DW2_DEPTH_WRITE_ENABLE;
+
return XGL_SUCCESS;
}