commit e2d07a5a3810d83d0ea7ecb396d61477893b74a4
author Mark Lobodzinski <mark@lunarg.com> Thu Jan 29 08:55:56 2015 -0600
committer Courtney Goeltzenleuchter <courtney@LunarG.com> Wed Feb 04 17:58:10 2015 -0700
tree 2fee3cac3c0ee07e3e6245e215247d133482245a
parent 744fdea4179c49dc6a24c21e15818a2f3e8b36b7

xgl:  Remove XGL_* typedef wrappers

Part of moving to xgl.h rev#38, svn rev 29293-29302

icd/intel/pipeline.c

diff --git a/icd/intel/pipeline.c b/icd/intel/pipeline.c
index db571f7..b1d5cc4 100644
--- a/icd/intel/pipeline.c
+++ b/icd/intel/pipeline.c
@@ -409,7 +409,7 @@
 }
 
 static XGL_RESULT pipeline_get_info(struct intel_base *base, int type,
-                                    XGL_SIZE *size, XGL_VOID *data)
+                                    size_t *size, void *data)
 {
     struct intel_pipeline *pipeline = intel_pipeline_from_base(base);
     XGL_RESULT ret = XGL_SUCCESS;
@@ -737,7 +737,7 @@
     const struct intel_pipeline_shader *vs = &pipeline->vs;
     uint8_t cmd_len;
     uint32_t *dw;
-    XGL_UINT i;
+    uint32_t i;
     int comps[4];
 
     INTEL_GPU_ASSERT(pipeline->dev->gpu, 6, 7.5);
@@ -818,9 +818,9 @@
     const struct intel_pipeline_shader *vs = &pipeline->vs;
     uint8_t cmd_len;
     uint32_t *body;
-    XGL_UINT attr_skip, attr_count;
-    XGL_UINT vue_offset, vue_len;
-    XGL_UINT i;
+    uint32_t attr_skip, attr_count;
+    uint32_t vue_offset, vue_len;
+    uint32_t i;
 
     INTEL_GPU_ASSERT(pipeline->dev->gpu, 6, 7.5);
 
@@ -865,8 +865,8 @@
           vue_offset << GEN7_SBE_DW1_URB_READ_OFFSET__SHIFT;
 
     uint16_t vs_slot[fs->in_count];
-    XGL_INT fs_in = 0;
-    XGL_INT vs_out = - (vue_offset * 2 - vs->outputs_offset);
+    int32_t fs_in = 0;
+    int32_t vs_out = - (vue_offset * 2 - vs->outputs_offset);
     for (i=0; i < 64; i++) {
         bool vsWrites = vs->outputs_written & (1L << i);
         bool fsReads  = fs->inputs_read     & (1L << i);
@@ -1112,7 +1112,7 @@
 static void pipeline_build_cb(struct intel_pipeline *pipeline,
                               const struct intel_pipeline_create_info *info)
 {
-    XGL_UINT i;
+    uint32_t i;
 
     INTEL_GPU_ASSERT(pipeline->dev->gpu, 6, 7.5);
     STATIC_ASSERT(ARRAY_SIZE(pipeline->cmd_cb) >= INTEL_MAX_RENDER_TARGETS*2);
@@ -1281,7 +1281,7 @@
 
     while (header) {
         const void *src = (const void *) header;
-        XGL_SIZE size;
+        size_t size;
         void *dst;
 
         switch (header->struct_type) {
@@ -1424,16 +1424,16 @@
 
 ICD_EXPORT XGL_RESULT XGLAPI xglStorePipeline(
     XGL_PIPELINE                                pipeline,
-    XGL_SIZE*                                   pDataSize,
-    XGL_VOID*                                   pData)
+    size_t*                                     pDataSize,
+    void*                                       pData)
 {
     return XGL_ERROR_UNAVAILABLE;
 }
 
 ICD_EXPORT XGL_RESULT XGLAPI xglLoadPipeline(
     XGL_DEVICE                                  device,
-    XGL_SIZE                                    dataSize,
-    const XGL_VOID*                             pData,
+    size_t                                    dataSize,
+    const void*                                 pData,
     XGL_PIPELINE*                               pPipeline)
 {
     return XGL_ERROR_UNAVAILABLE;