intel: rename intel_pipe_shader to intel_pipeline_shader
It is initialized from XGL_PIPELINE_SHADER, and we already use intel_pipeline
for XGL_PIPELINE.
diff --git a/icd/intel/cmd.h b/icd/intel/cmd.h
index 1513448..9bdad9a 100644
--- a/icd/intel/cmd.h
+++ b/icd/intel/cmd.h
@@ -34,6 +34,7 @@
#include "view.h"
struct intel_pipeline;
+struct intel_pipeline_shader;
struct intel_pipeline_delta;
struct intel_viewport_state;
struct intel_raster_state;
@@ -41,7 +42,6 @@
struct intel_blend_state;
struct intel_ds_state;
struct intel_dset;
-struct intel_pipe_shader;
struct intel_cmd_reloc;
@@ -119,7 +119,7 @@
};
struct intel_cmd_shader {
- const struct intel_pipe_shader *shader;
+ const struct intel_pipeline_shader *shader;
XGL_UINT kernel_pos;
};
diff --git a/icd/intel/cmd_pipeline.c b/icd/intel/cmd_pipeline.c
index 2f8b5eb..d8977ed 100644
--- a/icd/intel/cmd_pipeline.c
+++ b/icd/intel/cmd_pipeline.c
@@ -434,8 +434,8 @@
static void gen7_fill_3DSTATE_SBE_body(const struct intel_cmd *cmd,
uint32_t body[13])
{
- const struct intel_pipe_shader *vs = &cmd->bind.pipeline.graphics->vs;
- const struct intel_pipe_shader *fs = &cmd->bind.pipeline.graphics->fs;
+ const struct intel_pipeline_shader *vs = &cmd->bind.pipeline.graphics->vs;
+ const struct intel_pipeline_shader *fs = &cmd->bind.pipeline.graphics->fs;
XGL_UINT attr_skip, attr_count;
XGL_UINT vue_offset, vue_len;
XGL_UINT i;
@@ -541,7 +541,7 @@
const uint32_t dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_CLIP) |
(cmd_len - 2);
const struct intel_pipeline *pipeline = cmd->bind.pipeline.graphics;
- const struct intel_pipe_shader *fs = &pipeline->fs;
+ const struct intel_pipeline_shader *fs = &pipeline->fs;
const struct intel_viewport_state *viewport = cmd->bind.state.viewport;
const struct intel_raster_state *raster = cmd->bind.state.raster;
uint32_t dw1, dw2, dw3;
@@ -590,7 +590,7 @@
{
const int max_threads = (cmd->dev->gpu->gt == 2) ? 80 : 40;
const struct intel_pipeline *pipeline = cmd->bind.pipeline.graphics;
- const struct intel_pipe_shader *fs = &pipeline->fs;
+ const struct intel_pipeline_shader *fs = &pipeline->fs;
const struct intel_msaa_state *msaa = cmd->bind.state.msaa;
const uint8_t cmd_len = 9;
uint32_t dw0, dw2, dw4, dw5, dw6;
@@ -654,7 +654,7 @@
static void gen7_3DSTATE_WM(struct intel_cmd *cmd)
{
const struct intel_pipeline *pipeline = cmd->bind.pipeline.graphics;
- const struct intel_pipe_shader *fs = &pipeline->fs;
+ const struct intel_pipeline_shader *fs = &pipeline->fs;
const struct intel_msaa_state *msaa = cmd->bind.state.msaa;
const uint8_t cmd_len = 3;
uint32_t dw0, dw1, dw2;
@@ -699,7 +699,7 @@
static void gen7_3DSTATE_PS(struct intel_cmd *cmd)
{
const struct intel_pipeline *pipeline = cmd->bind.pipeline.graphics;
- const struct intel_pipe_shader *fs = &pipeline->fs;
+ const struct intel_pipeline_shader *fs = &pipeline->fs;
const struct intel_msaa_state *msaa = cmd->bind.state.msaa;
const uint8_t cmd_len = 8;
uint32_t dw0, dw2, dw4, dw5;
@@ -1354,7 +1354,7 @@
}
static void gen6_pcb(struct intel_cmd *cmd, int subop,
- const struct intel_pipe_shader *sh)
+ const struct intel_pipeline_shader *sh)
{
const uint8_t cmd_len = 5;
/*
@@ -1399,7 +1399,7 @@
}
static void gen7_pcb(struct intel_cmd *cmd, int subop,
- const struct intel_pipe_shader *sh)
+ const struct intel_pipeline_shader *sh)
{
const uint8_t cmd_len = 7;
const uint32_t dw0 = GEN6_RENDER_TYPE_RENDER |
@@ -1638,7 +1638,7 @@
}
static void emit_shader(struct intel_cmd *cmd,
- const struct intel_pipe_shader *shader,
+ const struct intel_pipeline_shader *shader,
struct intel_cmd_shader *pCmdShader)
{
uint32_t i;
diff --git a/icd/intel/pipeline.h b/icd/intel/pipeline.h
index 88eace5..761d9bd 100644
--- a/icd/intel/pipeline.h
+++ b/icd/intel/pipeline.h
@@ -80,7 +80,9 @@
#define SHADER_FRAGMENT_FLAG (1 << XGL_SHADER_STAGE_FRAGMENT)
#define SHADER_COMPUTE_FLAG (1 << XGL_SHADER_STAGE_COMPUTE)
-struct intel_pipe_shader {
+struct intel_pipeline_shader {
+ /* this is not an intel_obj */
+
void *pCode;
uint32_t codeSize;
@@ -160,12 +162,12 @@
XGL_PIPELINE_TESS_STATE_CREATE_INFO tess_state;
uint32_t active_shaders;
- struct intel_pipe_shader vs;
- struct intel_pipe_shader tess_control;
- struct intel_pipe_shader tess_eval;
- struct intel_pipe_shader gs;
- struct intel_pipe_shader fs;
- struct intel_pipe_shader compute;
+ struct intel_pipeline_shader vs;
+ struct intel_pipeline_shader tess_control;
+ struct intel_pipeline_shader tess_eval;
+ struct intel_pipeline_shader gs;
+ struct intel_pipeline_shader fs;
+ struct intel_pipeline_shader compute;
uint32_t wa_flags;
@@ -214,4 +216,5 @@
XGL_PIPELINE p1,
XGL_PIPELINE p2,
XGL_PIPELINE_DELTA* delta);
-#endif // PIPELINE_H
+
+#endif /* PIPELINE_H */
diff --git a/icd/intel/pipeline_rmap.c b/icd/intel/pipeline_rmap.c
index f4b9a0c..dcb390b 100644
--- a/icd/intel/pipeline_rmap.c
+++ b/icd/intel/pipeline_rmap.c
@@ -256,7 +256,7 @@
return rmap;
}
-static XGL_RESULT pipeline_shader_copy_pcb(struct intel_pipe_shader *sh,
+static XGL_RESULT pipeline_shader_copy_pcb(struct intel_pipeline_shader *sh,
const XGL_LINK_CONST_BUFFER *buffers,
XGL_UINT buffer_count)
{
@@ -290,7 +290,7 @@
return XGL_SUCCESS;
}
-static XGL_RESULT pipeline_shader_copy_ir(struct intel_pipe_shader *sh,
+static XGL_RESULT pipeline_shader_copy_ir(struct intel_pipeline_shader *sh,
const struct intel_shader *ir)
{
sh->pCode = icd_alloc(ir->ir->size, 0, XGL_SYSTEM_ALLOC_INTERNAL_SHADER);
@@ -316,7 +316,7 @@
static XGL_RESULT pipeline_build_vs(struct intel_pipeline *pipeline,
const struct intel_pipeline_create_info *info)
{
- struct intel_pipe_shader *vs = &pipeline->vs;
+ struct intel_pipeline_shader *vs = &pipeline->vs;
XGL_RESULT ret;
ret = pipeline_shader_copy_ir(vs, intel_shader(info->vs.shader));
@@ -347,7 +347,7 @@
static XGL_RESULT pipeline_build_tcs(struct intel_pipeline *pipeline,
const struct intel_pipeline_create_info *info)
{
- struct intel_pipe_shader *tcs = &pipeline->tess_control;
+ struct intel_pipeline_shader *tcs = &pipeline->tess_control;
XGL_RESULT ret;
ret = pipeline_shader_copy_ir(tcs, intel_shader(info->tcs.shader));
@@ -369,7 +369,7 @@
static XGL_RESULT pipeline_build_tes(struct intel_pipeline *pipeline,
const struct intel_pipeline_create_info *info)
{
- struct intel_pipe_shader *tes = &pipeline->tess_eval;
+ struct intel_pipeline_shader *tes = &pipeline->tess_eval;
XGL_RESULT ret;
ret = pipeline_shader_copy_ir(tes, intel_shader(info->tes.shader));
@@ -391,7 +391,7 @@
static XGL_RESULT pipeline_build_gs(struct intel_pipeline *pipeline,
const struct intel_pipeline_create_info *info)
{
- struct intel_pipe_shader *gs = &pipeline->gs;
+ struct intel_pipeline_shader *gs = &pipeline->gs;
XGL_RESULT ret;
ret = pipeline_shader_copy_ir(gs, intel_shader(info->gs.shader));
@@ -413,7 +413,7 @@
static XGL_RESULT pipeline_build_fs(struct intel_pipeline *pipeline,
const struct intel_pipeline_create_info *info)
{
- struct intel_pipe_shader *fs = &pipeline->fs;
+ struct intel_pipeline_shader *fs = &pipeline->fs;
XGL_RESULT ret;
ret = pipeline_shader_copy_ir(fs, intel_shader(info->fs.shader));
@@ -445,7 +445,7 @@
static XGL_RESULT pipeline_build_cs(struct intel_pipeline *pipeline,
const struct intel_pipeline_create_info *info)
{
- struct intel_pipe_shader *cs = &pipeline->compute;
+ struct intel_pipeline_shader *cs = &pipeline->compute;
XGL_RESULT ret;
ret = pipeline_shader_copy_ir(cs, intel_shader(info->compute.cs.shader));
@@ -486,7 +486,7 @@
return ret;
}
-static void pipeline_tear_shader(struct intel_pipe_shader *sh)
+static void pipeline_tear_shader(struct intel_pipeline_shader *sh)
{
icd_free(sh->pCode);
if (sh->pcb)