intel: honor 64KB limit of BINDING_TABLE_STATEs
The higher 16 bits of binding table offset in 3DSTATE_BINDING_TABLE_POINTERS_x
must be 0. BINDING_TABLE_STATEs must reside in the first 64KB of Surface
State Base Address as programmed by STATE_BASE_ADDRESS.
In this commit, we update Surface State Base Address when there is a chance to
exceed the limit.
diff --git a/icd/intel/cmd.c b/icd/intel/cmd.c
index 47f8629..7b23145 100644
--- a/icd/intel/cmd.c
+++ b/icd/intel/cmd.c
@@ -55,6 +55,8 @@
writer->used = 0;
+ writer->sba_offset = 0;
+
if (writer->items) {
icd_free(writer->items);
writer->items = NULL;