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Chia-I Wub2755562014-08-20 13:38:52 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
Chia-I Wu9f039862014-08-20 15:39:56 +080025#include "genhw/genhw.h"
Chia-I Wub2755562014-08-20 13:38:52 +080026#include "dset.h"
27#include "mem.h"
28#include "state.h"
29#include "view.h"
30#include "cmd_priv.h"
31
32XGL_VOID XGLAPI intelCmdBindPipeline(
33 XGL_CMD_BUFFER cmdBuffer,
34 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
35 XGL_PIPELINE pipeline)
36{
37 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
38
39 switch (pipelineBindPoint) {
40 case XGL_PIPELINE_BIND_POINT_COMPUTE:
41 cmd->bind.pipeline.compute = pipeline;
42 break;
43 case XGL_PIPELINE_BIND_POINT_GRAPHICS:
44 cmd->bind.pipeline.graphics = pipeline;
45 break;
46 default:
47 break;
48 }
49}
50
51XGL_VOID XGLAPI intelCmdBindPipelineDelta(
52 XGL_CMD_BUFFER cmdBuffer,
53 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
54 XGL_PIPELINE_DELTA delta)
55{
56 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
57
58 switch (pipelineBindPoint) {
59 case XGL_PIPELINE_BIND_POINT_COMPUTE:
60 cmd->bind.pipeline.compute_delta = delta;
61 break;
62 case XGL_PIPELINE_BIND_POINT_GRAPHICS:
63 cmd->bind.pipeline.graphics_delta = delta;
64 break;
65 default:
66 break;
67 }
68}
69
70XGL_VOID XGLAPI intelCmdBindStateObject(
71 XGL_CMD_BUFFER cmdBuffer,
72 XGL_STATE_BIND_POINT stateBindPoint,
73 XGL_STATE_OBJECT state)
74{
75 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
76
77 switch (stateBindPoint) {
78 case XGL_STATE_BIND_VIEWPORT:
79 cmd->bind.state.viewport =
80 intel_viewport_state((XGL_VIEWPORT_STATE_OBJECT) state);
81 break;
82 case XGL_STATE_BIND_RASTER:
83 cmd->bind.state.raster =
84 intel_raster_state((XGL_RASTER_STATE_OBJECT) state);
85 break;
86 case XGL_STATE_BIND_DEPTH_STENCIL:
87 cmd->bind.state.ds =
88 intel_ds_state((XGL_DEPTH_STENCIL_STATE_OBJECT) state);
89 break;
90 case XGL_STATE_BIND_COLOR_BLEND:
91 cmd->bind.state.blend =
92 intel_blend_state((XGL_COLOR_BLEND_STATE_OBJECT) state);
93 break;
94 case XGL_STATE_BIND_MSAA:
95 cmd->bind.state.msaa =
96 intel_msaa_state((XGL_MSAA_STATE_OBJECT) state);
97 break;
98 default:
99 break;
100 }
101}
102
103XGL_VOID XGLAPI intelCmdBindDescriptorSet(
104 XGL_CMD_BUFFER cmdBuffer,
105 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
106 XGL_UINT index,
107 XGL_DESCRIPTOR_SET descriptorSet,
108 XGL_UINT slotOffset)
109{
110 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
111 struct intel_dset *dset = intel_dset(descriptorSet);
112
113 assert(!index);
114
115 switch (pipelineBindPoint) {
116 case XGL_PIPELINE_BIND_POINT_COMPUTE:
117 cmd->bind.dset.compute = dset;
118 cmd->bind.dset.compute_offset = slotOffset;
119 break;
120 case XGL_PIPELINE_BIND_POINT_GRAPHICS:
121 cmd->bind.dset.graphics = dset;
122 cmd->bind.dset.graphics_offset = slotOffset;
123 break;
124 default:
125 break;
126 }
127}
128
129XGL_VOID XGLAPI intelCmdBindDynamicMemoryView(
130 XGL_CMD_BUFFER cmdBuffer,
131 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
132 const XGL_MEMORY_VIEW_ATTACH_INFO* pMemView)
133{
134 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
135
136 switch (pipelineBindPoint) {
137 case XGL_PIPELINE_BIND_POINT_COMPUTE:
138 intel_mem_view_init(&cmd->bind.mem_view.compute, cmd->dev, pMemView);
139 break;
140 case XGL_PIPELINE_BIND_POINT_GRAPHICS:
141 intel_mem_view_init(&cmd->bind.mem_view.graphics, cmd->dev, pMemView);
142 break;
143 default:
144 break;
145 }
146}
147
Chia-I Wu9f039862014-08-20 15:39:56 +0800148static void gen6_3DSTATE_INDEX_BUFFER(struct intel_cmd *cmd,
149 struct intel_mem *mem,
150 XGL_GPU_SIZE offset,
151 XGL_INDEX_TYPE type,
152 bool enable_cut_index)
153{
154 const uint8_t cmd_len = 3;
155 uint32_t dw0, end_offset;
156 unsigned offset_align;
157
158 CMD_ASSERT(cmd, 6, 7.5);
159
160 dw0 = GEN_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2);
161
162 /* the bit is moved to 3DSTATE_VF */
163 if (cmd_gen(cmd) >= INTEL_GEN(7.5))
164 assert(!enable_cut_index);
165 if (enable_cut_index)
166 dw0 |= GEN6_IB_DW0_CUT_INDEX_ENABLE;
167
168 switch (type) {
169 case XGL_INDEX_8:
170 dw0 |= GEN6_IB_DW0_FORMAT_BYTE;
171 offset_align = 1;
172 break;
173 case XGL_INDEX_16:
174 dw0 |= GEN6_IB_DW0_FORMAT_WORD;
175 offset_align = 2;
176 break;
177 case XGL_INDEX_32:
178 dw0 |= GEN6_IB_DW0_FORMAT_DWORD;
179 offset_align = 4;
180 break;
181 default:
182 cmd->result = XGL_ERROR_INVALID_VALUE;
183 return;
184 break;
185 }
186
187 if (offset % offset_align) {
188 cmd->result = XGL_ERROR_INVALID_VALUE;
189 return;
190 }
191
192 /* aligned and inclusive */
193 end_offset = mem->size - (mem->size % offset_align) - 1;
194
195 cmd_reserve(cmd, cmd_len);
196 cmd_write(cmd, dw0);
197 cmd_write_r(cmd, offset, mem, INTEL_DOMAIN_VERTEX, 0);
198 cmd_write_r(cmd, end_offset, mem, INTEL_DOMAIN_VERTEX, 0);
199}
200
Chia-I Wub2755562014-08-20 13:38:52 +0800201XGL_VOID XGLAPI intelCmdBindIndexData(
202 XGL_CMD_BUFFER cmdBuffer,
203 XGL_GPU_MEMORY mem_,
204 XGL_GPU_SIZE offset,
205 XGL_INDEX_TYPE indexType)
206{
207 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
208 struct intel_mem *mem = intel_mem(mem_);
209
Chia-I Wu9f039862014-08-20 15:39:56 +0800210 if (cmd_gen(cmd) >= INTEL_GEN(7.5)) {
211 gen6_3DSTATE_INDEX_BUFFER(cmd, mem, offset, indexType, false);
212 } else {
213 cmd->bind.index.mem = mem;
214 cmd->bind.index.offset = offset;
215 cmd->bind.index.type = indexType;
216 }
Chia-I Wub2755562014-08-20 13:38:52 +0800217}
218
219XGL_VOID XGLAPI intelCmdBindAttachments(
220 XGL_CMD_BUFFER cmdBuffer,
221 XGL_UINT colorAttachmentCount,
222 const XGL_COLOR_ATTACHMENT_BIND_INFO* pColorAttachments,
223 const XGL_DEPTH_STENCIL_BIND_INFO* pDepthStencilAttachment)
224{
225 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
226 XGL_UINT i;
227
228 for (i = 0; i < colorAttachmentCount; i++) {
229 const XGL_COLOR_ATTACHMENT_BIND_INFO *att = &pColorAttachments[i];
230 struct intel_rt_view *rt = intel_rt_view(att->view);
231
232 cmd->bind.att.rt[i] = rt;
233 }
234
235 cmd->bind.att.rt_count = colorAttachmentCount;
236
237 if (pDepthStencilAttachment) {
238 struct intel_ds_view *ds = intel_ds_view(pDepthStencilAttachment->view);
239 cmd->bind.att.ds = ds;
240 } else {
241 cmd->bind.att.ds = NULL;
242 }
243}
244
245XGL_VOID XGLAPI intelCmdDraw(
246 XGL_CMD_BUFFER cmdBuffer,
247 XGL_UINT firstVertex,
248 XGL_UINT vertexCount,
249 XGL_UINT firstInstance,
250 XGL_UINT instanceCount)
251{
252}
253
254XGL_VOID XGLAPI intelCmdDrawIndexed(
255 XGL_CMD_BUFFER cmdBuffer,
256 XGL_UINT firstIndex,
257 XGL_UINT indexCount,
258 XGL_INT vertexOffset,
259 XGL_UINT firstInstance,
260 XGL_UINT instanceCount)
261{
262}
263
264XGL_VOID XGLAPI intelCmdDrawIndirect(
265 XGL_CMD_BUFFER cmdBuffer,
266 XGL_GPU_MEMORY mem,
267 XGL_GPU_SIZE offset,
268 XGL_UINT32 count,
269 XGL_UINT32 stride)
270{
271}
272
273XGL_VOID XGLAPI intelCmdDrawIndexedIndirect(
274 XGL_CMD_BUFFER cmdBuffer,
275 XGL_GPU_MEMORY mem,
276 XGL_GPU_SIZE offset,
277 XGL_UINT32 count,
278 XGL_UINT32 stride)
279{
280}
281
282XGL_VOID XGLAPI intelCmdDispatch(
283 XGL_CMD_BUFFER cmdBuffer,
284 XGL_UINT x,
285 XGL_UINT y,
286 XGL_UINT z)
287{
288}
289
290XGL_VOID XGLAPI intelCmdDispatchIndirect(
291 XGL_CMD_BUFFER cmdBuffer,
292 XGL_GPU_MEMORY mem,
293 XGL_GPU_SIZE offset)
294{
295}