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Chia-I Wu214dac62014-08-05 11:07:40 +08001/*
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -06002 * Vulkan
Chia-I Wu214dac62014-08-05 11:07:40 +08003 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu214dac62014-08-05 11:07:40 +080026 */
27
28#include <stdio.h>
29#include <sys/types.h>
30#include <sys/stat.h>
31#include <fcntl.h>
32#include <unistd.h>
33
34#include "genhw/genhw.h"
Chia-I Wud8965932014-10-13 13:32:37 +080035#include "kmd/winsys.h"
Chia-I Wuec841722014-08-25 22:36:01 +080036#include "queue.h"
Chia-I Wu214dac62014-08-05 11:07:40 +080037#include "gpu.h"
Chia-I Wu032a2e32015-01-19 11:14:00 +080038#include "instance.h"
Chia-I Wu41858c82015-04-04 16:39:25 +080039#include "wsi.h"
Chia-I Wu1db76e02014-09-15 14:21:14 +080040
Jon Ashburneb2728b2015-04-10 14:33:07 -060041struct intel_gpu_ext_props {
42 uint32_t version;
43 const char * const name;
44};
45static const struct intel_gpu_ext_props intel_gpu_exts[INTEL_EXT_COUNT] = {
46 [INTEL_EXT_WSI_X11].version = 0x10, // TODO what is the version?
47 [INTEL_EXT_WSI_X11].name = "VK_WSI_X11"
Chia-I Wu1db76e02014-09-15 14:21:14 +080048};
Chia-I Wu214dac62014-08-05 11:07:40 +080049
Chia-I Wuf07865e2014-09-15 13:52:21 +080050static int gpu_open_primary_node(struct intel_gpu *gpu)
51{
Chia-I Wu41858c82015-04-04 16:39:25 +080052 if (gpu->primary_fd_internal < 0)
53 gpu->primary_fd_internal = open(gpu->primary_node, O_RDWR);
54
Chia-I Wuf07865e2014-09-15 13:52:21 +080055 return gpu->primary_fd_internal;
56}
57
58static void gpu_close_primary_node(struct intel_gpu *gpu)
59{
Chia-I Wu41858c82015-04-04 16:39:25 +080060 if (gpu->primary_fd_internal >= 0) {
61 close(gpu->primary_fd_internal);
Chia-I Wuf07865e2014-09-15 13:52:21 +080062 gpu->primary_fd_internal = -1;
Chia-I Wu41858c82015-04-04 16:39:25 +080063 }
Chia-I Wuf07865e2014-09-15 13:52:21 +080064}
65
66static int gpu_open_render_node(struct intel_gpu *gpu)
67{
68 if (gpu->render_fd_internal < 0 && gpu->render_node) {
69 gpu->render_fd_internal = open(gpu->render_node, O_RDWR);
70 if (gpu->render_fd_internal < 0) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -060071 intel_log(gpu, VK_DBG_MSG_ERROR, VK_VALIDATION_LEVEL_0, NULL, 0,
Chia-I Wuf07865e2014-09-15 13:52:21 +080072 0, "failed to open %s", gpu->render_node);
73 }
74 }
75
76 return gpu->render_fd_internal;
77}
78
79static void gpu_close_render_node(struct intel_gpu *gpu)
80{
81 if (gpu->render_fd_internal >= 0) {
82 close(gpu->render_fd_internal);
83 gpu->render_fd_internal = -1;
84 }
85}
86
Chia-I Wu214dac62014-08-05 11:07:40 +080087static const char *gpu_get_name(const struct intel_gpu *gpu)
88{
89 const char *name = NULL;
90
91 if (gen_is_hsw(gpu->devid)) {
92 if (gen_is_desktop(gpu->devid))
93 name = "Intel(R) Haswell Desktop";
94 else if (gen_is_mobile(gpu->devid))
95 name = "Intel(R) Haswell Mobile";
96 else if (gen_is_server(gpu->devid))
97 name = "Intel(R) Haswell Server";
98 }
99 else if (gen_is_ivb(gpu->devid)) {
100 if (gen_is_desktop(gpu->devid))
101 name = "Intel(R) Ivybridge Desktop";
102 else if (gen_is_mobile(gpu->devid))
103 name = "Intel(R) Ivybridge Mobile";
104 else if (gen_is_server(gpu->devid))
105 name = "Intel(R) Ivybridge Server";
106 }
107 else if (gen_is_snb(gpu->devid)) {
108 if (gen_is_desktop(gpu->devid))
109 name = "Intel(R) Sandybridge Desktop";
110 else if (gen_is_mobile(gpu->devid))
111 name = "Intel(R) Sandybridge Mobile";
112 else if (gen_is_server(gpu->devid))
113 name = "Intel(R) Sandybridge Server";
114 }
115
116 if (!name)
117 name = "Unknown Intel Chipset";
118
119 return name;
120}
121
Chia-I Wud71ff552015-02-20 12:50:12 -0700122void intel_gpu_destroy(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800123{
Chia-I Wu8635e912015-04-09 14:13:57 +0800124 intel_wsi_gpu_cleanup(gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700125
Chia-I Wu41858c82015-04-04 16:39:25 +0800126 intel_gpu_cleanup_winsys(gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700127
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800128 intel_free(gpu, gpu->primary_node);
129 intel_free(gpu, gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700130}
131
132static int devid_to_gen(int devid)
133{
134 int gen;
135
136 if (gen_is_hsw(devid))
137 gen = INTEL_GEN(7.5);
138 else if (gen_is_ivb(devid))
139 gen = INTEL_GEN(7);
140 else if (gen_is_snb(devid))
141 gen = INTEL_GEN(6);
142 else
143 gen = -1;
144
145#ifdef INTEL_GEN_SPECIALIZED
146 if (gen != INTEL_GEN(INTEL_GEN_SPECIALIZED))
147 gen = -1;
148#endif
149
150 return gen;
151}
152
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600153VkResult intel_gpu_create(const struct intel_instance *instance, int devid,
Chia-I Wud71ff552015-02-20 12:50:12 -0700154 const char *primary_node, const char *render_node,
155 struct intel_gpu **gpu_ret)
156{
157 const int gen = devid_to_gen(devid);
Chia-I Wuf07865e2014-09-15 13:52:21 +0800158 size_t primary_len, render_len;
Chia-I Wud71ff552015-02-20 12:50:12 -0700159 struct intel_gpu *gpu;
160
161 if (gen < 0) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600162 intel_log(instance, VK_DBG_MSG_WARNING, VK_VALIDATION_LEVEL_0,
163 VK_NULL_HANDLE, 0, 0, "unsupported device id 0x%04x", devid);
164 return VK_ERROR_INITIALIZATION_FAILED;
Chia-I Wud71ff552015-02-20 12:50:12 -0700165 }
Chia-I Wu214dac62014-08-05 11:07:40 +0800166
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600167 gpu = intel_alloc(instance, sizeof(*gpu), 0, VK_SYSTEM_ALLOC_API_OBJECT);
Chia-I Wu214dac62014-08-05 11:07:40 +0800168 if (!gpu)
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600169 return VK_ERROR_OUT_OF_MEMORY;
Chia-I Wu214dac62014-08-05 11:07:40 +0800170
171 memset(gpu, 0, sizeof(*gpu));
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600172 /* there is no VK_DBG_OBJECT_GPU */
173 intel_handle_init(&gpu->handle, VK_DBG_OBJECT_UNKNOWN, instance->icd);
Chia-I Wu214dac62014-08-05 11:07:40 +0800174
Chia-I Wu214dac62014-08-05 11:07:40 +0800175 gpu->devid = devid;
176
Chia-I Wuf07865e2014-09-15 13:52:21 +0800177 primary_len = strlen(primary_node);
178 render_len = (render_node) ? strlen(render_node) : 0;
179
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800180 gpu->primary_node = intel_alloc(gpu, primary_len + 1 +
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600181 ((render_len) ? (render_len + 1) : 0), 0, VK_SYSTEM_ALLOC_INTERNAL);
Chia-I Wuf07865e2014-09-15 13:52:21 +0800182 if (!gpu->primary_node) {
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800183 intel_free(instance, gpu);
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600184 return VK_ERROR_OUT_OF_MEMORY;
Chia-I Wu214dac62014-08-05 11:07:40 +0800185 }
Chia-I Wuf07865e2014-09-15 13:52:21 +0800186
187 memcpy(gpu->primary_node, primary_node, primary_len + 1);
188
189 if (render_node) {
190 gpu->render_node = gpu->primary_node + primary_len + 1;
191 memcpy(gpu->render_node, render_node, render_len + 1);
192 }
Chia-I Wu214dac62014-08-05 11:07:40 +0800193
194 gpu->gen_opaque = gen;
195
Chia-I Wu960f1952014-08-28 23:27:10 +0800196 switch (intel_gpu_gen(gpu)) {
197 case INTEL_GEN(7.5):
198 gpu->gt = gen_get_hsw_gt(devid);
199 break;
200 case INTEL_GEN(7):
201 gpu->gt = gen_get_ivb_gt(devid);
202 break;
203 case INTEL_GEN(6):
204 gpu->gt = gen_get_snb_gt(devid);
205 break;
206 }
207
Mike Stroyan9fca7122015-02-09 13:08:26 -0700208 /* 150K dwords */
209 gpu->max_batch_buffer_size = sizeof(uint32_t) * 150*1024;
Chia-I Wud6109bb2014-08-21 09:12:19 +0800210
211 /* the winsys is prepared for one reloc every two dwords, then minus 2 */
212 gpu->batch_buffer_reloc_count =
213 gpu->max_batch_buffer_size / sizeof(uint32_t) / 2 - 2;
Chia-I Wu214dac62014-08-05 11:07:40 +0800214
Chia-I Wuf07865e2014-09-15 13:52:21 +0800215 gpu->primary_fd_internal = -1;
216 gpu->render_fd_internal = -1;
217
Chia-I Wu214dac62014-08-05 11:07:40 +0800218 *gpu_ret = gpu;
219
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600220 return VK_SUCCESS;
Chia-I Wu214dac62014-08-05 11:07:40 +0800221}
222
Chia-I Wu214dac62014-08-05 11:07:40 +0800223void intel_gpu_get_props(const struct intel_gpu *gpu,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600224 VkPhysicalGpuProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800225{
226 const char *name;
227 size_t name_len;
228
Chia-I Wu214dac62014-08-05 11:07:40 +0800229 props->apiVersion = INTEL_API_VERSION;
230 props->driverVersion = INTEL_DRIVER_VERSION;
231
232 props->vendorId = 0x8086;
233 props->deviceId = gpu->devid;
234
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600235 props->gpuType = VK_GPU_TYPE_INTEGRATED;
Chia-I Wu214dac62014-08-05 11:07:40 +0800236
237 /* copy GPU name */
238 name = gpu_get_name(gpu);
239 name_len = strlen(name);
240 if (name_len > sizeof(props->gpuName) - 1)
241 name_len = sizeof(props->gpuName) - 1;
242 memcpy(props->gpuName, name, name_len);
243 props->gpuName[name_len] = '\0';
244
Chia-I Wu214dac62014-08-05 11:07:40 +0800245
Chia-I Wu214dac62014-08-05 11:07:40 +0800246 /* no size limit, but no bounded buffer could exceed 2GB */
247 props->maxInlineMemoryUpdateSize = 2u << 30;
Chia-I Wu214dac62014-08-05 11:07:40 +0800248 props->maxBoundDescriptorSets = 1;
249 props->maxThreadGroupSize = 512;
250
251 /* incremented every 80ns */
252 props->timestampFrequency = 1000 * 1000 * 1000 / 80;
253
254 props->multiColorAttachmentClears = false;
255}
256
257void intel_gpu_get_perf(const struct intel_gpu *gpu,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600258 VkPhysicalGpuPerformance *perf)
Chia-I Wu214dac62014-08-05 11:07:40 +0800259{
260 /* TODO */
261 perf->maxGpuClock = 1.0f;
262 perf->aluPerClock = 1.0f;
263 perf->texPerClock = 1.0f;
264 perf->primsPerClock = 1.0f;
265 perf->pixelsPerClock = 1.0f;
266}
267
268void intel_gpu_get_queue_props(const struct intel_gpu *gpu,
269 enum intel_gpu_engine_type engine,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600270 VkPhysicalGpuQueueProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800271{
Chia-I Wu214dac62014-08-05 11:07:40 +0800272 switch (engine) {
273 case INTEL_GPU_ENGINE_3D:
Mark Lobodzinskicf26e072015-04-16 11:44:05 -0500274 props->queueFlags = VK_QUEUE_GRAPHICS_BIT | VK_QUEUE_COMPUTE_BIT | VK_QUEUE_MEMMGR_BIT;
Chia-I Wu214dac62014-08-05 11:07:40 +0800275 props->queueCount = 1;
Chia-I Wuec841722014-08-25 22:36:01 +0800276 props->maxAtomicCounters = INTEL_QUEUE_ATOMIC_COUNTER_COUNT;
Chia-I Wu214dac62014-08-05 11:07:40 +0800277 props->supportsTimestamps = true;
Courtney Goeltzenleuchtere16aa8e2015-04-02 14:22:12 -0600278 props->maxMemReferences = gpu->batch_buffer_reloc_count;
Chia-I Wu214dac62014-08-05 11:07:40 +0800279 break;
280 default:
281 assert(!"unknown engine type");
282 return;
283 }
284}
285
286void intel_gpu_get_memory_props(const struct intel_gpu *gpu,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600287 VkPhysicalGpuMemoryProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800288{
Chia-I Wu214dac62014-08-05 11:07:40 +0800289 props->supportsMigration = false;
Chia-I Wu2cd1e072015-03-06 12:10:13 -0700290 props->supportsPinning = true;
Chia-I Wu214dac62014-08-05 11:07:40 +0800291}
292
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800293int intel_gpu_get_max_threads(const struct intel_gpu *gpu,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600294 VkPipelineShaderStage stage)
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800295{
296 switch (intel_gpu_gen(gpu)) {
297 case INTEL_GEN(7.5):
298 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600299 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800300 return (gpu->gt >= 2) ? 280 : 70;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600301 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800302 return (gpu->gt == 3) ? 408 :
303 (gpu->gt == 2) ? 204 : 102;
304 default:
305 break;
306 }
307 break;
308 case INTEL_GEN(7):
309 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600310 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800311 return (gpu->gt == 2) ? 128 : 36;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600312 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800313 return (gpu->gt == 2) ? 172 : 48;
314 default:
315 break;
316 }
317 break;
318 case INTEL_GEN(6):
319 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600320 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800321 return (gpu->gt == 2) ? 60 : 24;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600322 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800323 return (gpu->gt == 2) ? 80 : 40;
324 default:
325 break;
326 }
327 break;
328 default:
329 break;
330 }
331
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600332 intel_log(gpu, VK_DBG_MSG_ERROR, VK_VALIDATION_LEVEL_0, VK_NULL_HANDLE,
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800333 0, 0, "unknown Gen or shader stage");
334
335 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600336 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800337 return 1;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600338 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800339 return 4;
340 default:
341 return 1;
342 }
343}
344
Chia-I Wu41858c82015-04-04 16:39:25 +0800345int intel_gpu_get_primary_fd(struct intel_gpu *gpu)
Chia-I Wu1db76e02014-09-15 14:21:14 +0800346{
Chia-I Wu41858c82015-04-04 16:39:25 +0800347 return gpu_open_primary_node(gpu);
Chia-I Wu1db76e02014-09-15 14:21:14 +0800348}
349
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600350VkResult intel_gpu_init_winsys(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800351{
Chia-I Wud8965932014-10-13 13:32:37 +0800352 int fd;
Chia-I Wu214dac62014-08-05 11:07:40 +0800353
Chia-I Wud8965932014-10-13 13:32:37 +0800354 assert(!gpu->winsys);
355
Chia-I Wu41858c82015-04-04 16:39:25 +0800356 fd = gpu_open_render_node(gpu);
Chia-I Wud8965932014-10-13 13:32:37 +0800357 if (fd < 0)
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600358 return VK_ERROR_UNKNOWN;
Chia-I Wud8965932014-10-13 13:32:37 +0800359
Chia-I Wuf13ed3c2015-02-22 14:09:00 +0800360 gpu->winsys = intel_winsys_create_for_fd(gpu->handle.icd, fd);
Chia-I Wud8965932014-10-13 13:32:37 +0800361 if (!gpu->winsys) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600362 intel_log(gpu, VK_DBG_MSG_ERROR, VK_VALIDATION_LEVEL_0,
363 VK_NULL_HANDLE, 0, 0, "failed to create GPU winsys");
Chia-I Wu41858c82015-04-04 16:39:25 +0800364 gpu_close_render_node(gpu);
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600365 return VK_ERROR_UNKNOWN;
Chia-I Wud8965932014-10-13 13:32:37 +0800366 }
367
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600368 return VK_SUCCESS;
Chia-I Wu214dac62014-08-05 11:07:40 +0800369}
370
Chia-I Wu41858c82015-04-04 16:39:25 +0800371void intel_gpu_cleanup_winsys(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800372{
Chia-I Wud8965932014-10-13 13:32:37 +0800373 if (gpu->winsys) {
374 intel_winsys_destroy(gpu->winsys);
375 gpu->winsys = NULL;
376 }
377
Chia-I Wuf07865e2014-09-15 13:52:21 +0800378 gpu_close_primary_node(gpu);
379 gpu_close_render_node(gpu);
Chia-I Wu214dac62014-08-05 11:07:40 +0800380}
381
Chia-I Wu1db76e02014-09-15 14:21:14 +0800382enum intel_ext_type intel_gpu_lookup_extension(const struct intel_gpu *gpu,
383 const char *ext)
Chia-I Wu214dac62014-08-05 11:07:40 +0800384{
Chia-I Wu1db76e02014-09-15 14:21:14 +0800385 enum intel_ext_type type;
386
387 for (type = 0; type < ARRAY_SIZE(intel_gpu_exts); type++) {
Jon Ashburneb2728b2015-04-10 14:33:07 -0600388 if (intel_gpu_exts[type].name && strcmp(intel_gpu_exts[type].name, ext) == 0)
Chia-I Wu1db76e02014-09-15 14:21:14 +0800389 break;
390 }
391
392 assert(type < INTEL_EXT_COUNT || type == INTEL_EXT_INVALID);
393
394 return type;
Chia-I Wu214dac62014-08-05 11:07:40 +0800395}
Chia-I Wubec90a02014-08-06 12:33:03 +0800396
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600397ICD_EXPORT VkResult VKAPI vkEnumerateLayers(
398 VkPhysicalGpu gpu,
Chia-I Wu1d713212015-02-20 15:07:57 -0700399 size_t maxLayerCount,
400 size_t maxStringSize,
401 size_t* pOutLayerCount,
402 char* const* pOutLayers,
403 void* pReserved)
404{
405 if (!pOutLayerCount)
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600406 return VK_ERROR_INVALID_POINTER;
Chia-I Wu1d713212015-02-20 15:07:57 -0700407
408 *pOutLayerCount = 0;
409
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600410 return VK_SUCCESS;
Chia-I Wu1d713212015-02-20 15:07:57 -0700411}
412
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600413ICD_EXPORT VkResult VKAPI vkGetGpuInfo(
414 VkPhysicalGpu gpu_,
415 VkPhysicalGpuInfoType infoType,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600416 size_t* pDataSize,
417 void* pData)
Chia-I Wubec90a02014-08-06 12:33:03 +0800418{
Chia-I Wu41858c82015-04-04 16:39:25 +0800419 struct intel_gpu *gpu = intel_gpu(gpu_);
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600420 VkResult ret = VK_SUCCESS;
Chia-I Wubec90a02014-08-06 12:33:03 +0800421
422 switch (infoType) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600423 case VK_INFO_TYPE_PHYSICAL_GPU_PROPERTIES:
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600424 *pDataSize = sizeof(VkPhysicalGpuProperties);
Jon Ashburn408daec2014-12-05 09:23:52 -0700425 if (pData == NULL) {
426 return ret;
427 }
Chia-I Wubec90a02014-08-06 12:33:03 +0800428 intel_gpu_get_props(gpu, pData);
429 break;
430
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600431 case VK_INFO_TYPE_PHYSICAL_GPU_PERFORMANCE:
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600432 *pDataSize = sizeof(VkPhysicalGpuPerformance);
Jon Ashburn408daec2014-12-05 09:23:52 -0700433 if (pData == NULL) {
434 return ret;
435 }
Chia-I Wubec90a02014-08-06 12:33:03 +0800436 intel_gpu_get_perf(gpu, pData);
437 break;
438
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600439 case VK_INFO_TYPE_PHYSICAL_GPU_QUEUE_PROPERTIES:
Chia-I Wubec90a02014-08-06 12:33:03 +0800440 /*
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600441 * Vulkan Programmers guide, page 33:
Chia-I Wubec90a02014-08-06 12:33:03 +0800442 * to determine the data size an application calls
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600443 * vkGetGpuInfo() with a NULL data pointer. The
Chia-I Wubec90a02014-08-06 12:33:03 +0800444 * expected data size for all queue property structures
445 * is returned in pDataSize
446 */
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600447 *pDataSize = sizeof(VkPhysicalGpuQueueProperties) *
Chia-I Wubec90a02014-08-06 12:33:03 +0800448 INTEL_GPU_ENGINE_COUNT;
449 if (pData != NULL) {
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600450 VkPhysicalGpuQueueProperties *dst = pData;
Chia-I Wubec90a02014-08-06 12:33:03 +0800451 int engine;
452
453 for (engine = 0; engine < INTEL_GPU_ENGINE_COUNT; engine++) {
454 intel_gpu_get_queue_props(gpu, engine, dst);
455 dst++;
456 }
457 }
458 break;
459
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600460 case VK_INFO_TYPE_PHYSICAL_GPU_MEMORY_PROPERTIES:
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600461 *pDataSize = sizeof(VkPhysicalGpuMemoryProperties);
Jon Ashburn408daec2014-12-05 09:23:52 -0700462 if (pData == NULL) {
463 return ret;
464 }
Chia-I Wubec90a02014-08-06 12:33:03 +0800465 intel_gpu_get_memory_props(gpu, pData);
466 break;
467
468 default:
Chia-I Wu41858c82015-04-04 16:39:25 +0800469 ret = intel_wsi_gpu_get_info(gpu, infoType, pDataSize, pData);
470 break;
Chia-I Wubec90a02014-08-06 12:33:03 +0800471 }
472
473 return ret;
474}
475
Jon Ashburneb2728b2015-04-10 14:33:07 -0600476ICD_EXPORT VkResult VKAPI vkGetGlobalExtensionInfo(
477 VkExtensionInfoType infoType,
478 uint32_t extensionIndex,
479 size_t* pDataSize,
480 void* pData)
481{
482 VkExtensionProperties *ext_props;
483 uint32_t *count;
484
485 if (pDataSize == NULL)
486 return VK_ERROR_INVALID_POINTER;
487
488 switch (infoType) {
489 case VK_EXTENSION_INFO_TYPE_COUNT:
490 *pDataSize = sizeof(uint32_t);
491 if (pData == NULL)
492 return VK_SUCCESS;
493 count = (uint32_t *) pData;
494 *count = INTEL_EXT_COUNT;
495 break;
496 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
497 *pDataSize = sizeof(VkExtensionProperties);
498 if (pData == NULL)
499 return VK_SUCCESS;
500 if (extensionIndex >= INTEL_EXT_COUNT)
501 return VK_ERROR_INVALID_VALUE;
502 ext_props = (VkExtensionProperties *) pData;
503 ext_props->version = intel_gpu_exts[extensionIndex].version;
504 strncpy(ext_props->extName, intel_gpu_exts[extensionIndex].name,
505 VK_MAX_EXTENSION_NAME);
506 ext_props->extName[VK_MAX_EXTENSION_NAME - 1] = '\0';
507 break;
508 default:
509 return VK_ERROR_INVALID_VALUE;
510 };
511
512 return VK_SUCCESS;
513}
514
Tobin Ehlis0ef6ec52015-04-16 12:51:37 -0600515ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceExtensionInfo(
516 VkPhysicalGpu gpu,
517 VkExtensionInfoType infoType,
518 uint32_t extensionIndex,
519 size_t* pDataSize,
520 void* pData)
Chia-I Wubec90a02014-08-06 12:33:03 +0800521{
Tobin Ehlis0ef6ec52015-04-16 12:51:37 -0600522 /*
523 * If/when we have device-specific extensions, should retrieve them
524 * based on the passed-in physical device
525 *
526 *VkExtensionProperties *ext_props;
527 */
528 uint32_t *count;
Chia-I Wubec90a02014-08-06 12:33:03 +0800529
Tobin Ehlis0ef6ec52015-04-16 12:51:37 -0600530 if (pDataSize == NULL)
531 return VK_ERROR_INVALID_POINTER;
532
533 switch (infoType) {
534 case VK_EXTENSION_INFO_TYPE_COUNT:
535 *pDataSize = sizeof(uint32_t);
536 if (pData == NULL)
537 return VK_SUCCESS;
538 count = (uint32_t *) pData;
539 *count = INTEL_PHY_DEV_EXT_COUNT;
540 break;
541 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
542 *pDataSize = sizeof(VkExtensionProperties);
543 if (pData == NULL)
544 return VK_SUCCESS;
545 /*
546 * Currently no device-specific extensions
547 */
548 return VK_ERROR_INVALID_VALUE;
549 break;
550 default:
551 return VK_ERROR_INVALID_VALUE;
552 };
553
554 return VK_SUCCESS;
Chia-I Wubec90a02014-08-06 12:33:03 +0800555}
Chia-I Wu251e7d92014-08-19 13:35:42 +0800556
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600557ICD_EXPORT VkResult VKAPI vkGetMultiGpuCompatibility(
558 VkPhysicalGpu gpu0_,
559 VkPhysicalGpu gpu1_,
560 VkGpuCompatibilityInfo* pInfo)
Chia-I Wu251e7d92014-08-19 13:35:42 +0800561{
Chia-I Wu452f5e82014-08-31 12:39:05 +0800562 const struct intel_gpu *gpu0 = intel_gpu(gpu0_);
563 const struct intel_gpu *gpu1 = intel_gpu(gpu1_);
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600564 VkFlags compat = VK_GPU_COMPAT_IQ_MATCH_BIT |
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600565 VK_GPU_COMPAT_PEER_TRANSFER_BIT |
566 VK_GPU_COMPAT_SHARED_MEMORY_BIT |
567 VK_GPU_COMPAT_SHARED_GPU0_DISPLAY_BIT |
568 VK_GPU_COMPAT_SHARED_GPU1_DISPLAY_BIT;
Chia-I Wu452f5e82014-08-31 12:39:05 +0800569
570 if (intel_gpu_gen(gpu0) == intel_gpu_gen(gpu1))
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600571 compat |= VK_GPU_COMPAT_ASIC_FEATURES_BIT;
Chia-I Wu452f5e82014-08-31 12:39:05 +0800572
573 pInfo->compatibilityFlags = compat;
574
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600575 return VK_SUCCESS;
Chia-I Wu251e7d92014-08-19 13:35:42 +0800576}