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Chia-I Wuf9911eb2014-08-06 13:50:31 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wuf9911eb2014-08-06 13:50:31 +080026 */
27
28#ifndef MEM_H
29#define MEM_H
30
Chia-I Wu37fe8412014-08-07 13:34:57 +080031#include "kmd/winsys.h"
Chia-I Wuf9911eb2014-08-06 13:50:31 +080032#include "intel.h"
Chia-I Wu3ada4cb2014-08-30 18:55:54 +080033#include "obj.h"
Chia-I Wuf9911eb2014-08-06 13:50:31 +080034
Chia-I Wuf9911eb2014-08-06 13:50:31 +080035struct intel_mem {
36 struct intel_base base;
37
38 struct intel_bo *bo;
Chia-I Wu000747d2014-08-20 15:39:36 +080039 XGL_GPU_SIZE size;
Chia-I Wuf9911eb2014-08-06 13:50:31 +080040};
41
42XGL_RESULT intel_mem_alloc(struct intel_dev *dev,
43 const XGL_MEMORY_ALLOC_INFO *info,
44 struct intel_mem **mem_ret);
45void intel_mem_free(struct intel_mem *mem);
46
Chia-I Wu2cd1e072015-03-06 12:10:13 -070047XGL_RESULT intel_mem_import_userptr(struct intel_dev *dev,
48 const void *userptr,
49 size_t size,
50 struct intel_mem **mem_ret);
51
Chia-I Wuf9911eb2014-08-06 13:50:31 +080052XGL_RESULT intel_mem_set_priority(struct intel_mem *mem,
53 XGL_MEMORY_PRIORITY priority);
54
Chia-I Wu37fe8412014-08-07 13:34:57 +080055static inline void *intel_mem_map(struct intel_mem *mem, XGL_FLAGS flags)
56{
Chia-I Wue1ae3752015-02-25 09:47:30 -070057 return intel_bo_map_async(mem->bo);
Chia-I Wu37fe8412014-08-07 13:34:57 +080058}
59
60static inline void *intel_mem_map_sync(struct intel_mem *mem, bool rw)
61{
62 return intel_bo_map(mem->bo, rw);
63}
64
65static inline void intel_mem_unmap(struct intel_mem *mem)
66{
67 intel_bo_unmap(mem->bo);
68}
69
70static inline bool intel_mem_is_busy(struct intel_mem *mem)
71{
72 return intel_bo_is_busy(mem->bo);
73}
Chia-I Wuf9911eb2014-08-06 13:50:31 +080074
75static inline struct intel_mem *intel_mem(XGL_GPU_MEMORY mem)
76{
77 return (struct intel_mem *) mem;
78}
79
Chia-I Wuf9911eb2014-08-06 13:50:31 +080080#endif /* MEM_H */