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Chia-I Wue54854a2014-08-05 10:23:50 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef DEV_H
26#define DEV_H
27
28#include "obj.h"
29#include "gpu.h"
30#include "intel.h"
31
32struct intel_gpu;
33struct intel_queue;
34struct intel_winsys;
35
36struct intel_dev_dbg_msg_filter {
37 XGL_INT msg_code;
38 XGL_DBG_MSG_FILTER filter;
39 bool triggered;
40
41 struct intel_dev_dbg_msg_filter *next;
42};
43
44struct intel_dev_dbg {
45 struct intel_base_dbg base;
46
47 struct intel_dev_dbg_msg_filter *filters;
48};
49
50struct intel_dev {
51 struct intel_base base;
52
53 struct intel_gpu *gpu;
54 struct intel_winsys *winsys;
55 struct intel_queue *queues[INTEL_GPU_ENGINE_COUNT];
56};
57
58struct intel_queue {
59 struct intel_base base;
60
61 struct intel_dev *dev;
62};
63
64static inline struct intel_dev *intel_dev(XGL_DEVICE dev)
65{
66 return (struct intel_dev *) dev;
67}
68
69static inline struct intel_dev_dbg *intel_dev_dbg(struct intel_dev *dev)
70{
71 return (struct intel_dev_dbg *) dev->base.dbg;
72}
73
74static inline struct intel_queue *intel_queue(XGL_QUEUE queue)
75{
76 return (struct intel_queue *) queue;
77}
78
79XGL_RESULT intel_dev_create(struct intel_gpu *gpu,
80 const XGL_DEVICE_CREATE_INFO *info,
81 struct intel_dev **dev_ret);
82void intel_dev_destroy(struct intel_dev *dev);
83
84void intel_dev_get_heap_props(const struct intel_dev *dev,
85 XGL_MEMORY_HEAP_PROPERTIES *props);
86
87XGL_RESULT intel_dev_add_msg_filter(struct intel_dev *dev,
88 XGL_INT msg_code,
89 XGL_DBG_MSG_FILTER filter);
90
91void intel_dev_remove_msg_filter(struct intel_dev *dev,
92 XGL_INT msg_code);
93
Chia-I Wua207aba2014-08-05 15:13:37 +080094XGL_RESULT XGLAPI intelCreateDevice(
95 XGL_PHYSICAL_GPU gpu,
96 const XGL_DEVICE_CREATE_INFO* pCreateInfo,
97 XGL_DEVICE* pDevice);
98
99XGL_RESULT XGLAPI intelDestroyDevice(
100 XGL_DEVICE device);
101
102XGL_RESULT XGLAPI intelGetMemoryHeapCount(
103 XGL_DEVICE device,
104 XGL_UINT* pCount);
105
106XGL_RESULT XGLAPI intelGetMemoryHeapInfo(
107 XGL_DEVICE device,
108 XGL_UINT heapId,
109 XGL_MEMORY_HEAP_INFO_TYPE infoType,
110 XGL_SIZE* pDataSize,
111 XGL_VOID* pData);
112
Chia-I Wue54854a2014-08-05 10:23:50 +0800113#endif /* DEV_H */