Blame - icd/intel/format.c - platform/external/vulkan-validation-layers

2014-08-07 14:21:43 +0800

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/*

Courtney Goeltzenleuchter

9cc421e

2015-04-08 15:36:08 -0600

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* Vulkan

Chia-I Wu

2014-08-07 14:21:43 +0800

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*

*

* Permission is hereby granted, free of charge, to any person obtaining a

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* copy of this software and associated documentation files (the "Software"),

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* to deal in the Software without restriction, including without limitation

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* the rights to use, copy, modify, merge, publish, distribute, sublicense,

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* and/or sell copies of the Software, and to permit persons to whom the

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* Software is furnished to do so, subject to the following conditions:

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*

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* The above copyright notice and this permission notice shall be included

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* in all copies or substantial portions of the Software.

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*

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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

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* DEALINGS IN THE SOFTWARE.

Chia-I Wu

44e4236

2014-09-02 08:32:09 +0800

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*

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* Authors:

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* Chia-I Wu <olv@lunarg.com>

Chia-I Wu

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*/

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#include "genhw/genhw.h"

#include "dev.h"

#include "gpu.h"

#include "format.h"

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struct intel_vf_cap {

int vertex_element;

};

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struct intel_sampler_cap {

int sampling;

int filtering;

int shadow_map;

int chroma_key;

};

struct intel_dp_cap {

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int rt_write;

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int rt_write_blending;

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int typed_write;

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int media_color_processing;

};

/*

* This table is based on:

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*

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* - the Sandy Bridge PRM, volume 4 part 1, page 88-97

Chia-I Wu

2015-01-18 14:51:02 +0800

[diff] [blame]

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* - the Ivy Bridge PRM, volume 2 part 1, page 97-99

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* - the Haswell PRM, volume 7, page 467-470

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*/

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static const struct intel_vf_cap intel_vf_caps[] = {

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#define CAP(vertex_element) { INTEL_GEN(vertex_element) }

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[GEN6_FORMAT_R32G32B32A32_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R32G32B32A32_SINT] = CAP( 1),

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[GEN6_FORMAT_R32G32B32A32_UINT] = CAP( 1),

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[GEN6_FORMAT_R32G32B32A32_UNORM] = CAP( 1),

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[GEN6_FORMAT_R32G32B32A32_SNORM] = CAP( 1),

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[GEN6_FORMAT_R64G64_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R32G32B32A32_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R32G32B32A32_USCALED] = CAP( 1),

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[GEN6_FORMAT_R32G32B32A32_SFIXED] = CAP(7.5),

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[GEN6_FORMAT_R32G32B32_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R32G32B32_SINT] = CAP( 1),

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[GEN6_FORMAT_R32G32B32_UINT] = CAP( 1),

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[GEN6_FORMAT_R32G32B32_UNORM] = CAP( 1),

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[GEN6_FORMAT_R32G32B32_SNORM] = CAP( 1),

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[GEN6_FORMAT_R32G32B32_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R32G32B32_USCALED] = CAP( 1),

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[GEN6_FORMAT_R32G32B32_SFIXED] = CAP(7.5),

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[GEN6_FORMAT_R16G16B16A16_UNORM] = CAP( 1),

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[GEN6_FORMAT_R16G16B16A16_SNORM] = CAP( 1),

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[GEN6_FORMAT_R16G16B16A16_SINT] = CAP( 1),

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[GEN6_FORMAT_R16G16B16A16_UINT] = CAP( 1),

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[GEN6_FORMAT_R16G16B16A16_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R32G32_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R32G32_SINT] = CAP( 1),

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[GEN6_FORMAT_R32G32_UINT] = CAP( 1),

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[GEN6_FORMAT_R32G32_UNORM] = CAP( 1),

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[GEN6_FORMAT_R32G32_SNORM] = CAP( 1),

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[GEN6_FORMAT_R64_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R16G16B16A16_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R16G16B16A16_USCALED] = CAP( 1),

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[GEN6_FORMAT_R32G32_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R32G32_USCALED] = CAP( 1),

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[GEN6_FORMAT_R32G32_SFIXED] = CAP(7.5),

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[GEN6_FORMAT_B8G8R8A8_UNORM] = CAP( 1),

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[GEN6_FORMAT_R10G10B10A2_UNORM] = CAP( 1),

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[GEN6_FORMAT_R10G10B10A2_UINT] = CAP( 1),

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[GEN6_FORMAT_R10G10B10_SNORM_A2_UNORM] = CAP( 1),

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[GEN6_FORMAT_R8G8B8A8_UNORM] = CAP( 1),

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[GEN6_FORMAT_R8G8B8A8_SNORM] = CAP( 1),

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[GEN6_FORMAT_R8G8B8A8_SINT] = CAP( 1),

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[GEN6_FORMAT_R8G8B8A8_UINT] = CAP( 1),

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[GEN6_FORMAT_R16G16_UNORM] = CAP( 1),

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[GEN6_FORMAT_R16G16_SNORM] = CAP( 1),

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[GEN6_FORMAT_R16G16_SINT] = CAP( 1),

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[GEN6_FORMAT_R16G16_UINT] = CAP( 1),

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[GEN6_FORMAT_R16G16_FLOAT] = CAP( 1),

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[GEN6_FORMAT_B10G10R10A2_UNORM] = CAP(7.5),

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[GEN6_FORMAT_R11G11B10_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R32_SINT] = CAP( 1),

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[GEN6_FORMAT_R32_UINT] = CAP( 1),

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[GEN6_FORMAT_R32_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R32_UNORM] = CAP( 1),

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[GEN6_FORMAT_R32_SNORM] = CAP( 1),

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[GEN6_FORMAT_R10G10B10X2_USCALED] = CAP( 1),

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[GEN6_FORMAT_R8G8B8A8_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R8G8B8A8_USCALED] = CAP( 1),

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[GEN6_FORMAT_R16G16_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R16G16_USCALED] = CAP( 1),

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[GEN6_FORMAT_R32_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R32_USCALED] = CAP( 1),

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[GEN6_FORMAT_R8G8_UNORM] = CAP( 1),

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[GEN6_FORMAT_R8G8_SNORM] = CAP( 1),

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[GEN6_FORMAT_R8G8_SINT] = CAP( 1),

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[GEN6_FORMAT_R8G8_UINT] = CAP( 1),

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[GEN6_FORMAT_R16_UNORM] = CAP( 1),

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[GEN6_FORMAT_R16_SNORM] = CAP( 1),

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[GEN6_FORMAT_R16_SINT] = CAP( 1),

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[GEN6_FORMAT_R16_UINT] = CAP( 1),

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[GEN6_FORMAT_R16_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R8G8_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R8G8_USCALED] = CAP( 1),

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[GEN6_FORMAT_R16_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R16_USCALED] = CAP( 1),

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[GEN6_FORMAT_R8_UNORM] = CAP( 1),

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[GEN6_FORMAT_R8_SNORM] = CAP( 1),

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[GEN6_FORMAT_R8_SINT] = CAP( 1),

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[GEN6_FORMAT_R8_UINT] = CAP( 1),

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[GEN6_FORMAT_R8_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R8_USCALED] = CAP( 1),

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[GEN6_FORMAT_R8G8B8_UNORM] = CAP( 1),

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[GEN6_FORMAT_R8G8B8_SNORM] = CAP( 1),

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[GEN6_FORMAT_R8G8B8_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R8G8B8_USCALED] = CAP( 1),

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[GEN6_FORMAT_R64G64B64A64_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R64G64B64_FLOAT] = CAP( 1),

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[GEN6_FORMAT_R16G16B16_FLOAT] = CAP( 6),

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[GEN6_FORMAT_R16G16B16_UNORM] = CAP( 1),

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[GEN6_FORMAT_R16G16B16_SNORM] = CAP( 1),

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[GEN6_FORMAT_R16G16B16_SSCALED] = CAP( 1),

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[GEN6_FORMAT_R16G16B16_USCALED] = CAP( 1),

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[GEN6_FORMAT_R16G16B16_UINT] = CAP(7.5),

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[GEN6_FORMAT_R16G16B16_SINT] = CAP(7.5),

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[GEN6_FORMAT_R32_SFIXED] = CAP(7.5),

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[GEN6_FORMAT_R10G10B10A2_SNORM] = CAP(7.5),

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[GEN6_FORMAT_R10G10B10A2_USCALED] = CAP(7.5),

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[GEN6_FORMAT_R10G10B10A2_SSCALED] = CAP(7.5),

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[GEN6_FORMAT_R10G10B10A2_SINT] = CAP(7.5),

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[GEN6_FORMAT_B10G10R10A2_SNORM] = CAP(7.5),

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[GEN6_FORMAT_B10G10R10A2_USCALED] = CAP(7.5),

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[GEN6_FORMAT_B10G10R10A2_SSCALED] = CAP(7.5),

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[GEN6_FORMAT_B10G10R10A2_UINT] = CAP(7.5),

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[GEN6_FORMAT_B10G10R10A2_SINT] = CAP(7.5),

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[GEN6_FORMAT_R8G8B8_UINT] = CAP(7.5),

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[GEN6_FORMAT_R8G8B8_SINT] = CAP(7.5),

#undef CAP

};

/*

* This table is based on:

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*

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* - the Sandy Bridge PRM, volume 4 part 1, page 88-97

Chia-I Wu

2014-08-07 14:21:43 +0800

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* - the Ivy Bridge PRM, volume 4 part 1, page 84-87

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*/

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static const struct intel_sampler_cap intel_sampler_caps[] = {

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#define CAP(sampling, filtering, shadow_map, chroma_key) \

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{ INTEL_GEN(sampling), INTEL_GEN(filtering), INTEL_GEN(shadow_map), INTEL_GEN(chroma_key) }

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[GEN6_FORMAT_R32G32B32A32_FLOAT] = CAP( 1, 5, 0, 0),

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[GEN6_FORMAT_R32G32B32A32_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R32G32B32A32_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R32G32B32X32_FLOAT] = CAP( 1, 5, 0, 0),

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[GEN6_FORMAT_R32G32B32_FLOAT] = CAP( 1, 5, 0, 0),

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[GEN6_FORMAT_R32G32B32_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R32G32B32_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16G16B16A16_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R16G16B16A16_SNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R16G16B16A16_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16G16B16A16_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16G16B16A16_FLOAT] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R32G32_FLOAT] = CAP( 1, 5, 0, 0),

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[GEN6_FORMAT_R32G32_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R32G32_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R32_FLOAT_X8X24_TYPELESS] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_X32_TYPELESS_G8X24_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_L32A32_FLOAT] = CAP( 1, 5, 0, 0),

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[GEN6_FORMAT_R16G16B16X16_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R16G16B16X16_FLOAT] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_A32X32_FLOAT] = CAP( 1, 5, 0, 0),

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[GEN6_FORMAT_L32X32_FLOAT] = CAP( 1, 5, 0, 0),

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[GEN6_FORMAT_I32X32_FLOAT] = CAP( 1, 5, 0, 0),

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[GEN6_FORMAT_B8G8R8A8_UNORM] = CAP( 1, 1, 0, 1),

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[GEN6_FORMAT_B8G8R8A8_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R10G10B10A2_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R10G10B10A2_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R10G10B10A2_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R10G10B10_SNORM_A2_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8G8B8A8_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8G8B8A8_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8G8B8A8_SNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8G8B8A8_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R8G8B8A8_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16G16_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R16G16_SNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R16G16_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16G16_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16G16_FLOAT] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_B10G10R10A2_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_B10G10R10A2_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R11G11B10_FLOAT] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R32_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R32_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R32_FLOAT] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_R24_UNORM_X8_TYPELESS] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_X24_TYPELESS_G8_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_L16A16_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_I24X8_UNORM] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_L24X8_UNORM] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_A24X8_UNORM] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_I32_FLOAT] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_L32_FLOAT] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_A32_FLOAT] = CAP( 1, 5, 1, 0),

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[GEN6_FORMAT_B8G8R8X8_UNORM] = CAP( 1, 1, 0, 1),

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[GEN6_FORMAT_B8G8R8X8_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8G8B8X8_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8G8B8X8_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R9G9B9E5_SHAREDEXP] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_B10G10R10X2_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_L16A16_FLOAT] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_B5G6R5_UNORM] = CAP( 1, 1, 0, 1),

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[GEN6_FORMAT_B5G6R5_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_B5G5R5A1_UNORM] = CAP( 1, 1, 0, 1),

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[GEN6_FORMAT_B5G5R5A1_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_B4G4R4A4_UNORM] = CAP( 1, 1, 0, 1),

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[GEN6_FORMAT_B4G4R4A4_UNORM_SRGB] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8G8_UNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8G8_SNORM] = CAP( 1, 1, 0, 1),

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[GEN6_FORMAT_R8G8_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R8G8_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16_UNORM] = CAP( 1, 1, 1, 0),

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[GEN6_FORMAT_R16_SNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R16_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R16_FLOAT] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_A8P8_UNORM_PALETTE0] = CAP( 5, 5, 0, 0),

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[GEN6_FORMAT_A8P8_UNORM_PALETTE1] = CAP( 5, 5, 0, 0),

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[GEN6_FORMAT_I16_UNORM] = CAP( 1, 1, 1, 0),

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[GEN6_FORMAT_L16_UNORM] = CAP( 1, 1, 1, 0),

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[GEN6_FORMAT_A16_UNORM] = CAP( 1, 1, 1, 0),

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[GEN6_FORMAT_L8A8_UNORM] = CAP( 1, 1, 0, 1),

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[GEN6_FORMAT_I16_FLOAT] = CAP( 1, 1, 1, 0),

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[GEN6_FORMAT_L16_FLOAT] = CAP( 1, 1, 1, 0),

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[GEN6_FORMAT_A16_FLOAT] = CAP( 1, 1, 1, 0),

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[GEN6_FORMAT_L8A8_UNORM_SRGB] = CAP(4.5, 4.5, 0, 0),

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[GEN6_FORMAT_R5G5_SNORM_B6_UNORM] = CAP( 1, 1, 0, 1),

263

[GEN6_FORMAT_P8A8_UNORM_PALETTE0] = CAP( 5, 5, 0, 0),

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[GEN6_FORMAT_P8A8_UNORM_PALETTE1] = CAP( 5, 5, 0, 0),

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[GEN6_FORMAT_R8_UNORM] = CAP( 1, 1, 0, 4.5),

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[GEN6_FORMAT_R8_SNORM] = CAP( 1, 1, 0, 0),

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[GEN6_FORMAT_R8_SINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_R8_UINT] = CAP( 1, 0, 0, 0),

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[GEN6_FORMAT_A8_UNORM] = CAP( 1, 1, 0, 1),

270

[GEN6_FORMAT_I8_UNORM] = CAP( 1, 1, 0, 0),

271

[GEN6_FORMAT_L8_UNORM] = CAP( 1, 1, 0, 1),

272

[GEN6_FORMAT_P4A4_UNORM_PALETTE0] = CAP( 1, 1, 0, 0),

273

[GEN6_FORMAT_A4P4_UNORM_PALETTE0] = CAP( 1, 1, 0, 0),

274

[GEN6_FORMAT_P8_UNORM_PALETTE0] = CAP(4.5, 4.5, 0, 0),

275

[GEN6_FORMAT_L8_UNORM_SRGB] = CAP(4.5, 4.5, 0, 0),

276

[GEN6_FORMAT_P8_UNORM_PALETTE1] = CAP(4.5, 4.5, 0, 0),

277

[GEN6_FORMAT_P4A4_UNORM_PALETTE1] = CAP(4.5, 4.5, 0, 0),

278

[GEN6_FORMAT_A4P4_UNORM_PALETTE1] = CAP(4.5, 4.5, 0, 0),

279

[GEN6_FORMAT_DXT1_RGB_SRGB] = CAP(4.5, 4.5, 0, 0),

280

[GEN6_FORMAT_R1_UNORM] = CAP( 1, 1, 0, 0),

281

[GEN6_FORMAT_YCRCB_NORMAL] = CAP( 1, 1, 0, 1),

282

[GEN6_FORMAT_YCRCB_SWAPUVY] = CAP( 1, 1, 0, 1),

283

[GEN6_FORMAT_P2_UNORM_PALETTE0] = CAP(4.5, 4.5, 0, 0),

284

[GEN6_FORMAT_P2_UNORM_PALETTE1] = CAP(4.5, 4.5, 0, 0),

285

[GEN6_FORMAT_BC1_UNORM] = CAP( 1, 1, 0, 1),

286

[GEN6_FORMAT_BC2_UNORM] = CAP( 1, 1, 0, 1),

287

[GEN6_FORMAT_BC3_UNORM] = CAP( 1, 1, 0, 1),

288

[GEN6_FORMAT_BC4_UNORM] = CAP( 1, 1, 0, 0),

289

[GEN6_FORMAT_BC5_UNORM] = CAP( 1, 1, 0, 0),

290

[GEN6_FORMAT_BC1_UNORM_SRGB] = CAP( 1, 1, 0, 0),

291

[GEN6_FORMAT_BC2_UNORM_SRGB] = CAP( 1, 1, 0, 0),

292

[GEN6_FORMAT_BC3_UNORM_SRGB] = CAP( 1, 1, 0, 0),

293

[GEN6_FORMAT_MONO8] = CAP( 1, 0, 0, 0),

294

[GEN6_FORMAT_YCRCB_SWAPUV] = CAP( 1, 1, 0, 0),

295

[GEN6_FORMAT_YCRCB_SWAPY] = CAP( 1, 1, 0, 0),

296

[GEN6_FORMAT_DXT1_RGB] = CAP( 1, 1, 0, 0),

297

[GEN6_FORMAT_FXT1] = CAP( 1, 1, 0, 0),

298

[GEN6_FORMAT_BC4_SNORM] = CAP( 1, 1, 0, 0),

299

[GEN6_FORMAT_BC5_SNORM] = CAP( 1, 1, 0, 0),

300

[GEN6_FORMAT_R16G16B16_FLOAT] = CAP( 5, 5, 0, 0),

301

[GEN6_FORMAT_BC6H_SF16] = CAP( 7, 7, 0, 0),

302

[GEN6_FORMAT_BC7_UNORM] = CAP( 7, 7, 0, 0),

303

[GEN6_FORMAT_BC7_UNORM_SRGB] = CAP( 7, 7, 0, 0),

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[GEN6_FORMAT_BC6H_UF16] = CAP( 7, 7, 0, 0),

#undef CAP

};

/*

* This table is based on:

310

*

311

* - the Sandy Bridge PRM, volume 4 part 1, page 88-97

312

* - the Ivy Bridge PRM, volume 4 part 1, page 172, 252-253, and 277-278

313

* - the Haswell PRM, volume 7, page 262-264

314

*/

315

static const struct intel_dp_cap intel_dp_caps[] = {

316

#define CAP(rt_write, rt_write_blending, typed_write, media_color_processing) \

317

{ INTEL_GEN(rt_write), INTEL_GEN(rt_write_blending), INTEL_GEN(typed_write), INTEL_GEN(media_color_processing) }

318

[GEN6_FORMAT_R32G32B32A32_FLOAT] = CAP( 1, 1, 7, 0),

319

[GEN6_FORMAT_R32G32B32A32_SINT] = CAP( 1, 0, 7, 0),

320

[GEN6_FORMAT_R32G32B32A32_UINT] = CAP( 1, 0, 7, 0),

321

[GEN6_FORMAT_R16G16B16A16_UNORM] = CAP( 1, 4.5, 7, 6),

322

[GEN6_FORMAT_R16G16B16A16_SNORM] = CAP( 1, 6, 7, 0),

323

[GEN6_FORMAT_R16G16B16A16_SINT] = CAP( 1, 0, 7, 0),

324

[GEN6_FORMAT_R16G16B16A16_UINT] = CAP( 1, 0, 7, 0),

325

[GEN6_FORMAT_R16G16B16A16_FLOAT] = CAP( 1, 1, 7, 0),

326

[GEN6_FORMAT_R32G32_FLOAT] = CAP( 1, 1, 7, 0),

327

[GEN6_FORMAT_R32G32_SINT] = CAP( 1, 0, 7, 0),

328

[GEN6_FORMAT_R32G32_UINT] = CAP( 1, 0, 7, 0),

329

[GEN6_FORMAT_B8G8R8A8_UNORM] = CAP( 1, 1, 7, 6),

330

[GEN6_FORMAT_B8G8R8A8_UNORM_SRGB] = CAP( 1, 1, 0, 0),

331

[GEN6_FORMAT_R10G10B10A2_UNORM] = CAP( 1, 1, 7, 6),

332

[GEN6_FORMAT_R10G10B10A2_UNORM_SRGB] = CAP( 0, 0, 0, 6),

333

[GEN6_FORMAT_R10G10B10A2_UINT] = CAP( 1, 0, 7, 0),

334

[GEN6_FORMAT_R8G8B8A8_UNORM] = CAP( 1, 1, 7, 6),

335

[GEN6_FORMAT_R8G8B8A8_UNORM_SRGB] = CAP( 1, 1, 0, 6),

336

[GEN6_FORMAT_R8G8B8A8_SNORM] = CAP( 1, 6, 7, 0),

337

[GEN6_FORMAT_R8G8B8A8_SINT] = CAP( 1, 0, 7, 0),

338

[GEN6_FORMAT_R8G8B8A8_UINT] = CAP( 1, 0, 7, 0),

339

[GEN6_FORMAT_R16G16_UNORM] = CAP( 1, 4.5, 7, 0),

340

[GEN6_FORMAT_R16G16_SNORM] = CAP( 1, 6, 7, 0),

341

[GEN6_FORMAT_R16G16_SINT] = CAP( 1, 0, 7, 0),

342

[GEN6_FORMAT_R16G16_UINT] = CAP( 1, 0, 7, 0),

343

[GEN6_FORMAT_R16G16_FLOAT] = CAP( 1, 1, 7, 0),

344

[GEN6_FORMAT_B10G10R10A2_UNORM] = CAP( 1, 1, 7, 6),

345

[GEN6_FORMAT_B10G10R10A2_UNORM_SRGB] = CAP( 1, 1, 0, 6),

346

[GEN6_FORMAT_R11G11B10_FLOAT] = CAP( 1, 1, 7, 0),

347

[GEN6_FORMAT_R32_SINT] = CAP( 1, 0, 7, 0),

348

[GEN6_FORMAT_R32_UINT] = CAP( 1, 0, 7, 0),

349

[GEN6_FORMAT_R32_FLOAT] = CAP( 1, 1, 7, 0),

350

[GEN6_FORMAT_B8G8R8X8_UNORM] = CAP( 0, 0, 0, 6),

351

[GEN6_FORMAT_B5G6R5_UNORM] = CAP( 1, 1, 7, 0),

352

[GEN6_FORMAT_B5G6R5_UNORM_SRGB] = CAP( 1, 1, 0, 0),

353

[GEN6_FORMAT_B5G5R5A1_UNORM] = CAP( 1, 1, 7, 0),

354

[GEN6_FORMAT_B5G5R5A1_UNORM_SRGB] = CAP( 1, 1, 0, 0),

355

[GEN6_FORMAT_B4G4R4A4_UNORM] = CAP( 1, 1, 7, 0),

356

[GEN6_FORMAT_B4G4R4A4_UNORM_SRGB] = CAP( 1, 1, 0, 0),

357

[GEN6_FORMAT_R8G8_UNORM] = CAP( 1, 1, 7, 0),

358

[GEN6_FORMAT_R8G8_SNORM] = CAP( 1, 6, 7, 0),

359

[GEN6_FORMAT_R8G8_SINT] = CAP( 1, 0, 7, 0),

360

[GEN6_FORMAT_R8G8_UINT] = CAP( 1, 0, 7, 0),

361

[GEN6_FORMAT_R16_UNORM] = CAP( 1, 4.5, 7, 7),

362

[GEN6_FORMAT_R16_SNORM] = CAP( 1, 6, 7, 0),

363

[GEN6_FORMAT_R16_SINT] = CAP( 1, 0, 7, 0),

364

[GEN6_FORMAT_R16_UINT] = CAP( 1, 0, 7, 0),

365

[GEN6_FORMAT_R16_FLOAT] = CAP( 1, 1, 7, 0),

366

[GEN6_FORMAT_B5G5R5X1_UNORM] = CAP( 1, 1, 7, 0),

367

[GEN6_FORMAT_B5G5R5X1_UNORM_SRGB] = CAP( 1, 1, 0, 0),

368

[GEN6_FORMAT_R8_UNORM] = CAP( 1, 1, 7, 0),

369

[GEN6_FORMAT_R8_SNORM] = CAP( 1, 6, 7, 0),

370

[GEN6_FORMAT_R8_SINT] = CAP( 1, 0, 7, 0),

371

[GEN6_FORMAT_R8_UINT] = CAP( 1, 0, 7, 0),

372

[GEN6_FORMAT_A8_UNORM] = CAP( 1, 1, 7, 0),

373

[GEN6_FORMAT_YCRCB_NORMAL] = CAP( 1, 0, 0, 6),

374

[GEN6_FORMAT_YCRCB_SWAPUVY] = CAP( 1, 0, 0, 6),

375

[GEN6_FORMAT_YCRCB_SWAPUV] = CAP( 1, 0, 0, 6),

376

[GEN6_FORMAT_YCRCB_SWAPY] = CAP( 1, 0, 0, 6),

377

#undef CAP

378

};

379

Courtney Goeltzenleuchter

ab36aa6

2015-07-12 12:40:29 -0600

[diff] [blame^]

380

static const int intel_color_mapping[VK_FORMAT_NUM] = {

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

381

[VK_FORMAT_R4G4_UNORM] = 0,

382

[VK_FORMAT_R4G4_USCALED] = 0,

383

[VK_FORMAT_R4G4B4A4_UNORM] = 0,

384

[VK_FORMAT_R4G4B4A4_USCALED] = 0,

385

[VK_FORMAT_R5G6B5_UNORM] = 0,

386

[VK_FORMAT_R5G6B5_USCALED] = 0,

387

[VK_FORMAT_R5G5B5A1_UNORM] = 0,

388

[VK_FORMAT_R5G5B5A1_USCALED] = 0,

389

[VK_FORMAT_R8_UNORM] = GEN6_FORMAT_R8_UNORM,

390

[VK_FORMAT_R8_SNORM] = GEN6_FORMAT_R8_SNORM,

391

[VK_FORMAT_R8_USCALED] = GEN6_FORMAT_R8_USCALED,

392

[VK_FORMAT_R8_SSCALED] = GEN6_FORMAT_R8_SSCALED,

393

[VK_FORMAT_R8_UINT] = GEN6_FORMAT_R8_UINT,

394

[VK_FORMAT_R8_SINT] = GEN6_FORMAT_R8_SINT,

395

[VK_FORMAT_R8_SRGB] = 0,

396

[VK_FORMAT_R8G8_UNORM] = GEN6_FORMAT_R8G8_UNORM,

397

[VK_FORMAT_R8G8_SNORM] = GEN6_FORMAT_R8G8_SNORM,

398

[VK_FORMAT_R8G8_USCALED] = GEN6_FORMAT_R8G8_USCALED,

399

[VK_FORMAT_R8G8_SSCALED] = GEN6_FORMAT_R8G8_SSCALED,

400

[VK_FORMAT_R8G8_UINT] = GEN6_FORMAT_R8G8_UINT,

401

[VK_FORMAT_R8G8_SINT] = GEN6_FORMAT_R8G8_SINT,

402

[VK_FORMAT_R8G8_SRGB] = 0,

403

[VK_FORMAT_R8G8B8_UNORM] = GEN6_FORMAT_R8G8B8_UNORM,

404

[VK_FORMAT_R8G8B8_SNORM] = GEN6_FORMAT_R8G8B8_SNORM,

405

[VK_FORMAT_R8G8B8_USCALED] = GEN6_FORMAT_R8G8B8_USCALED,

406

[VK_FORMAT_R8G8B8_SSCALED] = GEN6_FORMAT_R8G8B8_SSCALED,

407

[VK_FORMAT_R8G8B8_UINT] = GEN6_FORMAT_R8G8B8_UINT,

408

[VK_FORMAT_R8G8B8_SINT] = GEN6_FORMAT_R8G8B8_SINT,

409

[VK_FORMAT_R8G8B8_SRGB] = GEN6_FORMAT_R8G8B8_UNORM_SRGB,

410

[VK_FORMAT_R8G8B8A8_UNORM] = GEN6_FORMAT_R8G8B8A8_UNORM,

411

[VK_FORMAT_R8G8B8A8_SNORM] = GEN6_FORMAT_R8G8B8A8_SNORM,

412

[VK_FORMAT_R8G8B8A8_USCALED] = GEN6_FORMAT_R8G8B8A8_USCALED,

413

[VK_FORMAT_R8G8B8A8_SSCALED] = GEN6_FORMAT_R8G8B8A8_SSCALED,

414

[VK_FORMAT_R8G8B8A8_UINT] = GEN6_FORMAT_R8G8B8A8_UINT,

415

[VK_FORMAT_R8G8B8A8_SINT] = GEN6_FORMAT_R8G8B8A8_SINT,

416

[VK_FORMAT_R8G8B8A8_SRGB] = GEN6_FORMAT_R8G8B8A8_UNORM_SRGB,

417

[VK_FORMAT_R10G10B10A2_UNORM] = GEN6_FORMAT_R10G10B10A2_UNORM,

418

[VK_FORMAT_R10G10B10A2_SNORM] = GEN6_FORMAT_R10G10B10A2_SNORM,

419

[VK_FORMAT_R10G10B10A2_USCALED] = GEN6_FORMAT_R10G10B10A2_USCALED,

420

[VK_FORMAT_R10G10B10A2_SSCALED] = GEN6_FORMAT_R10G10B10A2_SSCALED,

421

[VK_FORMAT_R10G10B10A2_UINT] = GEN6_FORMAT_R10G10B10A2_UINT,

422

[VK_FORMAT_R10G10B10A2_SINT] = GEN6_FORMAT_R10G10B10A2_SINT,

423

[VK_FORMAT_R16_UNORM] = GEN6_FORMAT_R16_UNORM,

424

[VK_FORMAT_R16_SNORM] = GEN6_FORMAT_R16_SNORM,

425

[VK_FORMAT_R16_USCALED] = GEN6_FORMAT_R16_USCALED,

426

[VK_FORMAT_R16_SSCALED] = GEN6_FORMAT_R16_SSCALED,

427

[VK_FORMAT_R16_UINT] = GEN6_FORMAT_R16_UINT,

428

[VK_FORMAT_R16_SINT] = GEN6_FORMAT_R16_SINT,

429

[VK_FORMAT_R16_SFLOAT] = GEN6_FORMAT_R16_FLOAT,

430

[VK_FORMAT_R16G16_UNORM] = GEN6_FORMAT_R16G16_UNORM,

431

[VK_FORMAT_R16G16_SNORM] = GEN6_FORMAT_R16G16_SNORM,

432

[VK_FORMAT_R16G16_USCALED] = GEN6_FORMAT_R16G16_USCALED,

433

[VK_FORMAT_R16G16_SSCALED] = GEN6_FORMAT_R16G16_SSCALED,

434

[VK_FORMAT_R16G16_UINT] = GEN6_FORMAT_R16G16_UINT,

435

[VK_FORMAT_R16G16_SINT] = GEN6_FORMAT_R16G16_SINT,

436

[VK_FORMAT_R16G16_SFLOAT] = GEN6_FORMAT_R16G16_FLOAT,

437

[VK_FORMAT_R16G16B16_UNORM] = GEN6_FORMAT_R16G16B16_UNORM,

438

[VK_FORMAT_R16G16B16_SNORM] = GEN6_FORMAT_R16G16B16_SNORM,

439

[VK_FORMAT_R16G16B16_USCALED] = GEN6_FORMAT_R16G16B16_USCALED,

440

[VK_FORMAT_R16G16B16_SSCALED] = GEN6_FORMAT_R16G16B16_SSCALED,

441

[VK_FORMAT_R16G16B16_UINT] = GEN6_FORMAT_R16G16B16_UINT,

442

[VK_FORMAT_R16G16B16_SINT] = GEN6_FORMAT_R16G16B16_SINT,

443

[VK_FORMAT_R16G16B16_SFLOAT] = 0,

444

[VK_FORMAT_R16G16B16A16_UNORM] = GEN6_FORMAT_R16G16B16A16_UNORM,

445

[VK_FORMAT_R16G16B16A16_SNORM] = GEN6_FORMAT_R16G16B16A16_SNORM,

446

[VK_FORMAT_R16G16B16A16_USCALED] = GEN6_FORMAT_R16G16B16A16_USCALED,

447

[VK_FORMAT_R16G16B16A16_SSCALED] = GEN6_FORMAT_R16G16B16A16_SSCALED,

448

[VK_FORMAT_R16G16B16A16_UINT] = GEN6_FORMAT_R16G16B16A16_UINT,

449

[VK_FORMAT_R16G16B16A16_SINT] = GEN6_FORMAT_R16G16B16A16_SINT,

450

[VK_FORMAT_R16G16B16A16_SFLOAT] = GEN6_FORMAT_R16G16B16A16_FLOAT,

451

[VK_FORMAT_R32_UINT] = GEN6_FORMAT_R32_UINT,

452

[VK_FORMAT_R32_SINT] = GEN6_FORMAT_R32_SINT,

453

[VK_FORMAT_R32_SFLOAT] = GEN6_FORMAT_R32_FLOAT,

454

[VK_FORMAT_R32G32_UINT] = GEN6_FORMAT_R32G32_UINT,

455

[VK_FORMAT_R32G32_SINT] = GEN6_FORMAT_R32G32_SINT,

456

[VK_FORMAT_R32G32_SFLOAT] = GEN6_FORMAT_R32G32_FLOAT,

457

[VK_FORMAT_R32G32B32_UINT] = GEN6_FORMAT_R32G32B32_UINT,

458

[VK_FORMAT_R32G32B32_SINT] = GEN6_FORMAT_R32G32B32_SINT,

459

[VK_FORMAT_R32G32B32_SFLOAT] = GEN6_FORMAT_R32G32B32_FLOAT,

460

[VK_FORMAT_R32G32B32A32_UINT] = GEN6_FORMAT_R32G32B32A32_UINT,

461

[VK_FORMAT_R32G32B32A32_SINT] = GEN6_FORMAT_R32G32B32A32_SINT,

462

[VK_FORMAT_R32G32B32A32_SFLOAT] = GEN6_FORMAT_R32G32B32A32_FLOAT,

463

[VK_FORMAT_R64_SFLOAT] = GEN6_FORMAT_R64_FLOAT,

464

[VK_FORMAT_R64G64_SFLOAT] = GEN6_FORMAT_R64G64_FLOAT,

465

[VK_FORMAT_R64G64B64_SFLOAT] = GEN6_FORMAT_R64G64B64_FLOAT,

466

[VK_FORMAT_R64G64B64A64_SFLOAT] = GEN6_FORMAT_R64G64B64A64_FLOAT,

467

[VK_FORMAT_R11G11B10_UFLOAT] = GEN6_FORMAT_R11G11B10_FLOAT,

468

[VK_FORMAT_R9G9B9E5_UFLOAT] = GEN6_FORMAT_R9G9B9E5_SHAREDEXP,

Cody Northrop

ec2a3e1

2015-04-28 13:31:42 -0600

[diff] [blame]

469

[VK_FORMAT_BC1_RGB_UNORM] = GEN6_FORMAT_DXT1_RGB,

470

[VK_FORMAT_BC1_RGB_SRGB] = GEN6_FORMAT_DXT1_RGB_SRGB,

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

471

[VK_FORMAT_BC2_UNORM] = GEN6_FORMAT_BC2_UNORM,

Cody Northrop

ec2a3e1

2015-04-28 13:31:42 -0600

[diff] [blame]

472

[VK_FORMAT_BC1_RGBA_UNORM] = GEN6_FORMAT_BC1_UNORM,

473

[VK_FORMAT_BC1_RGBA_SRGB] = GEN6_FORMAT_BC1_UNORM_SRGB,

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

474

[VK_FORMAT_BC2_SRGB] = GEN6_FORMAT_BC2_UNORM_SRGB,

475

[VK_FORMAT_BC3_UNORM] = GEN6_FORMAT_BC3_UNORM,

476

[VK_FORMAT_BC3_SRGB] = GEN6_FORMAT_BC3_UNORM_SRGB,

477

[VK_FORMAT_BC4_UNORM] = GEN6_FORMAT_BC4_UNORM,

478

[VK_FORMAT_BC4_SNORM] = GEN6_FORMAT_BC4_SNORM,

479

[VK_FORMAT_BC5_UNORM] = GEN6_FORMAT_BC5_UNORM,

480

[VK_FORMAT_BC5_SNORM] = GEN6_FORMAT_BC5_SNORM,

481

[VK_FORMAT_BC6H_UFLOAT] = GEN6_FORMAT_BC6H_UF16,

482

[VK_FORMAT_BC6H_SFLOAT] = GEN6_FORMAT_BC6H_SF16,

483

[VK_FORMAT_BC7_UNORM] = GEN6_FORMAT_BC7_UNORM,

484

[VK_FORMAT_BC7_SRGB] = GEN6_FORMAT_BC7_UNORM_SRGB,

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

485

/* TODO: Implement for remaining compressed formats. */

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

486

[VK_FORMAT_ETC2_R8G8B8_UNORM] = 0,

487

[VK_FORMAT_ETC2_R8G8B8A1_UNORM] = 0,

488

[VK_FORMAT_ETC2_R8G8B8A8_UNORM] = 0,

489

[VK_FORMAT_EAC_R11_UNORM] = 0,

490

[VK_FORMAT_EAC_R11_SNORM] = 0,

491

[VK_FORMAT_EAC_R11G11_UNORM] = 0,

492

[VK_FORMAT_EAC_R11G11_SNORM] = 0,

493

[VK_FORMAT_ASTC_4x4_UNORM] = 0,

494

[VK_FORMAT_ASTC_4x4_SRGB] = 0,

495

[VK_FORMAT_ASTC_5x4_UNORM] = 0,

496

[VK_FORMAT_ASTC_5x4_SRGB] = 0,

497

[VK_FORMAT_ASTC_5x5_UNORM] = 0,

498

[VK_FORMAT_ASTC_5x5_SRGB] = 0,

499

[VK_FORMAT_ASTC_6x5_UNORM] = 0,

500

[VK_FORMAT_ASTC_6x5_SRGB] = 0,

501

[VK_FORMAT_ASTC_6x6_UNORM] = 0,

502

[VK_FORMAT_ASTC_6x6_SRGB] = 0,

503

[VK_FORMAT_ASTC_8x5_UNORM] = 0,

504

[VK_FORMAT_ASTC_8x5_SRGB] = 0,

505

[VK_FORMAT_ASTC_8x6_UNORM] = 0,

506

[VK_FORMAT_ASTC_8x6_SRGB] = 0,

507

[VK_FORMAT_ASTC_8x8_UNORM] = 0,

508

[VK_FORMAT_ASTC_8x8_SRGB] = 0,

509

[VK_FORMAT_ASTC_10x5_UNORM] = 0,

510

[VK_FORMAT_ASTC_10x5_SRGB] = 0,

511

[VK_FORMAT_ASTC_10x6_UNORM] = 0,

512

[VK_FORMAT_ASTC_10x6_SRGB] = 0,

513

[VK_FORMAT_ASTC_10x8_UNORM] = 0,

514

[VK_FORMAT_ASTC_10x8_SRGB] = 0,

515

[VK_FORMAT_ASTC_10x10_UNORM] = 0,

516

[VK_FORMAT_ASTC_10x10_SRGB] = 0,

517

[VK_FORMAT_ASTC_12x10_UNORM] = 0,

518

[VK_FORMAT_ASTC_12x10_SRGB] = 0,

519

[VK_FORMAT_ASTC_12x12_UNORM] = 0,

520

[VK_FORMAT_ASTC_12x12_SRGB] = 0,

521

[VK_FORMAT_B5G6R5_UNORM] = GEN6_FORMAT_B5G6R5_UNORM,

522

[VK_FORMAT_B5G6R5_USCALED] = 0,

523

[VK_FORMAT_B8G8R8_UNORM] = 0,

524

[VK_FORMAT_B8G8R8_SNORM] = 0,

525

[VK_FORMAT_B8G8R8_USCALED] = 0,

526

[VK_FORMAT_B8G8R8_SSCALED] = 0,

527

[VK_FORMAT_B8G8R8_UINT] = 0,

528

[VK_FORMAT_B8G8R8_SINT] = 0,

529

[VK_FORMAT_B8G8R8_SRGB] = GEN6_FORMAT_B5G6R5_UNORM_SRGB,

530

[VK_FORMAT_B8G8R8A8_UNORM] = GEN6_FORMAT_B8G8R8A8_UNORM,

531

[VK_FORMAT_B8G8R8A8_SNORM] = 0,

532

[VK_FORMAT_B8G8R8A8_USCALED] = 0,

533

[VK_FORMAT_B8G8R8A8_SSCALED] = 0,

534

[VK_FORMAT_B8G8R8A8_UINT] = 0,

535

[VK_FORMAT_B8G8R8A8_SINT] = 0,

536

[VK_FORMAT_B8G8R8A8_SRGB] = GEN6_FORMAT_B8G8R8A8_UNORM_SRGB,

537

[VK_FORMAT_B10G10R10A2_UNORM] = GEN6_FORMAT_B10G10R10A2_UNORM,

538

[VK_FORMAT_B10G10R10A2_SNORM] = GEN6_FORMAT_B10G10R10A2_SNORM,

539

[VK_FORMAT_B10G10R10A2_USCALED] = GEN6_FORMAT_B10G10R10A2_USCALED,

540

[VK_FORMAT_B10G10R10A2_SSCALED] = GEN6_FORMAT_B10G10R10A2_SSCALED,

541

[VK_FORMAT_B10G10R10A2_UINT] = GEN6_FORMAT_B10G10R10A2_UINT,

542

[VK_FORMAT_B10G10R10A2_SINT] = GEN6_FORMAT_B10G10R10A2_SINT

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

543

};

544

Chia-I Wu

fb24026

2014-08-16 13:26:06 +0800

[diff] [blame]

545

int intel_format_translate_color(const struct intel_gpu *gpu,

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

546

VkFormat format)

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

{

int fmt;

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

550

assert(!icd_format_is_undef(format));

551

assert(!icd_format_is_ds(format));

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

552

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

553

fmt = intel_color_mapping[format];

554

/* TODO: Implement for remaining compressed formats. */

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

555

556

/* GEN6_FORMAT_R32G32B32A32_FLOAT happens to be 0 */

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

557

if (format == VK_FORMAT_R32G32B32A32_SFLOAT)

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

assert(fmt == 0);

else if (!fmt)

fmt = -1;

return fmt;

}

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

565

static VkFlags intel_format_get_color_features(const struct intel_gpu *gpu,

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

566

VkFormat format)

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

567

{

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

568

const int fmt = intel_format_translate_color(gpu, format);

Chia-I Wu

2015-01-18 14:51:02 +0800

[diff] [blame]

569

const struct intel_vf_cap *vf;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

570

const struct intel_sampler_cap *sampler;

571

const struct intel_dp_cap *dp;

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

572

VkFlags features;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

if (fmt < 0)

return 0;

sampler = (fmt < ARRAY_SIZE(intel_sampler_caps)) ?

578

&intel_sampler_caps[fmt] : NULL;

Chia-I Wu

2015-01-18 14:51:02 +0800

[diff] [blame]

579

vf = (fmt < ARRAY_SIZE(intel_vf_caps)) ? &intel_vf_caps[fmt] : NULL;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

580

dp = (fmt < ARRAY_SIZE(intel_dp_caps)) ? &intel_dp_caps[fmt] : NULL;

581

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

582

features = VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

583

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

584

#define TEST(gpu, func, cap) ((func) && (func)->cap && \

585

intel_gpu_gen(gpu) >= (func)->cap)

586

if (TEST(gpu, vf, vertex_element)) {

Chia-I Wu

2015-01-18 14:51:02 +0800

[diff] [blame]

587

/* no feature bit to set */

588

}

589

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

590

if (TEST(gpu, sampler, sampling)) {

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

591

if (icd_format_is_int(format) ||

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

592

TEST(gpu, sampler, filtering))

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

593

features |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

594

}

595

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

596

if (TEST(gpu, dp, typed_write))

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

597

features |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

598

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

599

if (TEST(gpu, dp, rt_write)) {

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

600

features |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

601

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

602

if (TEST(gpu, dp, rt_write_blending))

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

603

features |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

604

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

605

if (features & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT) {

606

features |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT |

607

VK_FORMAT_FEATURE_CONVERSION_BIT;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

}

}

#undef TEST

return features;

}

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

615

static VkFlags intel_format_get_ds_features(const struct intel_gpu *gpu,

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

616

VkFormat format)

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

617

{

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

618

VkFlags features;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

619

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

620

assert(icd_format_is_ds(format));

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

621

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

622

switch (format) {

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

623

case VK_FORMAT_S8_UINT:

624

features = VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT;;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

625

break;

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

626

case VK_FORMAT_D16_UNORM:

627

case VK_FORMAT_D24_UNORM:

628

case VK_FORMAT_D32_SFLOAT:

629

features = VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

630

break;

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

631

case VK_FORMAT_D16_UNORM_S8_UINT:

632

case VK_FORMAT_D24_UNORM_S8_UINT:

633

case VK_FORMAT_D32_SFLOAT_S8_UINT:

634

features = VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT |

635

VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

break;

default:

features = 0;

break;

}

return features;

}

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

645

static VkFlags intel_format_get_raw_features(const struct intel_gpu *gpu,

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

646

VkFormat format)

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

647

{

Tony Barbour

2015-04-16 15:59:00 -0600

[diff] [blame]

648

return (format == VK_FORMAT_UNDEFINED) ?

649

VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT : 0;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

650

}

651

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

652

static void intel_format_get_props(const struct intel_gpu *gpu,

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

653

VkFormat format,

654

VkFormatProperties *props)

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

655

{

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

656

if (icd_format_is_undef(format)) {

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

657

props->linearTilingFeatures =

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

658

intel_format_get_raw_features(gpu, format);

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

659

props->optimalTilingFeatures = 0;

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

660

} else if(icd_format_is_color(format)) {

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

661

props->linearTilingFeatures =

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

662

intel_format_get_color_features(gpu, format);

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

663

props->optimalTilingFeatures = props->linearTilingFeatures;

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

664

} else if(icd_format_is_ds(format)) {

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

665

props->linearTilingFeatures = 0;

666

props->optimalTilingFeatures =

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

667

intel_format_get_ds_features(gpu, format);

Jeremy Hayes

2015-01-23 08:51:43 -0700

[diff] [blame]

668

} else {

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

669

props->linearTilingFeatures = 0;

670

props->optimalTilingFeatures = 0;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

}

}

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

674

ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceFormatInfo(

675

VkPhysicalDevice physicalDevice,

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

676

VkFormat format,

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

677

VkFormatProperties* pFormatInfo)

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

678

{

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

679

const struct intel_gpu *gpu = intel_gpu(physicalDevice);

Courtney Goeltzenleuchter

2015-04-10 08:34:15 -0600

[diff] [blame]

680

VkResult ret = VK_SUCCESS;

Chia-I Wu

2014-08-07 14:21:43 +0800

[diff] [blame]

681

Chris Forbes

2015-06-21 22:55:02 +1200

[diff] [blame]

682

intel_format_get_props(gpu, format, pFormatInfo);

Chia-I Wu