blob: 2767295ab08534d042e7112f999afd6c5d33b7ad [file] [log] [blame]
Chia-I Wu00b51a82014-09-09 12:07:37 +08001/*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28#include <stdio.h>
29#include <stdarg.h>
Chia-I Wu34579502014-10-25 14:44:53 +080030#include "compiler/pipeline/pipeline_compiler_interface.h"
Chia-I Wu00b51a82014-09-09 12:07:37 +080031#include "genhw/genhw.h"
32#include "kmd/winsys.h"
33#include "cmd_priv.h"
34
35#define READ(dw, field) (((dw) & field ## __MASK) >> field ## __SHIFT)
36
37static const uint32_t *
38writer_pointer(const struct intel_cmd *cmd,
39 enum intel_cmd_writer_type which,
40 unsigned offset)
41{
42 const struct intel_cmd_writer *writer = &cmd->writers[which];
43 return (const uint32_t *) ((const char *) writer->ptr + offset);
44}
45
46static uint32_t
47writer_dw(const struct intel_cmd *cmd,
48 enum intel_cmd_writer_type which,
49 unsigned offset, unsigned dw_index,
50 const char *format, ...)
51{
52 const uint32_t *dw = writer_pointer(cmd, which, offset);
53 va_list ap;
54 char desc[16];
55 int len;
56
57 fprintf(stderr, "0x%08x: 0x%08x: ",
58 offset + (dw_index << 2), dw[dw_index]);
59
60 va_start(ap, format);
61 len = vsnprintf(desc, sizeof(desc), format, ap);
62 va_end(ap);
63
64 if (len >= sizeof(desc)) {
65 len = sizeof(desc) - 1;
66 desc[len] = '\0';
67 }
68
69 if (desc[len - 1] == '\n') {
70 desc[len - 1] = '\0';
71 fprintf(stderr, "%8s: \n", desc);
72 } else {
73 fprintf(stderr, "%8s: ", desc);
74 }
75
76 return dw[dw_index];
77}
78
79static void
80writer_decode_blob(const struct intel_cmd *cmd,
81 enum intel_cmd_writer_type which,
82 const struct intel_cmd_item *item)
83{
Chia-I Wu238cabd2014-10-25 13:59:45 +080084 const unsigned state_size = sizeof(uint32_t);
Chia-I Wu00b51a82014-09-09 12:07:37 +080085 const unsigned count = item->size / state_size;
86 unsigned offset = item->offset;
87 unsigned i;
88
Chia-I Wu238cabd2014-10-25 13:59:45 +080089 for (i = 0; i < count; i += 4) {
Chia-I Wu00b51a82014-09-09 12:07:37 +080090 const uint32_t *dw = writer_pointer(cmd, which, offset);
91
Chia-I Wu238cabd2014-10-25 13:59:45 +080092 writer_dw(cmd, which, offset, 0, "BLOB%d", i / 4);
Chia-I Wu00b51a82014-09-09 12:07:37 +080093
Chia-I Wu238cabd2014-10-25 13:59:45 +080094 switch (count - i) {
95 case 1:
96 fprintf(stderr, "(%10.4f, %10c, %10c, %10c) "
97 "(0x%08x, %10c, %10c, %10c)\n",
98 u_uif(dw[0]), 'X', 'X', 'X',
99 dw[0], 'X', 'X', 'X');
100 break;
101 case 2:
102 fprintf(stderr, "(%10.4f, %10.4f, %10c, %10c) "
103 "(0x%08x, 0x%08x, %10c, %10c)\n",
104 u_uif(dw[0]), u_uif(dw[1]), 'X', 'X',
105 dw[0], dw[1], 'X', 'X');
106 break;
107 case 3:
108 fprintf(stderr, "(%10.4f, %10.4f, %10.4f, %10c) "
109 "(0x%08x, 0x%08x, 0x%08x, %10c)\n",
110 u_uif(dw[0]), u_uif(dw[1]), u_uif(dw[2]), 'X',
111 dw[0], dw[1], dw[2], 'X');
112 break;
113 default:
114 fprintf(stderr, "(%10.4f, %10.4f, %10.4f, %10.4f) "
115 "(0x%08x, 0x%08x, 0x%08x, 0x%08x)\n",
116 u_uif(dw[0]), u_uif(dw[1]), u_uif(dw[2]), u_uif(dw[3]),
117 dw[0], dw[1], dw[2], dw[3]);
118 break;
119 }
120
121 offset += state_size * 4;
Chia-I Wu00b51a82014-09-09 12:07:37 +0800122 }
123}
124
125static void
126writer_decode_clip_viewport(const struct intel_cmd *cmd,
127 enum intel_cmd_writer_type which,
128 const struct intel_cmd_item *item)
129{
130 const unsigned state_size = sizeof(uint32_t) * 4;
131 const unsigned count = item->size / state_size;
132 unsigned offset = item->offset;
133 unsigned i;
134
135 for (i = 0; i < count; i++) {
136 uint32_t dw;
137
138 dw = writer_dw(cmd, which, offset, 0, "CLIP VP%d", i);
139 fprintf(stderr, "xmin = %f\n", u_uif(dw));
140
141 dw = writer_dw(cmd, which, offset, 1, "CLIP VP%d", i);
142 fprintf(stderr, "xmax = %f\n", u_uif(dw));
143
144 dw = writer_dw(cmd, which, offset, 2, "CLIP VP%d", i);
145 fprintf(stderr, "ymin = %f\n", u_uif(dw));
146
147 dw = writer_dw(cmd, which, offset, 3, "CLIP VP%d", i);
148 fprintf(stderr, "ymax = %f\n", u_uif(dw));
149
150 offset += state_size;
151 }
152}
153
154static void
155writer_decode_sf_clip_viewport_gen7(const struct intel_cmd *cmd,
156 enum intel_cmd_writer_type which,
157 const struct intel_cmd_item *item)
158{
159 const unsigned state_size = sizeof(uint32_t) * 16;
160 const unsigned count = item->size / state_size;
161 unsigned offset = item->offset;
162 unsigned i;
163
164 for (i = 0; i < count; i++) {
165 uint32_t dw;
166
167 dw = writer_dw(cmd, which, offset, 0, "SF_CLIP VP%d", i);
168 fprintf(stderr, "m00 = %f\n", u_uif(dw));
169
170 dw = writer_dw(cmd, which, offset, 1, "SF_CLIP VP%d", i);
171 fprintf(stderr, "m11 = %f\n", u_uif(dw));
172
173 dw = writer_dw(cmd, which, offset, 2, "SF_CLIP VP%d", i);
174 fprintf(stderr, "m22 = %f\n", u_uif(dw));
175
176 dw = writer_dw(cmd, which, offset, 3, "SF_CLIP VP%d", i);
177 fprintf(stderr, "m30 = %f\n", u_uif(dw));
178
179 dw = writer_dw(cmd, which, offset, 4, "SF_CLIP VP%d", i);
180 fprintf(stderr, "m31 = %f\n", u_uif(dw));
181
182 dw = writer_dw(cmd, which, offset, 5, "SF_CLIP VP%d", i);
183 fprintf(stderr, "m32 = %f\n", u_uif(dw));
184
185 dw = writer_dw(cmd, which, offset, 8, "SF_CLIP VP%d", i);
186 fprintf(stderr, "guardband xmin = %f\n", u_uif(dw));
187
188 dw = writer_dw(cmd, which, offset, 9, "SF_CLIP VP%d", i);
189 fprintf(stderr, "guardband xmax = %f\n", u_uif(dw));
190
191 dw = writer_dw(cmd, which, offset, 10, "SF_CLIP VP%d", i);
192 fprintf(stderr, "guardband ymin = %f\n", u_uif(dw));
193
194 dw = writer_dw(cmd, which, offset, 11, "SF_CLIP VP%d", i);
195 fprintf(stderr, "guardband ymax = %f\n", u_uif(dw));
196
197 offset += state_size;
198 }
199}
200
201static void
202writer_decode_sf_viewport_gen6(const struct intel_cmd *cmd,
203 enum intel_cmd_writer_type which,
204 const struct intel_cmd_item *item)
205{
206 const unsigned state_size = sizeof(uint32_t) * 8;
207 const unsigned count = item->size / state_size;
208 unsigned offset = item->offset;
209 unsigned i;
210
211 for (i = 0; i < count; i++) {
212 uint32_t dw;
213
214 dw = writer_dw(cmd, which, offset, 0, "SF VP%d", i);
215 fprintf(stderr, "m00 = %f\n", u_uif(dw));
216
217 dw = writer_dw(cmd, which, offset, 1, "SF VP%d", i);
218 fprintf(stderr, "m11 = %f\n", u_uif(dw));
219
220 dw = writer_dw(cmd, which, offset, 2, "SF VP%d", i);
221 fprintf(stderr, "m22 = %f\n", u_uif(dw));
222
223 dw = writer_dw(cmd, which, offset, 3, "SF VP%d", i);
224 fprintf(stderr, "m30 = %f\n", u_uif(dw));
225
226 dw = writer_dw(cmd, which, offset, 4, "SF VP%d", i);
227 fprintf(stderr, "m31 = %f\n", u_uif(dw));
228
229 dw = writer_dw(cmd, which, offset, 5, "SF VP%d", i);
230 fprintf(stderr, "m32 = %f\n", u_uif(dw));
231
232 offset += state_size;
233 }
234}
235
236static void
237writer_decode_sf_viewport(const struct intel_cmd *cmd,
238 enum intel_cmd_writer_type which,
239 const struct intel_cmd_item *item)
240{
241 if (cmd_gen(cmd) >= INTEL_GEN(7))
242 writer_decode_sf_clip_viewport_gen7(cmd, which, item);
243 else
244 writer_decode_sf_viewport_gen6(cmd, which, item);
245}
246
247static void
248writer_decode_scissor_rect(const struct intel_cmd *cmd,
249 enum intel_cmd_writer_type which,
250 const struct intel_cmd_item *item)
251{
252 const unsigned state_size = sizeof(uint32_t) * 2;
253 const unsigned count = item->size / state_size;
254 unsigned offset = item->offset;
255 unsigned i;
256
257 for (i = 0; i < count; i++) {
258 uint32_t dw;
259
260 dw = writer_dw(cmd, which, offset, 0, "SCISSOR%d", i);
261 fprintf(stderr, "xmin %d, ymin %d\n",
262 READ(dw, GEN6_SCISSOR_DW0_MIN_X),
263 READ(dw, GEN6_SCISSOR_DW0_MIN_Y));
264
265 dw = writer_dw(cmd, which, offset, 1, "SCISSOR%d", i);
266 fprintf(stderr, "xmax %d, ymax %d\n",
267 READ(dw, GEN6_SCISSOR_DW1_MAX_X),
268 READ(dw, GEN6_SCISSOR_DW1_MAX_Y));
269
270 offset += state_size;
271 }
272}
273
274static void
275writer_decode_cc_viewport(const struct intel_cmd *cmd,
276 enum intel_cmd_writer_type which,
277 const struct intel_cmd_item *item)
278{
279 const unsigned state_size = sizeof(uint32_t) * 2;
280 const unsigned count = item->size / state_size;
281 unsigned offset = item->offset;
282 unsigned i;
283
284 for (i = 0; i < count; i++) {
285 uint32_t dw;
286
287 dw = writer_dw(cmd, which, offset, 0, "CC VP%d", i);
288 fprintf(stderr, "min_depth = %f\n", u_uif(dw));
289
290 dw = writer_dw(cmd, which, offset, 1, "CC VP%d", i);
291 fprintf(stderr, "max_depth = %f\n", u_uif(dw));
292
293 offset += state_size;
294 }
295}
296
297static void
298writer_decode_color_calc(const struct intel_cmd *cmd,
299 enum intel_cmd_writer_type which,
300 const struct intel_cmd_item *item)
301{
302 uint32_t dw;
303
304 dw = writer_dw(cmd, which, item->offset, 0, "CC");
305 fprintf(stderr, "alpha test format %s, round disable %d, "
306 "stencil ref %d, bf stencil ref %d\n",
307 READ(dw, GEN6_CC_DW0_ALPHATEST) ? "FLOAT32" : "UNORM8",
308 (bool) (dw & GEN6_CC_DW0_ROUND_DISABLE_DISABLE),
309 READ(dw, GEN6_CC_DW0_STENCIL0_REF),
310 READ(dw, GEN6_CC_DW0_STENCIL1_REF));
311
312 writer_dw(cmd, which, item->offset, 1, "CC\n");
313
314 dw = writer_dw(cmd, which, item->offset, 2, "CC");
315 fprintf(stderr, "constant red %f\n", u_uif(dw));
316
317 dw = writer_dw(cmd, which, item->offset, 3, "CC");
318 fprintf(stderr, "constant green %f\n", u_uif(dw));
319
320 dw = writer_dw(cmd, which, item->offset, 4, "CC");
321 fprintf(stderr, "constant blue %f\n", u_uif(dw));
322
323 dw = writer_dw(cmd, which, item->offset, 5, "CC");
324 fprintf(stderr, "constant alpha %f\n", u_uif(dw));
325}
326
327static void
328writer_decode_depth_stencil(const struct intel_cmd *cmd,
329 enum intel_cmd_writer_type which,
330 const struct intel_cmd_item *item)
331{
332 uint32_t dw;
333
334 dw = writer_dw(cmd, which, item->offset, 0, "D_S");
335 fprintf(stderr, "stencil %sable, func %d, write %sable\n",
336 (dw & GEN6_ZS_DW0_STENCIL_TEST_ENABLE) ? "en" : "dis",
337 READ(dw, GEN6_ZS_DW0_STENCIL0_FUNC),
338 (dw & GEN6_ZS_DW0_STENCIL_WRITE_ENABLE) ? "en" : "dis");
339
340 dw = writer_dw(cmd, which, item->offset, 1, "D_S");
341 fprintf(stderr, "stencil test mask 0x%x, write mask 0x%x\n",
342 READ(dw, GEN6_ZS_DW1_STENCIL0_VALUEMASK),
343 READ(dw, GEN6_ZS_DW1_STENCIL0_WRITEMASK));
344
345 dw = writer_dw(cmd, which, item->offset, 2, "D_S");
346 fprintf(stderr, "depth test %sable, func %d, write %sable\n",
347 (dw & GEN6_ZS_DW2_DEPTH_TEST_ENABLE) ? "en" : "dis",
348 READ(dw, GEN6_ZS_DW2_DEPTH_FUNC),
349 (dw & GEN6_ZS_DW2_DEPTH_WRITE_ENABLE) ? "en" : "dis");
350}
351
352static void
353writer_decode_blend(const struct intel_cmd *cmd,
354 enum intel_cmd_writer_type which,
355 const struct intel_cmd_item *item)
356{
357 const unsigned state_size = sizeof(uint32_t) * 2;
358 const unsigned count = item->size / state_size;
359 unsigned offset = item->offset;
360 unsigned i;
361
362 for (i = 0; i < count; i++) {
363 writer_dw(cmd, which, offset, 0, "BLEND%d\n", i);
364 writer_dw(cmd, which, offset, 1, "BLEND%d\n", i);
365
366 offset += state_size;
367 }
368}
369
370static void
371writer_decode_sampler(const struct intel_cmd *cmd,
372 enum intel_cmd_writer_type which,
373 const struct intel_cmd_item *item)
374{
375 const unsigned state_size = sizeof(uint32_t) * 4;
376 const unsigned count = item->size / state_size;
377 unsigned offset = item->offset;
378 unsigned i;
379
380 for (i = 0; i < count; i++) {
381 writer_dw(cmd, which, offset, 0, "WM SAMP%d", i);
382 fprintf(stderr, "filtering\n");
383
384 writer_dw(cmd, which, offset, 1, "WM SAMP%d", i);
385 fprintf(stderr, "wrapping, lod\n");
386
387 writer_dw(cmd, which, offset, 2, "WM SAMP%d", i);
388 fprintf(stderr, "default color pointer\n");
389
390 writer_dw(cmd, which, offset, 3, "WM SAMP%d", i);
391 fprintf(stderr, "chroma key, aniso\n");
392
393 offset += state_size;
394 }
395}
396
397static void
398writer_decode_surface_gen7(const struct intel_cmd *cmd,
399 enum intel_cmd_writer_type which,
400 const struct intel_cmd_item *item)
401{
402 uint32_t dw;
403
404 dw = writer_dw(cmd, which, item->offset, 0, "SURF");
405 fprintf(stderr, "type 0x%x, format 0x%x, tiling %d, %s array\n",
406 READ(dw, GEN7_SURFACE_DW0_TYPE),
407 READ(dw, GEN7_SURFACE_DW0_FORMAT),
408 READ(dw, GEN7_SURFACE_DW0_TILING),
409 (dw & GEN7_SURFACE_DW0_IS_ARRAY) ? "is" : "not");
410
411 writer_dw(cmd, which, item->offset, 1, "SURF");
412 fprintf(stderr, "offset\n");
413
414 dw = writer_dw(cmd, which, item->offset, 2, "SURF");
415 fprintf(stderr, "%dx%d size\n",
416 READ(dw, GEN7_SURFACE_DW2_WIDTH),
417 READ(dw, GEN7_SURFACE_DW2_HEIGHT));
418
419 dw = writer_dw(cmd, which, item->offset, 3, "SURF");
420 fprintf(stderr, "depth %d, pitch %d\n",
421 READ(dw, GEN7_SURFACE_DW3_DEPTH),
422 READ(dw, GEN7_SURFACE_DW3_PITCH));
423
424 dw = writer_dw(cmd, which, item->offset, 4, "SURF");
425 fprintf(stderr, "min array element %d, array extent %d\n",
426 READ(dw, GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT),
427 READ(dw, GEN7_SURFACE_DW4_RT_VIEW_EXTENT));
428
429 dw = writer_dw(cmd, which, item->offset, 5, "SURF");
430 fprintf(stderr, "mip base %d, mips %d, x,y offset: %d,%d\n",
431 READ(dw, GEN7_SURFACE_DW5_MIN_LOD),
432 READ(dw, GEN7_SURFACE_DW5_MIP_COUNT_LOD),
433 READ(dw, GEN7_SURFACE_DW5_X_OFFSET),
434 READ(dw, GEN7_SURFACE_DW5_Y_OFFSET));
435
436 writer_dw(cmd, which, item->offset, 6, "SURF\n");
437 writer_dw(cmd, which, item->offset, 7, "SURF\n");
438}
439
440static void
441writer_decode_surface_gen6(const struct intel_cmd *cmd,
442 enum intel_cmd_writer_type which,
443 const struct intel_cmd_item *item)
444{
445 uint32_t dw;
446
447 dw = writer_dw(cmd, which, item->offset, 0, "SURF");
448 fprintf(stderr, "type 0x%x, format 0x%x\n",
449 READ(dw, GEN6_SURFACE_DW0_TYPE),
450 READ(dw, GEN6_SURFACE_DW0_FORMAT));
451
452 writer_dw(cmd, which, item->offset, 1, "SURF");
453 fprintf(stderr, "offset\n");
454
455 dw = writer_dw(cmd, which, item->offset, 2, "SURF");
456 fprintf(stderr, "%dx%d size, %d mips\n",
457 READ(dw, GEN6_SURFACE_DW2_WIDTH),
458 READ(dw, GEN6_SURFACE_DW2_HEIGHT),
459 READ(dw, GEN6_SURFACE_DW2_MIP_COUNT_LOD));
460
461 dw = writer_dw(cmd, which, item->offset, 3, "SURF");
462 fprintf(stderr, "pitch %d, tiling %d\n",
463 READ(dw, GEN6_SURFACE_DW3_PITCH),
464 READ(dw, GEN6_SURFACE_DW3_TILING));
465
466 dw = writer_dw(cmd, which, item->offset, 4, "SURF");
467 fprintf(stderr, "mip base %d\n",
468 READ(dw, GEN6_SURFACE_DW4_MIN_LOD));
469
470 dw = writer_dw(cmd, which, item->offset, 5, "SURF");
471 fprintf(stderr, "x,y offset: %d,%d\n",
472 READ(dw, GEN6_SURFACE_DW5_X_OFFSET),
473 READ(dw, GEN6_SURFACE_DW5_Y_OFFSET));
474}
475
476static void
477writer_decode_surface(const struct intel_cmd *cmd,
478 enum intel_cmd_writer_type which,
479 const struct intel_cmd_item *item)
480{
481 if (cmd_gen(cmd) >= INTEL_GEN(7))
482 writer_decode_surface_gen7(cmd, which, item);
483 else
484 writer_decode_surface_gen6(cmd, which, item);
485}
486
487static void
488writer_decode_binding_table(const struct intel_cmd *cmd,
489 enum intel_cmd_writer_type which,
490 const struct intel_cmd_item *item)
491{
492 const unsigned state_size = sizeof(uint32_t) * 1;
493 const unsigned count = item->size / state_size;
494 unsigned offset = item->offset;
495 unsigned i;
496
497 for (i = 0; i < count; i++) {
498 writer_dw(cmd, which, offset, 0, "BIND");
499 fprintf(stderr, "BINDING_TABLE_STATE[%d]\n", i);
500
501 offset += state_size;
502 }
503}
504
505static void
506writer_decode_kernel(const struct intel_cmd *cmd,
507 enum intel_cmd_writer_type which,
508 const struct intel_cmd_item *item)
509{
Chia-I Wu34579502014-10-25 14:44:53 +0800510 const void *kernel = (const void *)
511 writer_pointer(cmd, which, item->offset);
512
513 fprintf(stderr, "0x%08x:\n", item->offset);
514 intel_disassemble_kernel(cmd->dev->gpu, kernel, item->size);
Chia-I Wu00b51a82014-09-09 12:07:37 +0800515}
516
517static const struct {
518 void (*func)(const struct intel_cmd *cmd,
519 enum intel_cmd_writer_type which,
520 const struct intel_cmd_item *item);
521} writer_decode_table[INTEL_CMD_ITEM_COUNT] = {
522 [INTEL_CMD_ITEM_BLOB] = { writer_decode_blob },
523 [INTEL_CMD_ITEM_CLIP_VIEWPORT] = { writer_decode_clip_viewport },
524 [INTEL_CMD_ITEM_SF_VIEWPORT] = { writer_decode_sf_viewport },
525 [INTEL_CMD_ITEM_SCISSOR_RECT] = { writer_decode_scissor_rect },
526 [INTEL_CMD_ITEM_CC_VIEWPORT] = { writer_decode_cc_viewport },
527 [INTEL_CMD_ITEM_COLOR_CALC] = { writer_decode_color_calc },
528 [INTEL_CMD_ITEM_DEPTH_STENCIL] = { writer_decode_depth_stencil },
529 [INTEL_CMD_ITEM_BLEND] = { writer_decode_blend },
530 [INTEL_CMD_ITEM_SAMPLER] = { writer_decode_sampler },
531 [INTEL_CMD_ITEM_SURFACE] = { writer_decode_surface },
532 [INTEL_CMD_ITEM_BINDING_TABLE] = { writer_decode_binding_table },
533 [INTEL_CMD_ITEM_KERNEL] = { writer_decode_kernel },
534};
535
536static void cmd_writer_decode_items(struct intel_cmd *cmd,
537 enum intel_cmd_writer_type which)
538{
539 struct intel_cmd_writer *writer = &cmd->writers[which];
540 int i;
541
542 if (!writer->item_used)
543 return;
544
545 writer->ptr = intel_bo_map(writer->bo, false);
546 if (!writer->ptr)
547 return;
548
549 for (i = 0; i < writer->item_used; i++) {
550 const struct intel_cmd_item *item = &writer->items[i];
551
552 writer_decode_table[item->type].func(cmd, which, item);
553 }
554
555 intel_bo_unmap(writer->bo);
Courtney Goeltzenleuchterbbc3db22014-10-13 17:03:12 -0600556 writer->ptr = NULL;
Chia-I Wu00b51a82014-09-09 12:07:37 +0800557}
558
559static void cmd_writer_decode(struct intel_cmd *cmd,
560 enum intel_cmd_writer_type which)
561{
562 struct intel_cmd_writer *writer = &cmd->writers[which];
563
564 assert(writer->bo && !writer->ptr);
565
566 switch (which) {
567 case INTEL_CMD_WRITER_BATCH:
568 fprintf(stderr, "decoding batch buffer: %d bytes\n", writer->used);
569 if (writer->used) {
570 intel_winsys_decode_bo(cmd->dev->winsys,
571 writer->bo, writer->used);
572 }
573 break;
574 case INTEL_CMD_WRITER_STATE:
575 fprintf(stderr, "decoding state buffer: %d states\n",
576 writer->item_used);
577 cmd_writer_decode_items(cmd, which);
578 break;
579 case INTEL_CMD_WRITER_INSTRUCTION:
580 if (true) {
581 fprintf(stderr, "skipping instruction buffer: %d kernels\n",
582 writer->item_used);
583 } else {
584 fprintf(stderr, "decoding instruction buffer: %d kernels\n",
585 writer->item_used);
586
587 cmd_writer_decode_items(cmd, which);
588 }
589 break;
590 default:
591 break;
592 }
593}
594
595/**
596 * Decode according to the recorded items. This can be called only after a
597 * successful intel_cmd_end().
598 */
599void intel_cmd_decode(struct intel_cmd *cmd)
600{
601 int i;
602
603 assert(cmd->result == XGL_SUCCESS);
604
605 for (i = 0; i < INTEL_CMD_WRITER_COUNT; i++)
606 cmd_writer_decode(cmd, i);
607}