Unify CPU features detection code

This will allow to remove some duplicated code (i.e. thread synchronization)
while at same time removing unnecessary use of inline ASM for Intel features
detection.

A few other advantages:
 - remove some extra logic (e.g. no need to test the platform to include the
   correct CPU detection header).
 - simplifies the buildsystem (i.e. we always include cpu_features.c)
 - get rid of the simd_stub file.

Bug: 1032721
Change-Id: I9427b34ec09dddc41925844a6ec4e6aa4d8f3207
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/1987190
Reviewed-by: Mike Klein <mtklein@chromium.org>
Reviewed-by: Adenilson Cavalcanti <cavalcantii@chromium.org>
Commit-Queue: Adenilson Cavalcanti <cavalcantii@chromium.org>
Cr-Original-Commit-Position: refs/heads/master@{#729515}
Cr-Mirrored-From: https://chromium.googlesource.com/chromium/src
Cr-Mirrored-Commit: d989ac2c596e88e7581eb93d053945a43c611124
diff --git a/BUILD.gn b/BUILD.gn
index 5f88733..9d0f021 100644
--- a/BUILD.gn
+++ b/BUILD.gn
@@ -29,9 +29,12 @@
 config("zlib_adler32_simd_config") {
   if (use_x86_x64_optimizations) {
     defines = [ "ADLER32_SIMD_SSSE3" ]
-  }
-
-  if (use_arm_neon_optimizations) {
+    if (is_win) {
+      defines += [ "X86_WINDOWS" ]
+    } else {
+      defines += [ "X86_NOT_WINDOWS" ]
+    }
+  } else if (use_arm_neon_optimizations) {
     defines = [ "ADLER32_SIMD_NEON" ]
   }
 }
@@ -94,24 +97,13 @@
     if (!is_ios) {
       include_dirs = [ "." ]
 
-      if (is_android) {
-        import("//build/config/android/config.gni")
-        if (defined(android_ndk_root) && android_ndk_root != "") {
-          deps = [
-            "//third_party/android_ndk:cpu_features",
-          ]
-        } else {
-          assert(false, "CPU detection requires the Android NDK")
-        }
-      } else if (!is_win && !is_clang) {
+      if (!is_win && !is_clang) {
         assert(!use_thin_lto,
                "ThinLTO fails mixing different module-level targets")
         cflags_c = [ "-march=armv8-a+crc" ]
       }
 
       sources = [
-        "arm_features.c",
-        "arm_features.h",
         "crc32_simd.c",
         "crc32_simd.h",
       ]
@@ -218,10 +210,6 @@
         "-mpclmul",
       ]
     }
-  } else {
-    sources = [
-      "simd_stub.c",
-    ]
   }
 
   configs -= [ "//build/config/compiler:chromium_code" ]
@@ -248,6 +236,8 @@
     "chromeconf.h",
     "compress.c",
     "contrib/optimizations/insert_string.h",
+    "cpu_features.c",
+    "cpu_features.h",
     "crc32.c",
     "crc32.h",
     "deflate.c",
@@ -267,7 +257,6 @@
     "trees.c",
     "trees.h",
     "uncompr.c",
-    "x86.h",
     "zconf.h",
     "zlib.h",
     "zutil.c",
@@ -276,6 +265,19 @@
 
   defines = []
   deps = []
+  if (!use_x86_x64_optimizations && !use_arm_neon_optimizations) {
+    # Apparently android_cronet bot builds with NEON disabled and
+    # we also should disable optimizations for iOS@x86 (a.k.a. simulator).
+    defines += [ "CPU_NO_SIMD" ]
+  }
+
+  if (is_ios) {
+    # iOS@ARM is a special case where we always have NEON but don't check
+    # for crypto extensions.
+    # TODO(cavalcantii): verify what is the current state of CPU features shipped
+    # on latest iOS devices.
+    defines += [ "ARM_OS_IOS" ]
+  }
 
   if (use_x86_x64_optimizations || use_arm_neon_optimizations) {
     deps += [
@@ -284,7 +286,6 @@
     ]
 
     if (use_x86_x64_optimizations) {
-      sources += [ "x86.c" ]
       deps += [ ":zlib_crc32_simd" ]
     } else if (use_arm_neon_optimizations) {
       sources += [ "contrib/optimizations/slide_hash_neon.h" ]
@@ -294,6 +295,15 @@
     sources += [ "inflate.c" ]
   }
 
+  if (is_android) {
+    import("//build/config/android/config.gni")
+    if (defined(android_ndk_root) && android_ndk_root != "") {
+      deps += [ "//third_party/android_ndk:cpu_features" ]
+    } else {
+      assert(false, "CPU detection requires the Android NDK")
+    }
+  }
+
   configs -= [ "//build/config/compiler:chromium_code" ]
   configs += [
     ":zlib_internal_config",
diff --git a/adler32.c b/adler32.c
index a42f35f..696773a 100644
--- a/adler32.c
+++ b/adler32.c
@@ -59,10 +59,8 @@
 #  define MOD63(a) a %= BASE
 #endif
 
-#if defined(ADLER32_SIMD_SSSE3)
-#include "adler32_simd.h"
-#include "x86.h"
-#elif defined(ADLER32_SIMD_NEON)
+#include "cpu_features.h"
+#if defined(ADLER32_SIMD_SSSE3) || defined(ADLER32_SIMD_NEON)
 #include "adler32_simd.h"
 #endif
 
@@ -108,7 +106,7 @@
      */
     if (buf == Z_NULL) {
         if (!len) /* Assume user is calling adler32(0, NULL, 0); */
-            x86_check_features();
+            cpu_check_features();
         return 1L;
     }
 #else
diff --git a/arm_features.c b/arm_features.c
deleted file mode 100644
index f5641c3..0000000
--- a/arm_features.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/* arm_features.c -- ARM processor features detection.
- *
- * Copyright 2018 The Chromium Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the Chromium source repository LICENSE file.
- */
-
-#include "arm_features.h"
-#include "zutil.h"
-#include <stdint.h>
-
-int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
-int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
-
-#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA)
-#include <pthread.h>
-#endif
-
-#if defined(ARMV8_OS_ANDROID)
-#include <cpu-features.h>
-#elif defined(ARMV8_OS_LINUX)
-#include <asm/hwcap.h>
-#include <sys/auxv.h>
-#elif defined(ARMV8_OS_FUCHSIA)
-#include <zircon/features.h>
-#include <zircon/syscalls.h>
-#include <zircon/types.h>
-#elif defined(ARMV8_OS_WINDOWS)
-#include <windows.h>
-#else
-#error arm_features.c ARM feature detection in not defined for your platform
-#endif
-
-static void _arm_check_features(void);
-
-#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA)
-static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
-void ZLIB_INTERNAL arm_check_features(void)
-{
-    pthread_once(&cpu_check_inited_once, _arm_check_features);
-}
-#elif defined(ARMV8_OS_WINDOWS)
-static INIT_ONCE cpu_check_inited_once = INIT_ONCE_STATIC_INIT;
-static BOOL CALLBACK _arm_check_features_forwarder(PINIT_ONCE once, PVOID param, PVOID* context)
-{
-    _arm_check_features();
-    return TRUE;
-}
-void ZLIB_INTERNAL arm_check_features(void)
-{
-    InitOnceExecuteOnce(&cpu_check_inited_once, _arm_check_features_forwarder,
-                        NULL, NULL);
-}
-#endif
-
-/*
- * See http://bit.ly/2CcoEsr for run-time detection of ARM features and also
- * crbug.com/931275 for android_getCpuFeatures() use in the Android sandbox.
- */
-static void _arm_check_features(void)
-{
-#if defined(ARMV8_OS_ANDROID) && defined(__aarch64__)
-    uint64_t features = android_getCpuFeatures();
-    arm_cpu_enable_crc32 = !!(features & ANDROID_CPU_ARM64_FEATURE_CRC32);
-    arm_cpu_enable_pmull = !!(features & ANDROID_CPU_ARM64_FEATURE_PMULL);
-#elif defined(ARMV8_OS_ANDROID) /* aarch32 */
-    uint64_t features = android_getCpuFeatures();
-    arm_cpu_enable_crc32 = !!(features & ANDROID_CPU_ARM_FEATURE_CRC32);
-    arm_cpu_enable_pmull = !!(features & ANDROID_CPU_ARM_FEATURE_PMULL);
-#elif defined(ARMV8_OS_LINUX) && defined(__aarch64__)
-    unsigned long features = getauxval(AT_HWCAP);
-    arm_cpu_enable_crc32 = !!(features & HWCAP_CRC32);
-    arm_cpu_enable_pmull = !!(features & HWCAP_PMULL);
-#elif defined(ARMV8_OS_LINUX) && (defined(__ARM_NEON) || defined(__ARM_NEON__))
-    /* Query HWCAP2 for ARMV8-A SoCs running in aarch32 mode */
-    unsigned long features = getauxval(AT_HWCAP2);
-    arm_cpu_enable_crc32 = !!(features & HWCAP2_CRC32);
-    arm_cpu_enable_pmull = !!(features & HWCAP2_PMULL);
-#elif defined(ARMV8_OS_FUCHSIA)
-    uint32_t features;
-    zx_status_t rc = zx_system_get_features(ZX_FEATURE_KIND_CPU, &features);
-    if (rc != ZX_OK || (features & ZX_ARM64_FEATURE_ISA_ASIMD) == 0)
-        return;  /* Report nothing if ASIMD(NEON) is missing */
-    arm_cpu_enable_crc32 = !!(features & ZX_ARM64_FEATURE_ISA_CRC32);
-    arm_cpu_enable_pmull = !!(features & ZX_ARM64_FEATURE_ISA_PMULL);
-#elif defined(ARMV8_OS_WINDOWS)
-    arm_cpu_enable_crc32 = IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE);
-    arm_cpu_enable_pmull = IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE);
-#endif
-}
diff --git a/arm_features.h b/arm_features.h
deleted file mode 100644
index 09fec25..0000000
--- a/arm_features.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* arm_features.h -- ARM processor features detection.
- *
- * Copyright 2018 The Chromium Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the Chromium source repository LICENSE file.
- */
-
-#include "zlib.h"
-
-extern int arm_cpu_enable_crc32;
-extern int arm_cpu_enable_pmull;
-
-void arm_check_features(void);
diff --git a/contrib/optimizations/insert_string.h b/contrib/optimizations/insert_string.h
index 69eee3d..1826601 100644
--- a/contrib/optimizations/insert_string.h
+++ b/contrib/optimizations/insert_string.h
@@ -10,6 +10,7 @@
 #define INLINE inline
 #endif
 
+#include "cpu_features.h"
 /* Optimized insert_string block */
 #if defined(CRC32_SIMD_SSE42_PCLMUL) || defined(CRC32_ARMV8_CRC32)
 #define TARGET_CPU_WITH_CRC
@@ -25,7 +26,6 @@
   #define _cpu_crc32_u32 _mm_crc32_u32
 
 #elif defined(CRC32_ARMV8_CRC32)
-  #include "arm_features.h"
   #if defined(__clang__)
     #undef TARGET_CPU_WITH_CRC
     #define __crc32cw __builtin_arm_crc32cw
diff --git a/cpu_features.c b/cpu_features.c
new file mode 100644
index 0000000..8a25dd2
--- /dev/null
+++ b/cpu_features.c
@@ -0,0 +1,145 @@
+/* cpu_features.c -- Processor features detection.
+ *
+ * Copyright 2018 The Chromium Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the Chromium source repository LICENSE file.
+ */
+
+#include "cpu_features.h"
+#include "zutil.h"
+
+#include <stdint.h>
+#if defined(_MSC_VER)
+#include <intrin.h>
+#elif defined(ADLER32_SIMD_SSSE3)
+#include <cpuid.h>
+#endif
+
+/* TODO(cavalcantii): remove checks for x86_flags on deflate.
+ */
+int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
+int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
+int ZLIB_INTERNAL x86_cpu_enable_ssse3 = 0;
+int ZLIB_INTERNAL x86_cpu_enable_simd = 0;
+
+#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA)
+#include <pthread.h>
+#endif
+
+#if defined(ARMV8_OS_ANDROID)
+#include <cpu-features.h>
+#elif defined(ARMV8_OS_LINUX)
+#include <asm/hwcap.h>
+#include <sys/auxv.h>
+#elif defined(ARMV8_OS_FUCHSIA)
+#include <zircon/features.h>
+#include <zircon/syscalls.h>
+#include <zircon/types.h>
+#elif defined(ARMV8_OS_WINDOWS) || defined(X86_WINDOWS)
+#include <windows.h>
+#elif !defined(_MSC_VER)
+#include <pthread.h>
+#else
+#error cpu_features.c CPU feature detection in not defined for your platform
+#endif
+
+#if !defined(CPU_NO_SIMD) && !defined(ARM_OS_IOS)
+static void _cpu_check_features(void);
+#endif
+
+#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA) || defined(X86_NOT_WINDOWS)
+static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
+void ZLIB_INTERNAL cpu_check_features(void)
+{
+    pthread_once(&cpu_check_inited_once, _cpu_check_features);
+}
+#elif defined(ARMV8_OS_WINDOWS) || defined(X86_WINDOWS)
+static INIT_ONCE cpu_check_inited_once = INIT_ONCE_STATIC_INIT;
+static BOOL CALLBACK _cpu_check_features_forwarder(PINIT_ONCE once, PVOID param, PVOID* context)
+{
+    _cpu_check_features();
+    return TRUE;
+}
+void ZLIB_INTERNAL cpu_check_features(void)
+{
+    InitOnceExecuteOnce(&cpu_check_inited_once, _cpu_check_features_forwarder,
+                        NULL, NULL);
+}
+#endif
+
+#if (defined(__ARM_NEON__) || defined(__ARM_NEON))
+/*
+ * iOS@ARM is a special case where we always have NEON but don't check
+ * for crypto extensions.
+ */
+#ifndef ARM_OS_IOS
+/*
+ * See http://bit.ly/2CcoEsr for run-time detection of ARM features and also
+ * crbug.com/931275 for android_getCpuFeatures() use in the Android sandbox.
+ */
+static void _cpu_check_features(void)
+{
+#if defined(ARMV8_OS_ANDROID) && defined(__aarch64__)
+    uint64_t features = android_getCpuFeatures();
+    arm_cpu_enable_crc32 = !!(features & ANDROID_CPU_ARM64_FEATURE_CRC32);
+    arm_cpu_enable_pmull = !!(features & ANDROID_CPU_ARM64_FEATURE_PMULL);
+#elif defined(ARMV8_OS_ANDROID) /* aarch32 */
+    uint64_t features = android_getCpuFeatures();
+    arm_cpu_enable_crc32 = !!(features & ANDROID_CPU_ARM_FEATURE_CRC32);
+    arm_cpu_enable_pmull = !!(features & ANDROID_CPU_ARM_FEATURE_PMULL);
+#elif defined(ARMV8_OS_LINUX) && defined(__aarch64__)
+    unsigned long features = getauxval(AT_HWCAP);
+    arm_cpu_enable_crc32 = !!(features & HWCAP_CRC32);
+    arm_cpu_enable_pmull = !!(features & HWCAP_PMULL);
+#elif defined(ARMV8_OS_LINUX) && (defined(__ARM_NEON) || defined(__ARM_NEON__))
+    /* Query HWCAP2 for ARMV8-A SoCs running in aarch32 mode */
+    unsigned long features = getauxval(AT_HWCAP2);
+    arm_cpu_enable_crc32 = !!(features & HWCAP2_CRC32);
+    arm_cpu_enable_pmull = !!(features & HWCAP2_PMULL);
+#elif defined(ARMV8_OS_FUCHSIA)
+    uint32_t features;
+    zx_status_t rc = zx_system_get_features(ZX_FEATURE_KIND_CPU, &features);
+    if (rc != ZX_OK || (features & ZX_ARM64_FEATURE_ISA_ASIMD) == 0)
+        return;  /* Report nothing if ASIMD(NEON) is missing */
+    arm_cpu_enable_crc32 = !!(features & ZX_ARM64_FEATURE_ISA_CRC32);
+    arm_cpu_enable_pmull = !!(features & ZX_ARM64_FEATURE_ISA_PMULL);
+#elif defined(ARMV8_OS_WINDOWS)
+    arm_cpu_enable_crc32 = IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE);
+    arm_cpu_enable_pmull = IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE);
+#endif
+}
+#endif
+#elif defined(X86_NOT_WINDOWS) || defined(X86_WINDOWS)
+/*
+ * iOS@x86 (i.e. emulator) is another special case where we disable
+ * SIMD optimizations.
+ */
+#ifndef CPU_NO_SIMD
+/* On x86 we simply use a instruction to check the CPU features.
+ * (i.e. CPUID).
+ */
+static void _cpu_check_features(void)
+{
+    int x86_cpu_has_sse2;
+    int x86_cpu_has_ssse3;
+    int x86_cpu_has_sse42;
+    int x86_cpu_has_pclmulqdq;
+    int abcd[4];
+#ifdef _MSC_VER
+    __cpuid(abcd, 1);
+#else
+    __cpuid(1, abcd[0], abcd[1], abcd[2], abcd[3]);
+#endif
+    x86_cpu_has_sse2 = abcd[3] & 0x4000000;
+    x86_cpu_has_ssse3 = abcd[2] & 0x000200;
+    x86_cpu_has_sse42 = abcd[2] & 0x100000;
+    x86_cpu_has_pclmulqdq = abcd[2] & 0x2;
+
+    x86_cpu_enable_ssse3 = x86_cpu_has_ssse3;
+
+    x86_cpu_enable_simd = x86_cpu_has_sse2 &&
+                          x86_cpu_has_sse42 &&
+                          x86_cpu_has_pclmulqdq;
+}
+#endif
+#endif
diff --git a/cpu_features.h b/cpu_features.h
new file mode 100644
index 0000000..2a4a797
--- /dev/null
+++ b/cpu_features.h
@@ -0,0 +1,17 @@
+/* cpu_features.h -- Processor features detection.
+ *
+ * Copyright 2018 The Chromium Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the Chromium source repository LICENSE file.
+ */
+
+#include "zlib.h"
+
+/* TODO(cavalcantii): remove checks for x86_flags on deflate.
+ */
+extern int arm_cpu_enable_crc32;
+extern int arm_cpu_enable_pmull;
+extern int x86_cpu_enable_ssse3;
+extern int x86_cpu_enable_simd;
+
+void cpu_check_features(void);
diff --git a/crc32.c b/crc32.c
index e95b908..bd69647 100644
--- a/crc32.c
+++ b/crc32.c
@@ -29,13 +29,10 @@
 #endif /* MAKECRCH */
 
 #include "deflate.h"
-#include "x86.h"
+#include "cpu_features.h"
 #include "zutil.h"      /* for STDC and FAR definitions */
 
-#if defined(CRC32_SIMD_SSE42_PCLMUL)
-#include "crc32_simd.h"
-#elif defined(CRC32_ARMV8_CRC32)
-#include "arm_features.h"
+#if defined(CRC32_SIMD_SSE42_PCLMUL) || defined(CRC32_ARMV8_CRC32)
 #include "crc32_simd.h"
 #endif
 
@@ -226,7 +223,7 @@
      */
     if (buf == Z_NULL) {
         if (!len) /* Assume user is calling crc32(0, NULL, 0); */
-            x86_check_features();
+            cpu_check_features();
         return 0UL;
     }
 
@@ -289,7 +286,7 @@
      */
     if (buf == Z_NULL) {
         if (!len) /* Assume user is calling crc32(0, NULL, 0); */
-            arm_check_features();
+            cpu_check_features();
         return 0UL;
     }
 
@@ -500,25 +497,31 @@
 
 ZLIB_INTERNAL void crc_reset(deflate_state *const s)
 {
+#ifdef ADLER32_SIMD_SSSE3
     if (x86_cpu_enable_simd) {
         crc_fold_init(s);
         return;
     }
+#endif
     s->strm->adler = crc32(0L, Z_NULL, 0);
 }
 
 ZLIB_INTERNAL void crc_finalize(deflate_state *const s)
 {
+#ifdef ADLER32_SIMD_SSSE3
     if (x86_cpu_enable_simd)
         s->strm->adler = crc_fold_512to32(s);
+#endif
 }
 
 ZLIB_INTERNAL void copy_with_crc(z_streamp strm, Bytef *dst, long size)
 {
+#ifdef ADLER32_SIMD_SSSE3
     if (x86_cpu_enable_simd) {
         crc_fold_copy(strm->state, dst, strm->next_in, size);
         return;
     }
+#endif
     zmemcpy(dst, strm->next_in, size);
     strm->adler = crc32(strm->adler, dst, size);
 }
diff --git a/deflate.c b/deflate.c
index 201254a..a39e627 100644
--- a/deflate.c
+++ b/deflate.c
@@ -50,7 +50,7 @@
 /* @(#) $Id$ */
 #include <assert.h>
 #include "deflate.h"
-#include "x86.h"
+#include "cpu_features.h"
 #include "contrib/optimizations/insert_string.h"
 
 #if (defined(__ARM_NEON__) || defined(__ARM_NEON))
@@ -244,10 +244,8 @@
     // for all wrapper formats (e.g. RAW, ZLIB, GZIP).
     // Feature detection is not triggered while using RAW mode (i.e. we never
     // call crc32() with a NULL buffer).
-#if defined(CRC32_ARMV8_CRC32)
-    arm_check_features();
-#elif defined(CRC32_SIMD_SSE42_PCLMUL)
-    x86_check_features();
+#if defined(CRC32_ARMV8_CRC32) || defined(CRC32_SIMD_SSE42_PCLMUL)
+    cpu_check_features();
 #endif
 
     if (version == Z_NULL || version[0] != my_version[0] ||
@@ -1519,11 +1517,12 @@
 
 local void fill_window(deflate_state *s)
 {
+#ifdef ADLER32_SIMD_SSSE3
     if (x86_cpu_enable_simd) {
         fill_window_sse(s);
         return;
     }
-
+#endif
     fill_window_c(s);
 }
 
diff --git a/simd_stub.c b/simd_stub.c
deleted file mode 100644
index c6d4605..0000000
--- a/simd_stub.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/* simd_stub.c -- stub implementations
-* Copyright (C) 2014 Intel Corporation
-* For conditions of distribution and use, see copyright notice in zlib.h
-*/
-#include <assert.h>
-
-#include "deflate.h"
-#include "x86.h"
-
-int ZLIB_INTERNAL x86_cpu_enable_simd = 0;
-
-void ZLIB_INTERNAL crc_fold_init(deflate_state *const s) {
-    assert(0);
-}
-
-void ZLIB_INTERNAL crc_fold_copy(deflate_state *const s,
-                                 unsigned char *dst,
-                                 const unsigned char *src,
-                                 long len) {
-    assert(0);
-}
-
-unsigned ZLIB_INTERNAL crc_fold_512to32(deflate_state *const s) {
-    assert(0);
-    return 0;
-}
-
-void ZLIB_INTERNAL fill_window_sse(deflate_state *s)
-{
-    assert(0);
-}
-
-void x86_check_features(void)
-{
-}
diff --git a/x86.c b/x86.c
deleted file mode 100644
index 7488ad0..0000000
--- a/x86.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * x86 feature check
- *
- * Copyright (C) 2013 Intel Corporation. All rights reserved.
- * Author:
- *  Jim Kukunas
- *
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-#include "x86.h"
-#include "zutil.h"
-
-int ZLIB_INTERNAL x86_cpu_enable_ssse3 = 0;
-int ZLIB_INTERNAL x86_cpu_enable_simd = 0;
-
-#ifndef _MSC_VER
-#include <pthread.h>
-
-pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
-static void _x86_check_features(void);
-
-void x86_check_features(void)
-{
-  pthread_once(&cpu_check_inited_once, _x86_check_features);
-}
-
-static void _x86_check_features(void)
-{
-    int x86_cpu_has_sse2;
-    int x86_cpu_has_ssse3;
-    int x86_cpu_has_sse42;
-    int x86_cpu_has_pclmulqdq;
-    unsigned eax, ebx, ecx, edx;
-
-    eax = 1;
-#ifdef __i386__
-    __asm__ __volatile__ (
-        "xchg %%ebx, %1\n\t"
-        "cpuid\n\t"
-        "xchg %1, %%ebx\n\t"
-    : "+a" (eax), "=S" (ebx), "=c" (ecx), "=d" (edx)
-    );
-#else
-    __asm__ __volatile__ (
-        "cpuid\n\t"
-    : "+a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
-    );
-#endif  /* (__i386__) */
-
-    x86_cpu_has_sse2 = edx & 0x4000000;
-    x86_cpu_has_ssse3 = ecx & 0x000200;
-    x86_cpu_has_sse42 = ecx & 0x100000;
-    x86_cpu_has_pclmulqdq = ecx & 0x2;
-
-    x86_cpu_enable_ssse3 = x86_cpu_has_ssse3;
-
-    x86_cpu_enable_simd = x86_cpu_has_sse2 &&
-                          x86_cpu_has_sse42 &&
-                          x86_cpu_has_pclmulqdq;
-}
-#else
-#include <intrin.h>
-#include <windows.h>
-
-static BOOL CALLBACK _x86_check_features(PINIT_ONCE once,
-                                         PVOID param,
-                                         PVOID *context);
-static INIT_ONCE cpu_check_inited_once = INIT_ONCE_STATIC_INIT;
-
-void x86_check_features(void)
-{
-    InitOnceExecuteOnce(&cpu_check_inited_once, _x86_check_features,
-                        NULL, NULL);
-}
-
-static BOOL CALLBACK _x86_check_features(PINIT_ONCE once,
-                                         PVOID param,
-                                         PVOID *context)
-{
-    int x86_cpu_has_sse2;
-    int x86_cpu_has_ssse3;
-    int x86_cpu_has_sse42;
-    int x86_cpu_has_pclmulqdq;
-    int regs[4];
-
-    __cpuid(regs, 1);
-
-    x86_cpu_has_sse2 = regs[3] & 0x4000000;
-    x86_cpu_has_ssse3 = regs[2] & 0x000200;
-    x86_cpu_has_sse42 = regs[2] & 0x100000;
-    x86_cpu_has_pclmulqdq = regs[2] & 0x2;
-
-    x86_cpu_enable_ssse3 = x86_cpu_has_ssse3;
-
-    x86_cpu_enable_simd = x86_cpu_has_sse2 &&
-                          x86_cpu_has_sse42 &&
-                          x86_cpu_has_pclmulqdq;
-    return TRUE;
-}
-#endif  /* _MSC_VER */
diff --git a/x86.h b/x86.h
deleted file mode 100644
index 7205d50..0000000
--- a/x86.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* x86.h -- check for x86 CPU features
-* Copyright (C) 2013 Intel Corporation Jim Kukunas
-* For conditions of distribution and use, see copyright notice in zlib.h
-*/
-
-#ifndef X86_H
-#define X86_H
-
-#include "zlib.h"
-
-extern int x86_cpu_enable_ssse3;
-extern int x86_cpu_enable_simd;
-
-void x86_check_features(void);
-
-#endif  /* X86_H */