[zlib] Expose Intel SSE2 via CPU features
Add x86_cpu_enable_sse2 in cpu_features.c. Update external symbols for
the new name exposed x86_cpu_enable_sse2.
Also, add cpu_check_features to the symbols list (was missing and it's
defined as a ZLIB_INTERNAL symbol).
Bug: 1072308
Change-Id: Ibedfdb0c2e17a20b6f09f49b43ef383b0aa3029b
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/2156328
Commit-Queue: Noel Gordon <noel@chromium.org>
Reviewed-by: Chris Blume <cblume@chromium.org>
Reviewed-by: Adenilson Cavalcanti <cavalcantii@chromium.org>
Cr-Original-Commit-Position: refs/heads/master@{#760858}
Cr-Mirrored-From: https://chromium.googlesource.com/chromium/src
Cr-Mirrored-Commit: aba86d62e3b8524f2520ad8797900fbe2f7a55ba
diff --git a/cpu_features.c b/cpu_features.c
index ceed988..0c10a00 100644
--- a/cpu_features.c
+++ b/cpu_features.c
@@ -19,6 +19,7 @@
*/
int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
+int ZLIB_INTERNAL x86_cpu_enable_sse2 = 0;
int ZLIB_INTERNAL x86_cpu_enable_ssse3 = 0;
int ZLIB_INTERNAL x86_cpu_enable_simd = 0;
@@ -127,16 +128,20 @@
int x86_cpu_has_sse42;
int x86_cpu_has_pclmulqdq;
int abcd[4];
+
#ifdef _MSC_VER
__cpuid(abcd, 1);
#else
__cpuid(1, abcd[0], abcd[1], abcd[2], abcd[3]);
#endif
+
x86_cpu_has_sse2 = abcd[3] & 0x4000000;
x86_cpu_has_ssse3 = abcd[2] & 0x000200;
x86_cpu_has_sse42 = abcd[2] & 0x100000;
x86_cpu_has_pclmulqdq = abcd[2] & 0x2;
+ x86_cpu_enable_sse2 = x86_cpu_has_sse2;
+
x86_cpu_enable_ssse3 = x86_cpu_has_ssse3;
x86_cpu_enable_simd = x86_cpu_has_sse2 &&
@@ -145,4 +150,4 @@
}
#endif
#endif
-#endif
\ No newline at end of file
+#endif