am 41087f79: am d7ab4e0c: am bf1e85bf: Merge "stagefright aacenc: Fix inline asm constraints"

* commit '41087f7920196f81a50f320c9d538b36534f178d':
  stagefright aacenc: Fix inline asm constraints
diff --git a/media/libstagefright/codecs/aacenc/basic_op/basic_op.h b/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
index ef3c31b..21649d4f 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
+++ b/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
@@ -245,7 +245,7 @@
 		"MOV	%[result], %[L_var1], ASL %[var2] \n"
 		"TEQ	r2, %[result], ASR %[var2]\n"
 		"EORNE  %[result],r3,r2,ASR#31\n"
-		:[result]"+r"(result)
+		:[result]"=&r"(result)
 		:[L_var1]"r"(L_var1), [var2]"r"(var2)
 		:"r2", "r3"
 		);
@@ -277,7 +277,7 @@
         "RSB    r3,r3,r3,LSL #15 \n"
         "TEQ    r2, %[result], ASR #31 \n"
         "EORNE  %[result], r3, %[result],ASR #31"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[L_var1]"r"(L_var1), [var2]"r"(var2)
 		:"r2", "r3"
 		);
@@ -296,13 +296,13 @@
 #if ARMV5TE_SAT
 	Word16 result;
 	asm volatile (
-		"MOV	%[result], %[L_var1]\n"
 		"MOV	r3, #1\n"
 		"MOV	r2,%[L_var1],ASR#15\n"
 		"RSB	r3, r3, r3, LSL #15\n"
 		"TEQ	r2,%[L_var1],ASR#31\n"
 		"EORNE	%[result],r3,%[L_var1],ASR#31\n"
-		:[result]"+r"(result)
+		"MOVEQ	%[result], %[L_var1]\n"
+		:[result]"=r"(result)
 		:[L_var1]"r"(L_var1)
 		:"r2", "r3"
 	);
@@ -423,7 +423,7 @@
 	asm volatile(
 		"SMULBB %[result], %[var1], %[var2] \n"
 		"QADD %[result], %[result], %[result] \n"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[var1]"r"(var1), [var2]"r"(var2)
 		);
 	return result;
@@ -454,7 +454,7 @@
 		"SMULBB %[result], %[var1], %[var2] \n"
 		"QADD %[result], %[result], %[result] \n"
 		"QSUB %[result], %[L_var3], %[result]\n"
-		:[result]"+r"(result)
+		:[result]"=&r"(result)
 		:[L_var3]"r"(L_var3), [var1]"r"(var1), [var2]"r"(var2)
 		);
 	return result;
@@ -476,7 +476,7 @@
 	Word32 result;
 	asm volatile(
 		"QSUB %[result], %[L_var1], %[L_var2]\n"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[L_var1]"r"(L_var1), [L_var2]"r"(L_var2)
 		);
 	return result;
@@ -596,7 +596,7 @@
 		"RSB  r3, r3, r3, LSL, #15\n"
 		"TEQ  r2, %[result], ASR #31\n"
 		"EORNE %[result], r3, %[result], ASR #31"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[var1]"r"(var1), [var2]"r"(var2)
 		:"r2", "r3"
 		);
@@ -626,7 +626,7 @@
 		"MOV   r2, %[var1], ASR #15 \n"
 		"TEQ   r2, %[var1], ASR #31 \n"
 		"EORNE %[result], r3, %[result], ASR #31 \n"
-		:[result]"+r"(result)
+		:[result]"=&r"(result)
 		:[var1]"r"(var1), [var2]"r"(var2)
 		:"r2", "r3"
 		);
@@ -692,7 +692,7 @@
 		"MOV	r2, %[result], ASR #15\n"
 		"TEQ	r2, %[result], ASR #31\n"
 		"EORNE  %[result], r3, %[result], ASR #31 \n"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[var1]"r"(var1), [var2]"r"(var2)
 		:"r2", "r3"
 		);
@@ -728,7 +728,7 @@
 		"MOVEQ %[result], #0\n"
 		"CMP   r2, #-1\n"
 		"MOVEQ %[result], #15\n"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[var1]"r"(var1)
 		:"r2"
 		);
@@ -774,7 +774,7 @@
 		"CLZNE  %[result], %[L_var1]\n"
 		"SUBNE  %[result], %[result], #1\n"
 		"MOVEQ  %[result], #0\n"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[L_var1]"r"(L_var1)
 		);
 	return result;
@@ -983,7 +983,7 @@
 		"MOV   r1,#0x00008000\n"
 		"QADD  %[result], %[L_var1], r1\n"
 		"MOV   %[result], %[result], ASR #16 \n"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[L_var1]"r"(L_var1)
 		:"r1"
 		);
@@ -1009,7 +1009,7 @@
 		"SMULBB %[result], %[var1], %[var2]\n"
 		"QADD	%[result], %[result], %[result]\n"
 		"QADD   %[result], %[result], %[L_var3]\n"
-		:[result]"+r"(result)
+		:[result]"=&r"(result)
 		: [L_var3]"r"(L_var3), [var1]"r"(var1), [var2]"r"(var2)
 		);
 	return result;
@@ -1031,7 +1031,7 @@
 	Word32 result;
 	asm volatile(
 		"QADD %[result], %[L_var1], %[L_var2]\n"
-		:[result]"+r"(result)
+		:[result]"=r"(result)
 		:[L_var1]"r"(L_var1), [L_var2]"r"(L_var2)
 		);
 	return result;