Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / system / core / 2a25c4aab5c7d0f0f6018789cce0b6e8c4abb03b / . / libunwindstack / Machine.h
blob: bcc3788c8672255d67513f86cfe4ab7af563bb3b [file] [log] [blame]
Christopher Ferris723cf9b2017-01-19 20:08:48 -0800[diff] [blame]1/*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef _LIBUNWINDSTACK_MACHINE_H
18#define _LIBUNWINDSTACK_MACHINE_H
19
20#include <stdint.h>
21
Christopher Ferris723cf9b2017-01-19 20:08:48 -0800[diff] [blame]22enum ArmReg : uint16_t {
23 ARM_REG_R0 = 0,
24 ARM_REG_R1,
25 ARM_REG_R2,
26 ARM_REG_R3,
27 ARM_REG_R4,
28 ARM_REG_R5,
29 ARM_REG_R6,
30 ARM_REG_R7,
31 ARM_REG_R8,
32 ARM_REG_R9,
33 ARM_REG_R10,
34 ARM_REG_R11,
35 ARM_REG_R12,
36 ARM_REG_R13,
37 ARM_REG_R14,
38 ARM_REG_R15,
39 ARM_REG_LAST,
40
41 ARM_REG_SP = ARM_REG_R13,
42 ARM_REG_LR = ARM_REG_R14,
43 ARM_REG_PC = ARM_REG_R15,
44};
45
46enum Arm64Reg : uint16_t {
47 ARM64_REG_R0 = 0,
48 ARM64_REG_R1,
49 ARM64_REG_R2,
50 ARM64_REG_R3,
51 ARM64_REG_R4,
52 ARM64_REG_R5,
53 ARM64_REG_R6,
54 ARM64_REG_R7,
55 ARM64_REG_R8,
56 ARM64_REG_R9,
57 ARM64_REG_R10,
58 ARM64_REG_R11,
59 ARM64_REG_R12,
60 ARM64_REG_R13,
61 ARM64_REG_R14,
62 ARM64_REG_R15,
63 ARM64_REG_R16,
64 ARM64_REG_R17,
65 ARM64_REG_R18,
66 ARM64_REG_R19,
67 ARM64_REG_R20,
68 ARM64_REG_R21,
69 ARM64_REG_R22,
70 ARM64_REG_R23,
71 ARM64_REG_R24,
72 ARM64_REG_R25,
73 ARM64_REG_R26,
74 ARM64_REG_R27,
75 ARM64_REG_R28,
76 ARM64_REG_R29,
77 ARM64_REG_R30,
78 ARM64_REG_R31,
79 ARM64_REG_PC,
80 ARM64_REG_LAST,
81
82 ARM64_REG_SP = ARM64_REG_R31,
83 ARM64_REG_LR = ARM64_REG_R30,
84};
85
Christopher Ferris2a25c4a2017-07-07 16:35:48 -0700[diff] [blame^]86// Matches the numbers for the registers as generated by compilers.
87// If this is changed, then unwinding will fail.
Christopher Ferris723cf9b2017-01-19 20:08:48 -0800[diff] [blame]88enum X86Reg : uint16_t {
89 X86_REG_EAX = 0,
Christopher Ferris2a25c4a2017-07-07 16:35:48 -0700[diff] [blame^]90 X86_REG_ECX = 1,
91 X86_REG_EDX = 2,
92 X86_REG_EBX = 3,
93 X86_REG_ESP = 4,
94 X86_REG_EBP = 5,
95 X86_REG_ESI = 6,
96 X86_REG_EDI = 7,
97 X86_REG_EIP = 8,
98 X86_REG_EFL = 9,
99 X86_REG_CS = 10,
100 X86_REG_SS = 11,
101 X86_REG_DS = 12,
102 X86_REG_ES = 13,
103 X86_REG_FS = 14,
104 X86_REG_GS = 15,
Christopher Ferris723cf9b2017-01-19 20:08:48 -0800[diff] [blame]105 X86_REG_LAST,
106
107 X86_REG_SP = X86_REG_ESP,
108 X86_REG_PC = X86_REG_EIP,
109};
110
Christopher Ferris2a25c4a2017-07-07 16:35:48 -0700[diff] [blame^]111// Matches the numbers for the registers as generated by compilers.
112// If this is changed, then unwinding will fail.
Christopher Ferris723cf9b2017-01-19 20:08:48 -0800[diff] [blame]113enum X86_64Reg : uint16_t {
114 X86_64_REG_RAX = 0,
Christopher Ferris2a25c4a2017-07-07 16:35:48 -0700[diff] [blame^]115 X86_64_REG_RDX = 1,
116 X86_64_REG_RCX = 2,
117 X86_64_REG_RBX = 3,
118 X86_64_REG_RSI = 4,
119 X86_64_REG_RDI = 5,
120 X86_64_REG_RBP = 6,
121 X86_64_REG_RSP = 7,
122 X86_64_REG_R8 = 8,
123 X86_64_REG_R9 = 9,
124 X86_64_REG_R10 = 10,
125 X86_64_REG_R11 = 11,
126 X86_64_REG_R12 = 12,
127 X86_64_REG_R13 = 13,
128 X86_64_REG_R14 = 14,
129 X86_64_REG_R15 = 15,
130 X86_64_REG_RIP = 16,
Christopher Ferris723cf9b2017-01-19 20:08:48 -0800[diff] [blame]131 X86_64_REG_LAST,
132
133 X86_64_REG_SP = X86_64_REG_RSP,
134 X86_64_REG_PC = X86_64_REG_RIP,
135};
136
137#endif // _LIBUNWINDSTACK_MACHINE_H