ASoC: msm: add support for quinary mi2s
Add support for quinary mi2s/auxpcm/tdm for msmnile target.
Change-Id: I0cbfa98129e6181662f7555735173eded12a0bf7
Signed-off-by: Meng Wang <mwang@codeaurora.org>
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
diff --git a/asoc/sdm855.c b/asoc/sdm855.c
index d650736..1730557 100644
--- a/asoc/sdm855.c
+++ b/asoc/sdm855.c
@@ -95,6 +95,7 @@
SEC_MI2S,
TERT_MI2S,
QUAT_MI2S,
+ QUIN_MI2S,
MI2S_MAX,
};
@@ -103,6 +104,7 @@
SEC_AUX_PCM,
TERT_AUX_PCM,
QUAT_AUX_PCM,
+ QUIN_AUX_PCM,
AUX_PCM_MAX,
};
@@ -116,7 +118,8 @@
Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
- Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT
+ Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
+ Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
};
struct dev_config {
@@ -180,6 +183,7 @@
TDM_SEC,
TDM_TERT,
TDM_QUAT,
+ TDM_QUIN,
TDM_INTERFACE_MAX,
};
@@ -229,7 +233,18 @@
{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
+ },
+ { /* QUIN TDM */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
}
+
};
/* TDM default config */
@@ -273,7 +288,18 @@
{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
{SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
+ },
+ { /* QUIN TDM */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
+ {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
}
+
};
/* Default configuration of slimbus channels */
@@ -329,6 +355,7 @@
[SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
[TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
[QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
+ [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
};
static struct dev_config mi2s_tx_cfg[] = {
@@ -336,6 +363,7 @@
[SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
[TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
[QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
+ [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
};
static struct dev_config aux_pcm_rx_cfg[] = {
@@ -343,6 +371,7 @@
[SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
[TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
[QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
+ [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
};
static struct dev_config aux_pcm_tx_cfg[] = {
@@ -350,6 +379,7 @@
[SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
[TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
[QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
+ [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
};
static int msm_vi_feed_tx_ch = 2;
static const char *const slim_rx_ch_text[] = {"One", "Two"};
@@ -435,18 +465,22 @@
static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
+static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
+static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
+static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
+static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
@@ -455,6 +489,8 @@
static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
+static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
+static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
@@ -510,7 +546,16 @@
Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
Q6AFE_LPASS_CLK_ROOT_DEFAULT,
0,
+ },
+ {
+ AFE_API_VERSION_I2S_CONFIG,
+ Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
+ Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
+ Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
+ Q6AFE_LPASS_CLK_ROOT_DEFAULT,
+ 0,
}
+
};
static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
@@ -1658,6 +1703,9 @@
} else if (strnstr(kcontrol->id.name, "QUAT",
sizeof(kcontrol->id.name))) {
port->mode = TDM_QUAT;
+ } else if (strnstr(kcontrol->id.name, "QUIN",
+ sizeof(kcontrol->id.name))) {
+ port->mode = TDM_QUIN;
} else {
pr_err("%s: unsupported mode in: %s",
__func__, kcontrol->id.name);
@@ -2013,6 +2061,9 @@
else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
sizeof("QUAT_AUX_PCM")))
idx = QUAT_AUX_PCM;
+ else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
+ sizeof("QUIN_AUX_PCM")))
+ idx = QUIN_AUX_PCM;
else {
pr_err("%s: unsupported port: %s",
__func__, kcontrol->id.name);
@@ -2110,6 +2161,9 @@
else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
sizeof("QUAT_MI2S_RX")))
idx = QUAT_MI2S;
+ else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
+ sizeof("QUIN_MI2S_RX")))
+ idx = QUIN_MI2S;
else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
sizeof("PRIM_MI2S_TX")))
idx = PRIM_MI2S;
@@ -2122,6 +2176,9 @@
else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
sizeof("QUAT_MI2S_TX")))
idx = QUAT_MI2S;
+ else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
+ sizeof("QUIN_MI2S_TX")))
+ idx = QUIN_MI2S;
else {
pr_err("%s: unsupported channel: %s",
__func__, kcontrol->id.name);
@@ -2663,6 +2720,24 @@
SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
tdm_tx_ch_get,
tdm_tx_ch_put),
+ SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
+ tdm_rx_sample_rate_get,
+ tdm_rx_sample_rate_put),
+ SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
+ tdm_tx_sample_rate_get,
+ tdm_tx_sample_rate_put),
+ SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
+ tdm_rx_format_get,
+ tdm_rx_format_put),
+ SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
+ tdm_tx_format_get,
+ tdm_tx_format_put),
+ SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
+ tdm_rx_ch_get,
+ tdm_rx_ch_put),
+ SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
+ tdm_tx_ch_get,
+ tdm_tx_ch_put),
SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
aux_pcm_rx_sample_rate_get,
aux_pcm_rx_sample_rate_put),
@@ -2675,6 +2750,9 @@
SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
aux_pcm_rx_sample_rate_get,
aux_pcm_rx_sample_rate_put),
+ SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
+ aux_pcm_rx_sample_rate_get,
+ aux_pcm_rx_sample_rate_put),
SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
aux_pcm_tx_sample_rate_get,
aux_pcm_tx_sample_rate_put),
@@ -2687,6 +2765,9 @@
SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
aux_pcm_tx_sample_rate_get,
aux_pcm_tx_sample_rate_put),
+ SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
+ aux_pcm_tx_sample_rate_get,
+ aux_pcm_tx_sample_rate_put),
SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
mi2s_rx_sample_rate_get,
mi2s_rx_sample_rate_put),
@@ -2699,6 +2780,9 @@
SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
mi2s_rx_sample_rate_get,
mi2s_rx_sample_rate_put),
+ SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
+ mi2s_rx_sample_rate_get,
+ mi2s_rx_sample_rate_put),
SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
mi2s_tx_sample_rate_get,
mi2s_tx_sample_rate_put),
@@ -2711,6 +2795,9 @@
SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
mi2s_tx_sample_rate_get,
mi2s_tx_sample_rate_put),
+ SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
+ mi2s_tx_sample_rate_get,
+ mi2s_tx_sample_rate_put),
SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
@@ -2727,6 +2814,10 @@
msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
+ SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
+ msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
+ SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
+ msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
@@ -2743,6 +2834,10 @@
msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
+ SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
+ msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
+ SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
+ msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
@@ -2759,6 +2854,11 @@
msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
+ SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
+ msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
+ SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
+ msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
+
};
static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
@@ -3120,6 +3220,23 @@
rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
break;
+ case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
+ channels->min = channels->max =
+ tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
+ rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
+ break;
+
+ case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
+ channels->min = channels->max =
+ tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
+ rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
+ break;
+
+
case MSM_BACKEND_DAI_AUXPCM_RX:
param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
@@ -3192,6 +3309,24 @@
aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
break;
+ case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
+ rate->min = rate->max =
+ aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
+ channels->min = channels->max =
+ aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
+ break;
+
+ case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
+ rate->min = rate->max =
+ aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
+ channels->min = channels->max =
+ aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
+ break;
+
case MSM_BACKEND_DAI_PRI_MI2S_RX:
param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
mi2s_rx_cfg[PRIM_MI2S].bit_format);
@@ -3256,6 +3391,22 @@
mi2s_tx_cfg[QUAT_MI2S].channels;
break;
+ case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ mi2s_rx_cfg[QUIN_MI2S].bit_format);
+ rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
+ channels->min = channels->max =
+ mi2s_rx_cfg[QUIN_MI2S].channels;
+ break;
+
+ case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ mi2s_tx_cfg[QUIN_MI2S].bit_format);
+ rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
+ channels->min = channels->max =
+ mi2s_tx_cfg[QUIN_MI2S].channels;
+ break;
+
default:
rate->min = rate->max = SAMPLING_RATE_48KHZ;
break;
@@ -3772,6 +3923,12 @@
case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
break;
+ case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
+ afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
+ break;
+ case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
+ afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
+ break;
default:
pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
afe_port_id = -EINVAL;
@@ -4032,6 +4189,12 @@
param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
+ } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
+ channels->min = channels->max =
+ tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
+ rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
} else {
pr_err("%s: dai id 0x%x not supported\n",
__func__, cpu_dai->id);
@@ -4072,6 +4235,9 @@
case AFE_PORT_ID_QUATERNARY_TDM_RX:
slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
break;
+ case AFE_PORT_ID_QUINARY_TDM_RX:
+ slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
+ break;
case AFE_PORT_ID_PRIMARY_TDM_TX:
slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
break;
@@ -4084,6 +4250,10 @@
case AFE_PORT_ID_QUATERNARY_TDM_TX:
slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
break;
+ case AFE_PORT_ID_QUINARY_TDM_TX:
+ slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
+ break;
+
default:
pr_err("%s: dai id 0x%x not supported\n",
__func__, cpu_dai->id);
@@ -5599,6 +5769,36 @@
.ops = &msm_mi2s_be_ops,
.ignore_suspend = 1,
},
+ {
+ .name = LPASS_BE_QUIN_MI2S_RX,
+ .stream_name = "Quinary MI2S Playback",
+ .cpu_dai_name = "msm-dai-q6-mi2s.4",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .dpcm_playback = 1,
+ .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
+ .be_hw_params_fixup = msm_be_hw_params_fixup,
+ .ops = &msm_mi2s_be_ops,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ },
+ {
+ .name = LPASS_BE_QUIN_MI2S_TX,
+ .stream_name = "Quinary MI2S Capture",
+ .cpu_dai_name = "msm-dai-q6-mi2s.4",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .dpcm_capture = 1,
+ .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
+ .be_hw_params_fixup = msm_be_hw_params_fixup,
+ .ops = &msm_mi2s_be_ops,
+ .ignore_suspend = 1,
+ },
+
};
static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
@@ -5713,6 +5913,34 @@
.be_hw_params_fixup = msm_be_hw_params_fixup,
.ignore_suspend = 1,
},
+ /* Quinary AUX PCM Backend DAI Links */
+ {
+ .name = LPASS_BE_QUIN_AUXPCM_RX,
+ .stream_name = "Quin AUX PCM Playback",
+ .cpu_dai_name = "msm-dai-q6-auxpcm.5",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .dpcm_playback = 1,
+ .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
+ .be_hw_params_fixup = msm_be_hw_params_fixup,
+ .ignore_pmdown_time = 1,
+ .ignore_suspend = 1,
+ },
+ {
+ .name = LPASS_BE_QUIN_AUXPCM_TX,
+ .stream_name = "Quin AUX PCM Capture",
+ .cpu_dai_name = "msm-dai-q6-auxpcm.5",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .dpcm_capture = 1,
+ .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
+ .be_hw_params_fixup = msm_be_hw_params_fixup,
+ .ignore_suspend = 1,
+ },
};
static struct snd_soc_dai_link msm_pahu_snd_card_dai_links[
@@ -6338,7 +6566,6 @@
{
struct snd_soc_card *card;
struct msm_asoc_mach_data *pdata;
- const struct of_device_id *match;
int ret;
if (!pdev->dev.of_node) {
@@ -6425,8 +6652,6 @@
static int msm_asoc_machine_remove(struct platform_device *pdev)
{
- struct snd_soc_card *card = platform_get_drvdata(pdev);
-
audio_notifier_deregister("sdm855");
msm_i2s_auxpcm_deinit();