asoc: bolero: Fix wsa playback mute issue
Update volatile registers list of bolero
VA and WSA macros. Fix sequence for wsa mute
and register access in regmap read/write.
Change-Id: I7984f7e2309933536f3855f6fd4a2e2fd1c4d13b
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
diff --git a/asoc/codecs/bolero/bolero-cdc-regmap.c b/asoc/codecs/bolero/bolero-cdc-regmap.c
index f026c26..ef5b590 100644
--- a/asoc/codecs/bolero/bolero-cdc-regmap.c
+++ b/asoc/codecs/bolero/bolero-cdc-regmap.c
@@ -794,7 +794,31 @@
static bool bolero_is_volatile_register(struct device *dev,
unsigned int reg)
{
- return true;
+ /* Update volatile list for rx/tx macros */
+ switch (reg) {
+ case BOLERO_CDC_VA_TOP_CSR_CORE_ID_0:
+ case BOLERO_CDC_VA_TOP_CSR_CORE_ID_1:
+ case BOLERO_CDC_VA_TOP_CSR_CORE_ID_2:
+ case BOLERO_CDC_VA_TOP_CSR_CORE_ID_3:
+ case BOLERO_CDC_WSA_VBAT_BCL_VBAT_GAIN_MON_VAL:
+ case BOLERO_CDC_WSA_VBAT_BCL_VBAT_DECODE_ST:
+ case BOLERO_CDC_WSA_INTR_CTRL_PIN1_STATUS0:
+ case BOLERO_CDC_WSA_INTR_CTRL_PIN2_STATUS0:
+ case BOLERO_CDC_WSA_COMPANDER0_CTL6:
+ case BOLERO_CDC_WSA_COMPANDER1_CTL6:
+ case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FMIN_CNTR_LSB:
+ case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FMIN_CNTR_MSB:
+ case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FMAX_CNTR_LSB:
+ case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FMAX_CNTR_MSB:
+ case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FIFO:
+ case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMIN_CNTR_LSB:
+ case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMIN_CNTR_MSB:
+ case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMAX_CNTR_LSB:
+ case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMAX_CNTR_MSB:
+ case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FIFO:
+ return true;
+ }
+ return false;
}
const struct regmap_config bolero_regmap_config = {
diff --git a/asoc/codecs/bolero/bolero-cdc-utils.c b/asoc/codecs/bolero/bolero-cdc-utils.c
index ff05608..b7f4142 100644
--- a/asoc/codecs/bolero/bolero-cdc-utils.c
+++ b/asoc/codecs/bolero/bolero-cdc-utils.c
@@ -84,17 +84,17 @@
}
mutex_lock(&priv->io_lock);
for (i = 0; i < val_size; i++) {
- __reg = reg_p[i] - macro_id_base_offset[macro_id];
+ __reg = (reg_p[0] + i * 4) - macro_id_base_offset[macro_id];
ret = priv->read_dev(priv, macro_id, __reg, &temp);
if (ret < 0) {
dev_err_ratelimited(dev,
"%s: Codec read failed (%d), reg: 0x%x, size:%zd\n",
- __func__, ret, reg_p[i], val_size);
+ __func__, ret, reg_p[0] + i * 4, val_size);
break;
}
((u8 *)val)[i] = temp;
dev_dbg(dev, "%s: Read 0x%02x from reg 0x%x\n",
- __func__, temp, reg_p[i]);
+ __func__, temp, reg_p[0] + i * 4);
}
mutex_unlock(&priv->io_lock);
@@ -137,16 +137,16 @@
}
mutex_lock(&priv->io_lock);
for (i = 0; i < val_size; i++) {
- __reg = reg_p[i] - macro_id_base_offset[macro_id];
+ __reg = (reg_p[0] + i * 4) - macro_id_base_offset[macro_id];
ret = priv->write_dev(priv, macro_id, __reg, ((u8 *)val)[i]);
if (ret < 0) {
dev_err_ratelimited(dev,
"%s: Codec write failed (%d), reg:0x%x, size:%zd\n",
- __func__, ret, reg_p[i], val_size);
+ __func__, ret, reg_p[0] + i * 4, val_size);
break;
}
dev_dbg(dev, "Write %02x to reg 0x%x\n", ((u8 *)val)[i],
- reg_p[i]);
+ reg_p[0] + i * 4);
}
mutex_unlock(&priv->io_lock);
return ret;
diff --git a/asoc/codecs/bolero/wsa-macro.c b/asoc/codecs/bolero/wsa-macro.c
index ff15e14..d73193c 100644
--- a/asoc/codecs/bolero/wsa-macro.c
+++ b/asoc/codecs/bolero/wsa-macro.c
@@ -1330,10 +1330,12 @@
case SND_SOC_DAPM_PRE_PMU:
snd_soc_update_bits(codec, boost_path_cfg1, 0x01, 0x01);
snd_soc_update_bits(codec, boost_path_ctl, 0x10, 0x10);
- snd_soc_update_bits(codec, reg, 0x10, 0x00);
if ((snd_soc_read(codec, reg_mix)) & 0x10)
snd_soc_update_bits(codec, reg_mix, 0x10, 0x00);
break;
+ case SND_SOC_DAPM_POST_PMU:
+ snd_soc_update_bits(codec, reg, 0x10, 0x00);
+ break;
case SND_SOC_DAPM_POST_PMD:
snd_soc_update_bits(codec, boost_path_ctl, 0x10, 0x00);
snd_soc_update_bits(codec, boost_path_cfg1, 0x01, 0x00);
@@ -1833,10 +1835,12 @@
SND_SOC_DAPM_MIXER_E("WSA_RX INT0 CHAIN", SND_SOC_NOPM, 0, 0,
NULL, 0, wsa_macro_spk_boost_event,
- SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_MIXER_E("WSA_RX INT1 CHAIN", SND_SOC_NOPM, 0, 0,
NULL, 0, wsa_macro_spk_boost_event,
- SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_INPUT("VIINPUT_WSA"),