soc: soundwire: Add delay to over come race condition
Switch b/w 44.1Khz to 48Khz and vice versa,mux switch on
HPH path is unable to take place.Add sufficient delay to
happen clock release.
Change-Id: I80c40772c03bbbd3a57a4e6de270de4779f882a7
Signed-off-by: Prasad Kumpatla <nkumpat@codeaurora.org>
diff --git a/soc/swr-mstr-ctrl.c b/soc/swr-mstr-ctrl.c
index ead3c9b..e1ec36f 100644
--- a/soc/swr-mstr-ctrl.c
+++ b/soc/swr-mstr-ctrl.c
@@ -2847,6 +2847,12 @@
__func__, swrm->state);
else
swrm_device_suspend(&pdev->dev);
+ /*
+ * add delay to ensure clk release happen
+ * if interrupt triggered for clk stop,
+ * wait for it to exit
+ */
+ usleep_range(10000, 10500);
}
swrm->mclk_freq = *(int *)data;
mutex_unlock(&swrm->mlock);