| commit | 6bb6f668f80b6855255cd4a74953bd610a753b06 | [log] [tgz] |
|---|---|---|
| author | Meng Wang <mengw@codeaurora.org> | Tue Aug 25 17:14:49 2020 +0800 |
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | Fri Sep 04 23:41:48 2020 -0700 |
| tree | d8879409f22b26224e25feaeab221703637852dc | |
| parent | 08747bef396f04f38ea4632444c6e17cb232d69d [diff] |
soc: swr-mstr: update component and interrupt enable sequence Enable component after enabling interrupt to avoid missing some intterupt during master init. Change-Id: I0f60c5431a815c58f878d3b9275a046e47939111 Signed-off-by: Meng Wang <mengw@codeaurora.org>