ASoC: Add support for tx data lane3 for lito v2
Lito has three data lanes for tx swr. As gpio support
for swr tx data3 is present for lito v2, enable data
lane for lito v2.
Change-Id: I56faee1974f59e0a506fc74f2dadb95a52071907
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
diff --git a/asoc/kona-port-config.h b/asoc/kona-port-config.h
index 0f73791..723c94a 100644
--- a/asoc/kona-port-config.h
+++ b/asoc/kona-port-config.h
@@ -50,6 +50,15 @@
{3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1}, /* TX4 */
};
+/* TX UC1: TX1: 1ch, TX2: 2chs, TX3: 1ch(MBHC) */
+static struct port_params tx_frame_params_v2[SWR_MSTR_PORT_LEN] = {
+ {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},/* PCM OUT */
+ {1, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1}, /* TX1 */
+ {1, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 2}, /* TX2 */
+ {3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0}, /* TX3 */
+ {3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 2}, /* TX4 */
+};
+
static struct swr_mstr_port_map sm_port_map[] = {
{TX_MACRO, SWR_UC0, tx_frame_params_default},
{RX_MACRO, SWR_UC0, rx_frame_params_default},
@@ -57,4 +66,11 @@
{WSA_MACRO, SWR_UC0, wsa_frame_params_default},
};
+static struct swr_mstr_port_map sm_port_map_v2[] = {
+ {TX_MACRO, SWR_UC0, tx_frame_params_v2},
+ {RX_MACRO, SWR_UC0, rx_frame_params_default},
+ {RX_MACRO, SWR_UC1, rx_frame_params_dsd},
+ {WSA_MACRO, SWR_UC0, wsa_frame_params_default},
+};
+
#endif /* _KONA_PORT_CONFIG */