ASoC: bolero: Resolve glitch during amic record
Glitch is observed during amic record due to improper
sequence being followed. Reduce delay between toggle
of hpf gate to depending on sample rate to resolve glitch.
Change-Id: I8d9810dbc00264662f24532be9338198e6d7316d
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
diff --git a/asoc/codecs/bolero/tx-macro.c b/asoc/codecs/bolero/tx-macro.c
index 16d79c9..500876b 100644
--- a/asoc/codecs/bolero/tx-macro.c
+++ b/asoc/codecs/bolero/tx-macro.c
@@ -175,6 +175,7 @@
int dec_mode[NUM_DECIMATORS];
bool bcs_clk_en;
bool hs_slow_insert_complete;
+ int amic_sample_rate;
};
static bool tx_macro_get_data(struct snd_soc_component *component,
@@ -499,6 +500,29 @@
hpf_cut_off_freq << 5);
snd_soc_component_update_bits(component, hpf_gate_reg,
0x03, 0x02);
+ /* Add delay between toggle hpf gate based on sample rate */
+ switch(tx_priv->amic_sample_rate) {
+ case 8000:
+ usleep_range(125, 130);
+ break;
+ case 16000:
+ usleep_range(62, 65);
+ break;
+ case 32000:
+ usleep_range(31, 32);
+ break;
+ case 48000:
+ usleep_range(20, 21);
+ break;
+ case 96000:
+ usleep_range(10, 11);
+ break;
+ case 192000:
+ usleep_range(5, 6);
+ break;
+ default:
+ usleep_range(125, 130);
+ }
snd_soc_component_update_bits(component, hpf_gate_reg,
0x03, 0x01);
} else {
@@ -901,6 +925,7 @@
u16 dec_cfg_reg = 0;
u16 hpf_gate_reg = 0;
u16 tx_gain_ctl_reg = 0;
+ u16 tx_fs_reg = 0;
u8 hpf_cut_off_freq = 0;
int hpf_delay = TX_MACRO_DMIC_HPF_DELAY_MS;
int unmute_delay = TX_MACRO_DMIC_UNMUTE_DELAY_MS;
@@ -925,6 +950,11 @@
TX_MACRO_TX_PATH_OFFSET * decimator;
tx_gain_ctl_reg = BOLERO_CDC_TX0_TX_VOL_CTL +
TX_MACRO_TX_PATH_OFFSET * decimator;
+ tx_fs_reg = BOLERO_CDC_TX0_TX_PATH_CTL +
+ TX_MACRO_TX_PATH_OFFSET * decimator;
+
+ tx_priv->amic_sample_rate = (snd_soc_component_read32(component,
+ tx_fs_reg) & 0x0F);
switch (event) {
case SND_SOC_DAPM_PRE_PMU: