asoc: bolero: reset all clks after SSR/PDR
After SSR/PDR, the lpass clocks will be in off state. Force restart
clocks after SSR/PDR, if enabled before SSR/PDR, to reenable the clocks.
Change-Id: I3d850d92bdc6324aa7a64a83a9066f388a85c7f7
Signed-off-by: Meng Wang <mengw@codeaurora.org>
diff --git a/asoc/codecs/bolero/wsa-macro.c b/asoc/codecs/bolero/wsa-macro.c
index f41392d..5b07cbd 100644
--- a/asoc/codecs/bolero/wsa-macro.c
+++ b/asoc/codecs/bolero/wsa-macro.c
@@ -924,6 +924,9 @@
wsa_priv->swr_ctrl_data[0].wsa_swr_pdev,
SWR_DEVICE_SSR_UP, NULL);
break;
+ case BOLERO_MACRO_EVT_CLK_RESET:
+ bolero_rsc_clk_reset(wsa_dev, WSA_CORE_CLK);
+ break;
}
return 0;
}