| commit | d156ab87d5cda9fd90cc757cc6c678017d12dcae | [log] [tgz] |
|---|---|---|
| author | Xiaojun Sang <xsang@codeaurora.org> | Wed Jun 06 11:29:56 2018 +0800 |
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | Fri Jun 15 02:00:12 2018 -0700 |
| tree | b4a6e38bba436146f660adbc72a7759ba927f1e5 | |
| parent | a0e3bd933ad018d2349299d0c698f7b0f64ed5e3 [diff] |
ipc: Implement FIFO queue to fix sequence inconsistency The SVA history buffer is out of order if there are more than 2 continuous RX buffer done from GLINK. Implement FIFO to ensure sequence consistency. Change-Id: If70e2d0160e8f3140d621298b0db03bd89ba88ba Signed-off-by: Xiaojun Sang <xsang@codeaurora.org>