| commit | da48eaf630d5bd6c602dfc23e7ed11097b24d347 | [log] [tgz] |
|---|---|---|
| author | Laxminath Kasam <lkasam@codeaurora.org> | Thu May 31 11:57:51 2018 +0530 |
| committer | Laxminath Kasam <lkasam@codeaurora.org> | Thu Jun 14 23:10:28 2018 +0530 |
| tree | 2b17e9b8859197f9f207f53fb6600c4104f17dfd | |
| parent | f5733a6177e933af965cebb79d15a0212d443229 [diff] |
asoc: codecs: Fix out of bound register access For TX5 MUX registers, offset is not followed in TXn order. Update driver to read/write correct register offset when TX5 MUX registers access. CRs-Fixed: 2218938 Change-Id: I8958b6cd1847967cbd37e7145c9f3909b0b8853b Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>