blob: 45bcfd48751ccdda2ddf8cfc126bec77e4330ba6 [file] [log] [blame]
Aniket Kumar Lataf8664712018-02-22 14:46:09 -08001/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#ifndef __Q6AFE_V2_H__
13#define __Q6AFE_V2_H__
Laxminath Kasam605b42f2017-08-01 22:02:15 +053014#include <dsp/apr_audio-v2.h>
15#include <dsp/rtac.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053016
17#define IN 0x000
18#define OUT 0x001
19#define MSM_AFE_MONO 0
20#define MSM_AFE_CH_STEREO 1
21#define MSM_AFE_MONO_RIGHT 1
22#define MSM_AFE_MONO_LEFT 2
23#define MSM_AFE_STEREO 3
24#define MSM_AFE_4CHANNELS 4
25#define MSM_AFE_6CHANNELS 6
26#define MSM_AFE_8CHANNELS 8
27
28#define MSM_AFE_I2S_FORMAT_LPCM 0
29#define MSM_AFE_I2S_FORMAT_COMPR 1
30#define MSM_AFE_I2S_FORMAT_IEC60958_LPCM 2
31#define MSM_AFE_I2S_FORMAT_IEC60958_COMPR 3
32
33#define MSM_AFE_PORT_TYPE_RX 0
34#define MSM_AFE_PORT_TYPE_TX 1
35
36#define RT_PROXY_DAI_001_RX 0xE0
37#define RT_PROXY_DAI_001_TX 0xF0
38#define RT_PROXY_DAI_002_RX 0xF1
39#define RT_PROXY_DAI_002_TX 0xE1
40#define VIRTUAL_ID_TO_PORTID(val) ((val & 0xF) | 0x2000)
41
42#define AFE_CLK_VERSION_V1 1
43#define AFE_CLK_VERSION_V2 2
Xiaojun Sang12120ab2017-09-28 18:21:21 +080044#define AFE_API_VERSION_SUPPORT_SPV3 2
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053045typedef int (*routing_cb)(int port);
46
47enum {
48 /* IDX 0->4 */
49 IDX_PRIMARY_I2S_RX,
50 IDX_PRIMARY_I2S_TX,
51 IDX_AFE_PORT_ID_PRIMARY_PCM_RX,
52 IDX_AFE_PORT_ID_PRIMARY_PCM_TX,
53 IDX_SECONDARY_I2S_RX,
54 /* IDX 5->9 */
55 IDX_SECONDARY_I2S_TX,
56 IDX_MI2S_RX,
57 IDX_MI2S_TX,
58 IDX_HDMI_RX,
59 IDX_RSVD_2,
60 /* IDX 10->14 */
61 IDX_RSVD_3,
62 IDX_DIGI_MIC_TX,
63 IDX_VOICE_RECORD_RX,
64 IDX_VOICE_RECORD_TX,
65 IDX_VOICE_PLAYBACK_TX,
66 /* IDX 15->19 */
67 IDX_SLIMBUS_0_RX,
68 IDX_SLIMBUS_0_TX,
69 IDX_SLIMBUS_1_RX,
70 IDX_SLIMBUS_1_TX,
71 IDX_SLIMBUS_2_RX,
72 /* IDX 20->24 */
73 IDX_SLIMBUS_2_TX,
74 IDX_SLIMBUS_3_RX,
75 IDX_SLIMBUS_3_TX,
76 IDX_SLIMBUS_4_RX,
77 IDX_SLIMBUS_4_TX,
78 /* IDX 25->29 */
79 IDX_SLIMBUS_5_RX,
80 IDX_SLIMBUS_5_TX,
81 IDX_INT_BT_SCO_RX,
82 IDX_INT_BT_SCO_TX,
83 IDX_INT_BT_A2DP_RX,
84 /* IDX 30->34 */
85 IDX_INT_FM_RX,
86 IDX_INT_FM_TX,
87 IDX_RT_PROXY_PORT_001_RX,
88 IDX_RT_PROXY_PORT_001_TX,
89 IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX,
90 /* IDX 35->39 */
91 IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX,
92 IDX_AFE_PORT_ID_SECONDARY_MI2S_RX,
93 IDX_AFE_PORT_ID_SECONDARY_MI2S_TX,
94 IDX_AFE_PORT_ID_TERTIARY_MI2S_RX,
95 IDX_AFE_PORT_ID_TERTIARY_MI2S_TX,
96 /* IDX 40->44 */
97 IDX_AFE_PORT_ID_PRIMARY_MI2S_RX,
98 IDX_AFE_PORT_ID_PRIMARY_MI2S_TX,
99 IDX_AFE_PORT_ID_SECONDARY_PCM_RX,
100 IDX_AFE_PORT_ID_SECONDARY_PCM_TX,
101 IDX_VOICE2_PLAYBACK_TX,
102 /* IDX 45->49 */
103 IDX_SLIMBUS_6_RX,
104 IDX_SLIMBUS_6_TX,
105 IDX_SPDIF_RX,
106 IDX_GLOBAL_CFG,
107 IDX_AUDIO_PORT_ID_I2S_RX,
108 /* IDX 50->53 */
109 IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_SD1,
110 IDX_AFE_PORT_ID_QUINARY_MI2S_RX,
111 IDX_AFE_PORT_ID_QUINARY_MI2S_TX,
112 IDX_AFE_PORT_ID_SENARY_MI2S_TX,
113 /* IDX 54->117 */
114 IDX_AFE_PORT_ID_PRIMARY_TDM_RX_0,
115 IDX_AFE_PORT_ID_PRIMARY_TDM_TX_0,
116 IDX_AFE_PORT_ID_PRIMARY_TDM_RX_1,
117 IDX_AFE_PORT_ID_PRIMARY_TDM_TX_1,
118 IDX_AFE_PORT_ID_PRIMARY_TDM_RX_2,
119 IDX_AFE_PORT_ID_PRIMARY_TDM_TX_2,
120 IDX_AFE_PORT_ID_PRIMARY_TDM_RX_3,
121 IDX_AFE_PORT_ID_PRIMARY_TDM_TX_3,
122 IDX_AFE_PORT_ID_PRIMARY_TDM_RX_4,
123 IDX_AFE_PORT_ID_PRIMARY_TDM_TX_4,
124 IDX_AFE_PORT_ID_PRIMARY_TDM_RX_5,
125 IDX_AFE_PORT_ID_PRIMARY_TDM_TX_5,
126 IDX_AFE_PORT_ID_PRIMARY_TDM_RX_6,
127 IDX_AFE_PORT_ID_PRIMARY_TDM_TX_6,
128 IDX_AFE_PORT_ID_PRIMARY_TDM_RX_7,
129 IDX_AFE_PORT_ID_PRIMARY_TDM_TX_7,
130 IDX_AFE_PORT_ID_SECONDARY_TDM_RX_0,
131 IDX_AFE_PORT_ID_SECONDARY_TDM_TX_0,
132 IDX_AFE_PORT_ID_SECONDARY_TDM_RX_1,
133 IDX_AFE_PORT_ID_SECONDARY_TDM_TX_1,
134 IDX_AFE_PORT_ID_SECONDARY_TDM_RX_2,
135 IDX_AFE_PORT_ID_SECONDARY_TDM_TX_2,
136 IDX_AFE_PORT_ID_SECONDARY_TDM_RX_3,
137 IDX_AFE_PORT_ID_SECONDARY_TDM_TX_3,
138 IDX_AFE_PORT_ID_SECONDARY_TDM_RX_4,
139 IDX_AFE_PORT_ID_SECONDARY_TDM_TX_4,
140 IDX_AFE_PORT_ID_SECONDARY_TDM_RX_5,
141 IDX_AFE_PORT_ID_SECONDARY_TDM_TX_5,
142 IDX_AFE_PORT_ID_SECONDARY_TDM_RX_6,
143 IDX_AFE_PORT_ID_SECONDARY_TDM_TX_6,
144 IDX_AFE_PORT_ID_SECONDARY_TDM_RX_7,
145 IDX_AFE_PORT_ID_SECONDARY_TDM_TX_7,
146 IDX_AFE_PORT_ID_TERTIARY_TDM_RX_0,
147 IDX_AFE_PORT_ID_TERTIARY_TDM_TX_0,
148 IDX_AFE_PORT_ID_TERTIARY_TDM_RX_1,
149 IDX_AFE_PORT_ID_TERTIARY_TDM_TX_1,
150 IDX_AFE_PORT_ID_TERTIARY_TDM_RX_2,
151 IDX_AFE_PORT_ID_TERTIARY_TDM_TX_2,
152 IDX_AFE_PORT_ID_TERTIARY_TDM_RX_3,
153 IDX_AFE_PORT_ID_TERTIARY_TDM_TX_3,
154 IDX_AFE_PORT_ID_TERTIARY_TDM_RX_4,
155 IDX_AFE_PORT_ID_TERTIARY_TDM_TX_4,
156 IDX_AFE_PORT_ID_TERTIARY_TDM_RX_5,
157 IDX_AFE_PORT_ID_TERTIARY_TDM_TX_5,
158 IDX_AFE_PORT_ID_TERTIARY_TDM_RX_6,
159 IDX_AFE_PORT_ID_TERTIARY_TDM_TX_6,
160 IDX_AFE_PORT_ID_TERTIARY_TDM_RX_7,
161 IDX_AFE_PORT_ID_TERTIARY_TDM_TX_7,
162 IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_0,
163 IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_0,
164 IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_1,
165 IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_1,
166 IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_2,
167 IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_2,
168 IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_3,
169 IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_3,
170 IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_4,
171 IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_4,
172 IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_5,
173 IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_5,
174 IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_6,
175 IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_6,
176 IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_7,
177 IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_7,
178 /* IDX 118->121 */
179 IDX_SLIMBUS_7_RX,
180 IDX_SLIMBUS_7_TX,
181 IDX_SLIMBUS_8_RX,
182 IDX_SLIMBUS_8_TX,
183 /* IDX 122-> 123 */
184 IDX_AFE_PORT_ID_USB_RX,
185 IDX_AFE_PORT_ID_USB_TX,
186 /* IDX 124 */
187 IDX_DISPLAY_PORT_RX,
188 /* IDX 125-> 128 */
189 IDX_AFE_PORT_ID_TERTIARY_PCM_RX,
190 IDX_AFE_PORT_ID_TERTIARY_PCM_TX,
191 IDX_AFE_PORT_ID_QUATERNARY_PCM_RX,
192 IDX_AFE_PORT_ID_QUATERNARY_PCM_TX,
193 /* IDX 129-> 142 */
194 IDX_AFE_PORT_ID_INT0_MI2S_RX,
195 IDX_AFE_PORT_ID_INT0_MI2S_TX,
196 IDX_AFE_PORT_ID_INT1_MI2S_RX,
197 IDX_AFE_PORT_ID_INT1_MI2S_TX,
198 IDX_AFE_PORT_ID_INT2_MI2S_RX,
199 IDX_AFE_PORT_ID_INT2_MI2S_TX,
200 IDX_AFE_PORT_ID_INT3_MI2S_RX,
201 IDX_AFE_PORT_ID_INT3_MI2S_TX,
202 IDX_AFE_PORT_ID_INT4_MI2S_RX,
203 IDX_AFE_PORT_ID_INT4_MI2S_TX,
204 IDX_AFE_PORT_ID_INT5_MI2S_RX,
205 IDX_AFE_PORT_ID_INT5_MI2S_TX,
206 IDX_AFE_PORT_ID_INT6_MI2S_RX,
207 IDX_AFE_PORT_ID_INT6_MI2S_TX,
Rohit Kumarc08b14f2017-10-06 10:52:17 +0530208 /* IDX 143-> 160 */
209 IDX_AFE_PORT_ID_QUINARY_PCM_RX,
210 IDX_AFE_PORT_ID_QUINARY_PCM_TX,
211 IDX_AFE_PORT_ID_QUINARY_TDM_RX_0,
212 IDX_AFE_PORT_ID_QUINARY_TDM_TX_0,
213 IDX_AFE_PORT_ID_QUINARY_TDM_RX_1,
214 IDX_AFE_PORT_ID_QUINARY_TDM_TX_1,
215 IDX_AFE_PORT_ID_QUINARY_TDM_RX_2,
216 IDX_AFE_PORT_ID_QUINARY_TDM_TX_2,
217 IDX_AFE_PORT_ID_QUINARY_TDM_RX_3,
218 IDX_AFE_PORT_ID_QUINARY_TDM_TX_3,
219 IDX_AFE_PORT_ID_QUINARY_TDM_RX_4,
220 IDX_AFE_PORT_ID_QUINARY_TDM_TX_4,
221 IDX_AFE_PORT_ID_QUINARY_TDM_RX_5,
222 IDX_AFE_PORT_ID_QUINARY_TDM_TX_5,
223 IDX_AFE_PORT_ID_QUINARY_TDM_RX_6,
224 IDX_AFE_PORT_ID_QUINARY_TDM_TX_6,
225 IDX_AFE_PORT_ID_QUINARY_TDM_RX_7,
226 IDX_AFE_PORT_ID_QUINARY_TDM_TX_7,
Raja Mallik425e1d32018-05-20 19:21:10 +0530227 IDX_AFE_LOOPBACK_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530228 AFE_MAX_PORTS
229};
230
231enum afe_mad_type {
232 MAD_HW_NONE = 0x00,
233 MAD_HW_AUDIO = 0x01,
234 MAD_HW_BEACON = 0x02,
235 MAD_HW_ULTRASOUND = 0x04,
236 MAD_SW_AUDIO = 0x05,
237};
238
239enum afe_cal_mode {
240 AFE_CAL_MODE_DEFAULT = 0x00,
241 AFE_CAL_MODE_NONE,
242};
243
Raja Mallike1b2f792018-06-01 13:17:36 +0530244enum lpass_clk_ver {
245 LPASS_CLK_VER_1,
246 LPASS_CLK_VER_2,
247};
248
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530249struct afe_audio_buffer {
250 dma_addr_t phys;
251 void *data;
252 uint32_t used;
253 uint32_t size;/* size of buffer */
254 uint32_t actual_size; /* actual number of bytes read by DSP */
255 struct ion_handle *handle;
256 struct ion_client *client;
257};
258
259struct afe_audio_port_data {
260 struct afe_audio_buffer *buf;
261 uint32_t max_buf_cnt;
262 uint32_t dsp_buf;
263 uint32_t cpu_buf;
264 struct list_head mem_map_handle;
265 uint32_t tmp_hdl;
266 /* read or write locks */
267 struct mutex lock;
268 spinlock_t dsp_lock;
269};
270
271struct afe_audio_client {
272 atomic_t cmd_state;
273 /* Relative or absolute TS */
274 uint32_t time_flag;
275 void *priv;
276 uint64_t time_stamp;
277 struct mutex cmd_lock;
278 /* idx:1 out port, 0: in port*/
279 struct afe_audio_port_data port[2];
280 wait_queue_head_t cmd_wait;
281 uint32_t mem_map_handle;
282};
283
284struct aanc_data {
285 bool aanc_active;
286 uint16_t aanc_rx_port;
287 uint16_t aanc_tx_port;
288 uint32_t aanc_rx_port_sample_rate;
289 uint32_t aanc_tx_port_sample_rate;
290};
291
292int afe_open(u16 port_id, union afe_port_config *afe_config, int rate);
293int afe_close(int port_id);
Raja Mallike1b2f792018-06-01 13:17:36 +0530294enum lpass_clk_ver afe_get_lpass_clk_ver(void);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530295int afe_loopback(u16 enable, u16 rx_port, u16 tx_port);
296int afe_sidetone_enable(u16 tx_port_id, u16 rx_port_id, bool enable);
297int afe_loopback_gain(u16 port_id, u16 volume);
298int afe_validate_port(u16 port_id);
299int afe_get_port_index(u16 port_id);
300int afe_get_topology(int port_id);
301int afe_start_pseudo_port(u16 port_id);
302int afe_stop_pseudo_port(u16 port_id);
303uint32_t afe_req_mmap_handle(struct afe_audio_client *ac);
304int afe_memory_map(phys_addr_t dma_addr_p, u32 dma_buf_sz,
305 struct afe_audio_client *ac);
306int afe_cmd_memory_map(phys_addr_t dma_addr_p, u32 dma_buf_sz);
307int afe_cmd_memory_map_nowait(int port_id, phys_addr_t dma_addr_p,
308 u32 dma_buf_sz);
309int afe_cmd_memory_unmap(u32 dma_addr_p);
310int afe_cmd_memory_unmap_nowait(u32 dma_addr_p);
311void afe_set_dtmf_gen_rx_portid(u16 rx_port_id, int set);
312int afe_dtmf_generate_rx(int64_t duration_in_ms,
313 uint16_t high_freq,
314 uint16_t low_freq, uint16_t gain);
315int afe_register_get_events(u16 port_id,
316 void (*cb)(uint32_t opcode,
317 uint32_t token, uint32_t *payload, void *priv),
318 void *private_data);
319int afe_unregister_get_events(u16 port_id);
320int afe_rt_proxy_port_write(phys_addr_t buf_addr_p,
321 u32 mem_map_handle, int bytes);
322int afe_rt_proxy_port_read(phys_addr_t buf_addr_p,
323 u32 mem_map_handle, int bytes);
324void afe_set_cal_mode(u16 port_id, enum afe_cal_mode afe_cal_mode);
325int afe_port_start(u16 port_id, union afe_port_config *afe_config,
326 u32 rate);
Manisha Agarwal472fc1e2018-11-04 15:46:02 +0530327int afe_set_tws_channel_mode(u16 port_id, u32 channel_mode);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530328int afe_port_start_v2(u16 port_id, union afe_port_config *afe_config,
329 u32 rate, u16 afe_in_channels, u16 afe_in_bit_width,
Aniket Kumar Lataf8664712018-02-22 14:46:09 -0800330 struct afe_enc_config *enc_config,
331 struct afe_dec_config *dec_config);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530332int afe_spk_prot_feed_back_cfg(int src_port, int dst_port,
333 int l_ch, int r_ch, u32 enable);
334int afe_spk_prot_get_calib_data(struct afe_spkr_prot_get_vi_calib *calib);
335int afe_port_stop_nowait(int port_id);
336int afe_apply_gain(u16 port_id, u16 gain);
337int afe_q6_interface_prepare(void);
338int afe_get_port_type(u16 port_id);
339int q6afe_audio_client_buf_alloc_contiguous(unsigned int dir,
340 struct afe_audio_client *ac,
341 unsigned int bufsz,
342 unsigned int bufcnt);
343struct afe_audio_client *q6afe_audio_client_alloc(void *priv);
344int q6afe_audio_client_buf_free_contiguous(unsigned int dir,
345 struct afe_audio_client *ac);
346void q6afe_audio_client_free(struct afe_audio_client *ac);
347/* if port_id is virtual, convert to physical..
348 * if port_id is already physical, return physical
349 */
350int afe_convert_virtual_to_portid(u16 port_id);
351
352int afe_pseudo_port_start_nowait(u16 port_id);
353int afe_pseudo_port_stop_nowait(u16 port_id);
354int afe_set_lpass_clock(u16 port_id, struct afe_clk_cfg *cfg);
355int afe_set_lpass_clock_v2(u16 port_id, struct afe_clk_set *cfg);
356int afe_set_lpass_clk_cfg(int index, struct afe_clk_set *cfg);
357int afe_set_digital_codec_core_clock(u16 port_id,
358 struct afe_digital_clk_cfg *cfg);
359int afe_set_lpass_internal_digital_codec_clock(u16 port_id,
360 struct afe_digital_clk_cfg *cfg);
361int afe_enable_lpass_core_shared_clock(u16 port_id, u32 enable);
362
363int q6afe_check_osr_clk_freq(u32 freq);
364
365int afe_send_spdif_clk_cfg(struct afe_param_id_spdif_clk_cfg *cfg,
366 u16 port_id);
367int afe_send_spdif_ch_status_cfg(struct afe_param_id_spdif_ch_status_cfg
368 *ch_status_cfg, u16 port_id);
369
370int afe_spdif_port_start(u16 port_id, struct afe_spdif_port_config *spdif_port,
371 u32 rate);
372
373int afe_turn_onoff_hw_mad(u16 mad_type, u16 mad_enable);
374int afe_port_set_mad_type(u16 port_id, enum afe_mad_type mad_type);
375enum afe_mad_type afe_port_get_mad_type(u16 port_id);
376int afe_set_config(enum afe_config_type config_type, void *config_data,
377 int arg);
378void afe_clear_config(enum afe_config_type config);
379bool afe_has_config(enum afe_config_type config);
380
381void afe_set_aanc_info(struct aanc_data *aanc_info);
382int afe_port_group_set_param(u16 group_id,
383 union afe_port_group_config *afe_group_config);
384int afe_port_group_enable(u16 group_id,
385 union afe_port_group_config *afe_group_config, u16 enable);
386int afe_unmap_rtac_block(uint32_t *mem_map_handle);
387int afe_map_rtac_block(struct rtac_cal_block_data *cal_block);
388int afe_send_slot_mapping_cfg(
389 struct afe_param_id_slot_mapping_cfg *slot_mapping_cfg,
390 u16 port_id);
391int afe_send_custom_tdm_header_cfg(
392 struct afe_param_id_custom_tdm_header_cfg *custom_tdm_header_cfg,
393 u16 port_id);
394int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port,
395 u32 rate, u16 num_groups);
396void afe_set_routing_callback(routing_cb cb);
397int afe_get_av_dev_drift(struct afe_param_id_dev_timing_stats *timing_stats,
398 u16 port);
399#endif /* __Q6AFE_V2_H__ */