blob: 52a60a3c60876d789d709db5a68bf447496d76b5 [file] [log] [blame]
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef _SWR_WCD_CTRL_H
14#define _SWR_WCD_CTRL_H
15#include <linux/module.h>
Laxminath Kasam605b42f2017-08-01 22:02:15 +053016#include <soc/swr-wcd.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053017
18#define SWR_MAX_ROW 0 /* Rows = 48 */
19#define SWR_MAX_COL 7 /* Cols = 16 */
20#define SWR_MIN_COL 0 /* Cols = 2 */
21
22#define SWR_WCD_NAME "swr-wcd"
23
24#define SWR_MSTR_PORT_LEN 8 /* Number of master ports */
25
26#define SWRM_VERSION_1_0 0x01010000
27#define SWRM_VERSION_1_2 0x01030000
28#define SWRM_VERSION_1_3 0x01040000
29
30enum {
31 SWR_MSTR_PAUSE,
32 SWR_MSTR_RESUME,
33 SWR_MSTR_UP,
34 SWR_MSTR_DOWN,
35};
36
37enum {
38 SWR_IRQ_FREE,
39 SWR_IRQ_REGISTER,
40};
41
42enum {
43 SWR_DAC_PORT,
44 SWR_COMP_PORT,
45 SWR_BOOST_PORT,
46 SWR_VISENSE_PORT,
47};
48
49struct usecase {
50 u8 num_port;
51 u8 num_ch;
52 u32 chrate;
53};
54
55struct port_params {
56 u8 si;
57 u8 off1;
58 u8 off2;
59};
60
61struct swrm_mports {
62 struct list_head list;
63 u8 id;
64};
65
66struct swr_ctrl_platform_data {
67 void *handle; /* holds priv data */
68 int (*read)(void *handle, int reg);
69 int (*write)(void *handle, int reg, int val);
70 int (*bulk_write)(void *handle, u32 *reg, u32 *val, size_t len);
71 int (*clk)(void *handle, bool enable);
72 int (*reg_irq)(void *handle, irqreturn_t(*irq_handler)(int irq,
73 void *data), void *swr_handle, int type);
74};
75
76struct swr_mstr_ctrl {
77 struct swr_master master;
78 struct device *dev;
79 struct resource *supplies;
80 struct clk *mclk;
Laxminath Kasam8f7ccc22017-08-28 17:35:04 +053081 int clk_ref_count;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053082 struct completion reset;
83 struct completion broadcast;
84 struct mutex mlock;
85 struct mutex reslock;
86 u8 rcmd_id;
87 u8 wcmd_id;
88 void *handle; /* SWR Master handle from client for read and writes */
89 int (*read)(void *handle, int reg);
90 int (*write)(void *handle, int reg, int val);
91 int (*bulk_write)(void *handle, u32 *reg, u32 *val, size_t len);
92 int (*clk)(void *handle, bool enable);
93 int (*reg_irq)(void *handle, irqreturn_t(*irq_handler)(int irq,
94 void *data), void *swr_handle, int type);
95 int irq;
96 int version;
97 int num_enum_slaves;
98 int slave_status;
99 struct swr_mstr_port *mstr_port;
100 struct list_head mport_list;
101 int state;
102 struct platform_device *pdev;
103 int num_rx_chs;
104 u8 num_cfg_devs;
105};
106
107#endif /* _SWR_WCD_CTRL_H */