blob: 713da55cb0a977142a24490b3d5881b8a3d6675c [file] [log] [blame]
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/of_gpio.h>
14#include <linux/platform_device.h>
15#include <linux/module.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053016#include <sound/pcm_params.h>
Laxminath Kasam605b42f2017-08-01 22:02:15 +053017#include "msm-pcm-routing-v2.h"
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053018#include "sdm660-common.h"
Laxminath Kasam605b42f2017-08-01 22:02:15 +053019#include "codecs/msm-cdc-pinctrl.h"
20#include "codecs/sdm660_cdc/msm-digital-cdc.h"
21#include "codecs/sdm660_cdc/msm-analog-cdc.h"
22#include "codecs/msm_sdw/msm_sdw.h"
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053023
24#define __CHIPSET__ "SDM660 "
25#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
26
27#define DEFAULT_MCLK_RATE 9600000
28#define NATIVE_MCLK_RATE 11289600
29
30#define WCD_MBHC_DEF_RLOADS 5
31
32#define WCN_CDC_SLIM_RX_CH_MAX 2
33#define WCN_CDC_SLIM_TX_CH_MAX 3
34
35#define WSA8810_NAME_1 "wsa881x.20170211"
36#define WSA8810_NAME_2 "wsa881x.20170212"
37
38enum {
39 INT0_MI2S = 0,
40 INT1_MI2S,
41 INT2_MI2S,
42 INT3_MI2S,
43 INT4_MI2S,
44 INT5_MI2S,
45 INT6_MI2S,
46 INT_MI2S_MAX,
47};
48
49enum {
50 BT_SLIM7,
51 FM_SLIM8,
52 SLIM_MAX,
53};
54
55/*TDM default offset currently only supporting TDM_RX_0 and TDM_TX_0 */
56static unsigned int tdm_slot_offset[TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {
57 {0, 4, 8, 12, 16, 20, 24, 28},/* TX_0 | RX_0 */
58 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_1 | RX_1 */
59 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_2 | RX_2 */
60 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_3 | RX_3 */
61 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_4 | RX_4 */
62 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_5 | RX_5 */
63 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_6 | RX_6 */
64 {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_7 | RX_7 */
65};
66
67static struct afe_clk_set int_mi2s_clk[INT_MI2S_MAX] = {
68 {
69 AFE_API_VERSION_I2S_CONFIG,
70 Q6AFE_LPASS_CLK_ID_INT0_MI2S_IBIT,
71 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
72 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
73 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
74 0,
75 },
76 {
77 AFE_API_VERSION_I2S_CONFIG,
78 Q6AFE_LPASS_CLK_ID_INT1_MI2S_IBIT,
79 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
80 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
81 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
82 0,
83 },
84 {
85 AFE_API_VERSION_I2S_CONFIG,
86 Q6AFE_LPASS_CLK_ID_INT2_MI2S_IBIT,
87 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
88 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
89 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
90 0,
91 },
92 {
93 AFE_API_VERSION_I2S_CONFIG,
94 Q6AFE_LPASS_CLK_ID_INT3_MI2S_IBIT,
95 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
96 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
97 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
98 0,
99 },
100 {
101 AFE_API_VERSION_I2S_CONFIG,
102 Q6AFE_LPASS_CLK_ID_INT4_MI2S_IBIT,
103 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
104 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
105 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
106 0,
107 },
108 {
109 AFE_API_VERSION_I2S_CONFIG,
110 Q6AFE_LPASS_CLK_ID_INT5_MI2S_IBIT,
111 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
112 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
113 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
114 0,
115 },
116 {
117 AFE_API_VERSION_I2S_CONFIG,
118 Q6AFE_LPASS_CLK_ID_INT6_MI2S_IBIT,
119 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
120 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
121 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
122 0,
123 },
124};
125
126struct dev_config {
127 u32 sample_rate;
128 u32 bit_format;
129 u32 channels;
130};
131
132/* Default configuration of MI2S channels */
133static struct dev_config int_mi2s_cfg[] = {
134 [INT0_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
135 [INT1_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
136 [INT2_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
137 [INT3_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
138 [INT4_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
139 [INT5_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
140 [INT6_MI2S] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
141};
142
143static struct dev_config bt_fm_cfg[] = {
144 [BT_SLIM7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
145 [FM_SLIM8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
146};
147
148static char const *int_mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
149 "KHZ_32", "KHZ_44P1", "KHZ_48",
150 "KHZ_96", "KHZ_192"};
151static const char *const int_mi2s_ch_text[] = {"One", "Two"};
152static const char *const int_mi2s_tx_ch_text[] = {"One", "Two",
153 "Three", "Four"};
154static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
155static const char *const loopback_mclk_text[] = {"DISABLE", "ENABLE"};
156static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_48"};
157
158static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_sample_rate, int_mi2s_rate_text);
159static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_chs, int_mi2s_ch_text);
160static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_format, bit_format_text);
161static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_sample_rate, int_mi2s_rate_text);
162static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_chs, int_mi2s_tx_ch_text);
163static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_format, bit_format_text);
164static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_sample_rate, int_mi2s_rate_text);
165static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_chs, int_mi2s_tx_ch_text);
166static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_format, bit_format_text);
167static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_sample_rate, int_mi2s_rate_text);
168static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_chs, int_mi2s_ch_text);
169static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_format, bit_format_text);
170static SOC_ENUM_SINGLE_EXT_DECL(int5_mi2s_tx_chs, int_mi2s_ch_text);
171static SOC_ENUM_SINGLE_EXT_DECL(loopback_mclk_en, loopback_mclk_text);
172static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
173
174static int msm_dmic_event(struct snd_soc_dapm_widget *w,
175 struct snd_kcontrol *kcontrol, int event);
176static int msm_int_enable_dig_cdc_clk(struct snd_soc_codec *codec, int enable,
177 bool dapm);
178static int msm_int_mclk0_event(struct snd_soc_dapm_widget *w,
179 struct snd_kcontrol *kcontrol, int event);
180static int msm_int_mi2s_snd_startup(struct snd_pcm_substream *substream);
181static void msm_int_mi2s_snd_shutdown(struct snd_pcm_substream *substream);
182
183static struct wcd_mbhc_config *mbhc_cfg_ptr;
184static struct snd_info_entry *codec_root;
185
186static int int_mi2s_get_bit_format_val(int bit_format)
187{
188 int val = 0;
189
190 switch (bit_format) {
191 case SNDRV_PCM_FORMAT_S24_3LE:
192 val = 2;
193 break;
194 case SNDRV_PCM_FORMAT_S24_LE:
195 val = 1;
196 break;
197 case SNDRV_PCM_FORMAT_S16_LE:
198 default:
199 val = 0;
200 break;
201 }
202 return val;
203}
204
205static int int_mi2s_get_bit_format(int val)
206{
207 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
208
209 switch (val) {
210 case 0:
211 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
212 break;
213 case 1:
214 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
215 break;
216 case 2:
217 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
218 break;
219 default:
220 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
221 break;
222 }
223 return bit_fmt;
224}
225
226static int int_mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
227{
228 int port_id = 0;
229
230 if (strnstr(kcontrol->id.name, "INT0_MI2S", sizeof("INT0_MI2S")))
231 port_id = INT0_MI2S;
232 else if (strnstr(kcontrol->id.name, "INT2_MI2S", sizeof("INT2_MI2S")))
233 port_id = INT2_MI2S;
234 else if (strnstr(kcontrol->id.name, "INT3_MI2S", sizeof("INT3_MI2S")))
235 port_id = INT3_MI2S;
236 else if (strnstr(kcontrol->id.name, "INT4_MI2S", sizeof("INT4_MI2S")))
237 port_id = INT4_MI2S;
238 else {
239 pr_err("%s: unsupported channel: %s",
240 __func__, kcontrol->id.name);
241 return -EINVAL;
242 }
243
244 return port_id;
245}
246
247static int int_mi2s_bit_format_get(struct snd_kcontrol *kcontrol,
248 struct snd_ctl_elem_value *ucontrol)
249{
250 int ch_num = int_mi2s_get_port_idx(kcontrol);
251
252 if (ch_num < 0)
253 return ch_num;
254
255 ucontrol->value.enumerated.item[0] =
256 int_mi2s_get_bit_format_val(int_mi2s_cfg[ch_num].bit_format);
257
258 pr_debug("%s: int_mi2s[%d]_bit_format = %d, ucontrol value = %d\n",
259 __func__, ch_num, int_mi2s_cfg[ch_num].bit_format,
260 ucontrol->value.enumerated.item[0]);
261
262 return 0;
263}
264
265static int int_mi2s_bit_format_put(struct snd_kcontrol *kcontrol,
266 struct snd_ctl_elem_value *ucontrol)
267{
268 int ch_num = int_mi2s_get_port_idx(kcontrol);
269
270 if (ch_num < 0)
271 return ch_num;
272
273 int_mi2s_cfg[ch_num].bit_format =
274 int_mi2s_get_bit_format(ucontrol->value.enumerated.item[0]);
275
276 pr_debug("%s: int_mi2s[%d]_rx_bit_format = %d, ucontrol value = %d\n",
277 __func__, ch_num, int_mi2s_cfg[ch_num].bit_format,
278 ucontrol->value.enumerated.item[0]);
279
280 return 0;
281}
282
283static inline int param_is_mask(int p)
284{
285 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
286 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
287}
288
289static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
290 int n)
291{
292 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
293}
294
295static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
296{
297 if (bit >= SNDRV_MASK_MAX)
298 return;
299 if (param_is_mask(n)) {
300 struct snd_mask *m = param_to_mask(p, n);
301
302 m->bits[0] = 0;
303 m->bits[1] = 0;
304 m->bits[bit >> 5] |= (1 << (bit & 31));
305 }
306}
307
308static int int_mi2s_get_sample_rate_val(int sample_rate)
309{
310 int sample_rate_val;
311
312 switch (sample_rate) {
313 case SAMPLING_RATE_8KHZ:
314 sample_rate_val = 0;
315 break;
316 case SAMPLING_RATE_16KHZ:
317 sample_rate_val = 1;
318 break;
319 case SAMPLING_RATE_32KHZ:
320 sample_rate_val = 2;
321 break;
322 case SAMPLING_RATE_44P1KHZ:
323 sample_rate_val = 3;
324 break;
325 case SAMPLING_RATE_48KHZ:
326 sample_rate_val = 4;
327 break;
328 case SAMPLING_RATE_96KHZ:
329 sample_rate_val = 5;
330 break;
331 case SAMPLING_RATE_192KHZ:
332 sample_rate_val = 6;
333 break;
334 default:
335 sample_rate_val = 4;
336 break;
337 }
338 return sample_rate_val;
339}
340
341static int int_mi2s_get_sample_rate(int value)
342{
343 int sample_rate;
344
345 switch (value) {
346 case 0:
347 sample_rate = SAMPLING_RATE_8KHZ;
348 break;
349 case 1:
350 sample_rate = SAMPLING_RATE_16KHZ;
351 break;
352 case 2:
353 sample_rate = SAMPLING_RATE_32KHZ;
354 break;
355 case 3:
356 sample_rate = SAMPLING_RATE_44P1KHZ;
357 break;
358 case 4:
359 sample_rate = SAMPLING_RATE_48KHZ;
360 break;
361 case 5:
362 sample_rate = SAMPLING_RATE_96KHZ;
363 break;
364 case 6:
365 sample_rate = SAMPLING_RATE_192KHZ;
366 break;
367 default:
368 sample_rate = SAMPLING_RATE_48KHZ;
369 break;
370 }
371 return sample_rate;
372}
373
374static int int_mi2s_sample_rate_put(struct snd_kcontrol *kcontrol,
375 struct snd_ctl_elem_value *ucontrol)
376{
377 int idx = int_mi2s_get_port_idx(kcontrol);
378
379 if (idx < 0)
380 return idx;
381
382 int_mi2s_cfg[idx].sample_rate =
383 int_mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
384
385 pr_debug("%s: idx[%d]_sample_rate = %d, item = %d\n", __func__,
386 idx, int_mi2s_cfg[idx].sample_rate,
387 ucontrol->value.enumerated.item[0]);
388
389 return 0;
390}
391
392static int int_mi2s_sample_rate_get(struct snd_kcontrol *kcontrol,
393 struct snd_ctl_elem_value *ucontrol)
394{
395 int idx = int_mi2s_get_port_idx(kcontrol);
396
397 if (idx < 0)
398 return idx;
399
400 ucontrol->value.enumerated.item[0] =
401 int_mi2s_get_sample_rate_val(int_mi2s_cfg[idx].sample_rate);
402
403 pr_debug("%s: idx[%d]_sample_rate = %d, item = %d\n", __func__,
404 idx, int_mi2s_cfg[idx].sample_rate,
405 ucontrol->value.enumerated.item[0]);
406
407 return 0;
408}
409
410static int int_mi2s_ch_get(struct snd_kcontrol *kcontrol,
411 struct snd_ctl_elem_value *ucontrol)
412{
413 int idx = int_mi2s_get_port_idx(kcontrol);
414
415 if (idx < 0)
416 return idx;
417
418 pr_debug("%s: int_mi2s_[%d]_rx_ch = %d\n", __func__,
419 idx, int_mi2s_cfg[idx].channels);
420 ucontrol->value.enumerated.item[0] = int_mi2s_cfg[idx].channels - 1;
421
422 return 0;
423}
424
425static int int_mi2s_ch_put(struct snd_kcontrol *kcontrol,
426 struct snd_ctl_elem_value *ucontrol)
427{
428 int idx = int_mi2s_get_port_idx(kcontrol);
429
430 if (idx < 0)
431 return idx;
432
433 int_mi2s_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
434 pr_debug("%s: int_mi2s_[%d]_ch = %d\n", __func__,
435 idx, int_mi2s_cfg[idx].channels);
436
437 return 1;
438}
439
440static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
441 SND_SOC_DAPM_SUPPLY_S("INT_MCLK0", -1, SND_SOC_NOPM, 0, 0,
442 msm_int_mclk0_event, SND_SOC_DAPM_POST_PMD),
443 SND_SOC_DAPM_MIC("Handset Mic", NULL),
444 SND_SOC_DAPM_MIC("Headset Mic", NULL),
445 SND_SOC_DAPM_MIC("Secondary Mic", NULL),
446 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
447 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
448 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
449 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
450};
451
452static int msm_config_hph_compander_gpio(bool enable,
453 struct snd_soc_codec *codec)
454{
455 struct snd_soc_card *card = codec->component.card;
456 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
457 int ret = 0;
458
459 pr_debug("%s: %s HPH Compander\n", __func__,
460 enable ? "Enable" : "Disable");
461
462 if (enable) {
463 ret = msm_cdc_pinctrl_select_active_state(pdata->comp_gpio_p);
464 if (ret) {
465 pr_err("%s: gpio set cannot be activated %s\n",
466 __func__, "comp_gpio");
467 goto done;
468 }
469 } else {
470 ret = msm_cdc_pinctrl_select_sleep_state(pdata->comp_gpio_p);
471 if (ret) {
472 pr_err("%s: gpio set cannot be de-activated %s\n",
473 __func__, "comp_gpio");
474 goto done;
475 }
476 }
477
478done:
479 return ret;
480}
481
482static int is_ext_spk_gpio_support(struct platform_device *pdev,
483 struct msm_asoc_mach_data *pdata)
484{
485 const char *spk_ext_pa = "qcom,msm-spk-ext-pa";
486
487 pr_debug("%s:Enter\n", __func__);
488
489 pdata->spk_ext_pa_gpio = of_get_named_gpio(pdev->dev.of_node,
490 spk_ext_pa, 0);
491
492 if (pdata->spk_ext_pa_gpio < 0) {
493 dev_dbg(&pdev->dev,
494 "%s: missing %s in dt node\n", __func__, spk_ext_pa);
495 } else {
496 if (!gpio_is_valid(pdata->spk_ext_pa_gpio)) {
497 pr_err("%s: Invalid external speaker gpio: %d",
498 __func__, pdata->spk_ext_pa_gpio);
499 return -EINVAL;
500 }
501 }
502 return 0;
503}
504
505static int enable_spk_ext_pa(struct snd_soc_codec *codec, int enable)
506{
507 struct snd_soc_card *card = codec->component.card;
508 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
509 int ret;
510
511 if (!gpio_is_valid(pdata->spk_ext_pa_gpio)) {
512 pr_err("%s: Invalid gpio: %d\n", __func__,
513 pdata->spk_ext_pa_gpio);
514 return false;
515 }
516
517 pr_debug("%s: %s external speaker PA\n", __func__,
518 enable ? "Enable" : "Disable");
519
520 if (enable) {
521 ret = msm_cdc_pinctrl_select_active_state(
522 pdata->ext_spk_gpio_p);
523 if (ret) {
524 pr_err("%s: gpio set cannot be de-activated %s\n",
525 __func__, "ext_spk_gpio");
526 return ret;
527 }
528 gpio_set_value_cansleep(pdata->spk_ext_pa_gpio, enable);
529 } else {
530 gpio_set_value_cansleep(pdata->spk_ext_pa_gpio, enable);
531 ret = msm_cdc_pinctrl_select_sleep_state(
532 pdata->ext_spk_gpio_p);
533 if (ret) {
534 pr_err("%s: gpio set cannot be de-activated %s\n",
535 __func__, "ext_spk_gpio");
536 return ret;
537 }
538 }
539 return 0;
540}
541
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530542static int int_mi2s_get_idx_from_beid(int32_t id)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530543{
544 int idx = 0;
545
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530546 switch (id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530547 case MSM_BACKEND_DAI_INT0_MI2S_RX:
548 idx = INT0_MI2S;
549 break;
550 case MSM_BACKEND_DAI_INT2_MI2S_TX:
551 idx = INT2_MI2S;
552 break;
553 case MSM_BACKEND_DAI_INT3_MI2S_TX:
554 idx = INT3_MI2S;
555 break;
556 case MSM_BACKEND_DAI_INT4_MI2S_RX:
557 idx = INT4_MI2S;
558 break;
559 case MSM_BACKEND_DAI_INT5_MI2S_TX:
560 idx = INT5_MI2S;
561 break;
562 default:
563 idx = INT0_MI2S;
564 break;
565 }
566
567 return idx;
568}
569
570static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
571 struct snd_pcm_hw_params *params)
572{
573 struct snd_interval *rate = hw_param_interval(params,
574 SNDRV_PCM_HW_PARAM_RATE);
575
576 struct snd_interval *channels = hw_param_interval(params,
577 SNDRV_PCM_HW_PARAM_CHANNELS);
578
579 pr_debug("%s()\n", __func__);
580 rate->min = rate->max = 48000;
581 channels->min = channels->max = 2;
582
583 return 0;
584}
585
586static int int_mi2s_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
587 struct snd_pcm_hw_params *params)
588{
589 struct snd_soc_dai_link *dai_link = rtd->dai_link;
590 struct snd_interval *rate = hw_param_interval(params,
591 SNDRV_PCM_HW_PARAM_RATE);
592 struct snd_interval *channels = hw_param_interval(params,
593 SNDRV_PCM_HW_PARAM_CHANNELS);
594 int idx;
595
596 pr_debug("%s: format = %d, rate = %d\n",
597 __func__, params_format(params), params_rate(params));
598
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530599 switch (dai_link->id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530600 case MSM_BACKEND_DAI_INT0_MI2S_RX:
601 case MSM_BACKEND_DAI_INT2_MI2S_TX:
602 case MSM_BACKEND_DAI_INT3_MI2S_TX:
603 case MSM_BACKEND_DAI_INT4_MI2S_RX:
604 case MSM_BACKEND_DAI_INT5_MI2S_TX:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530605 idx = int_mi2s_get_idx_from_beid(dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530606 rate->min = rate->max = int_mi2s_cfg[idx].sample_rate;
607 channels->min = channels->max =
608 int_mi2s_cfg[idx].channels;
609 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
610 int_mi2s_cfg[idx].bit_format);
611 break;
612 default:
613 rate->min = rate->max = SAMPLING_RATE_48KHZ;
614 break;
615 }
616 return 0;
617}
618
619static int msm_btfm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
620 struct snd_pcm_hw_params *params)
621{
622 struct snd_soc_dai_link *dai_link = rtd->dai_link;
623 struct snd_interval *rate = hw_param_interval(params,
624 SNDRV_PCM_HW_PARAM_RATE);
625 struct snd_interval *channels = hw_param_interval(params,
626 SNDRV_PCM_HW_PARAM_CHANNELS);
627
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530628 switch (dai_link->id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530629 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
630 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
631 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
632 bt_fm_cfg[BT_SLIM7].bit_format);
633 rate->min = rate->max = bt_fm_cfg[BT_SLIM7].sample_rate;
634 channels->min = channels->max =
635 bt_fm_cfg[BT_SLIM7].channels;
636 break;
637
638 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
639 rate->min = rate->max = bt_fm_cfg[FM_SLIM8].sample_rate;
640 channels->min = channels->max =
641 bt_fm_cfg[FM_SLIM8].channels;
642 break;
643
644 default:
645 rate->min = rate->max = SAMPLING_RATE_48KHZ;
646 break;
647 }
648 return 0;
649}
650
651static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
652 struct snd_ctl_elem_value *ucontrol)
653{
654 ucontrol->value.integer.value[0] =
655 (int_mi2s_cfg[INT5_MI2S].channels/2 - 1);
656 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
657 ucontrol->value.integer.value[0]);
658 return 0;
659}
660
661static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
662 struct snd_ctl_elem_value *ucontrol)
663{
664 int_mi2s_cfg[INT5_MI2S].channels =
665 roundup_pow_of_two(ucontrol->value.integer.value[0] + 2);
666
667 pr_debug("%s: msm_vi_feed_tx_ch = %d\n",
668 __func__, int_mi2s_cfg[INT5_MI2S].channels);
669 return 1;
670}
671
672static int msm_int_enable_dig_cdc_clk(struct snd_soc_codec *codec,
673 int enable, bool dapm)
674{
675 int ret = 0;
676 struct msm_asoc_mach_data *pdata = NULL;
677 int clk_freq_in_hz;
678 bool int_mclk0_freq_chg = false;
679
680 pdata = snd_soc_card_get_drvdata(codec->component.card);
681 pr_debug("%s: enable %d mclk ref counter %d\n",
682 __func__, enable,
683 atomic_read(&pdata->int_mclk0_rsc_ref));
684 if (enable) {
685 if (int_mi2s_cfg[INT0_MI2S].sample_rate ==
686 SAMPLING_RATE_44P1KHZ) {
687 clk_freq_in_hz = NATIVE_MCLK_RATE;
688 pdata->native_clk_set = true;
689 } else {
690 clk_freq_in_hz = pdata->mclk_freq;
691 pdata->native_clk_set = false;
692 }
693
694 if (pdata->digital_cdc_core_clk.clk_freq_in_hz
695 != clk_freq_in_hz)
696 int_mclk0_freq_chg = true;
697 if (!atomic_read(&pdata->int_mclk0_rsc_ref) ||
698 int_mclk0_freq_chg) {
699 cancel_delayed_work_sync(
700 &pdata->disable_int_mclk0_work);
701 mutex_lock(&pdata->cdc_int_mclk0_mutex);
702 if (atomic_read(&pdata->int_mclk0_enabled) == false ||
703 int_mclk0_freq_chg) {
704 if (atomic_read(&pdata->int_mclk0_enabled)) {
705 pdata->digital_cdc_core_clk.enable = 0;
706 afe_set_lpass_clock_v2(
707 AFE_PORT_ID_INT0_MI2S_RX,
708 &pdata->digital_cdc_core_clk);
709 }
710 pdata->digital_cdc_core_clk.clk_freq_in_hz =
711 clk_freq_in_hz;
712 pdata->digital_cdc_core_clk.enable = 1;
713 ret = afe_set_lpass_clock_v2(
714 AFE_PORT_ID_INT0_MI2S_RX,
715 &pdata->digital_cdc_core_clk);
716 if (ret < 0) {
717 pr_err("%s: failed to enable CCLK\n",
718 __func__);
719 mutex_unlock(
720 &pdata->cdc_int_mclk0_mutex);
721 return ret;
722 }
723 pr_debug("enabled digital codec core clk\n");
724 atomic_set(&pdata->int_mclk0_enabled, true);
725 }
726 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
727 }
728 atomic_inc(&pdata->int_mclk0_rsc_ref);
729 } else {
730 cancel_delayed_work_sync(&pdata->disable_int_mclk0_work);
731 mutex_lock(&pdata->cdc_int_mclk0_mutex);
732 if (atomic_read(&pdata->int_mclk0_enabled) == true) {
733 pdata->digital_cdc_core_clk.enable = 0;
734 ret = afe_set_lpass_clock_v2(
735 AFE_PORT_ID_INT0_MI2S_RX,
736 &pdata->digital_cdc_core_clk);
737 if (ret < 0)
738 pr_err("%s: failed to disable CCLK\n",
739 __func__);
740 atomic_set(&pdata->int_mclk0_enabled, false);
741 }
742 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
743 }
744 return ret;
745}
746
747static int loopback_mclk_get(struct snd_kcontrol *kcontrol,
748 struct snd_ctl_elem_value *ucontrol)
749{
750 pr_debug("%s\n", __func__);
751 return 0;
752}
753
754static int loopback_mclk_put(struct snd_kcontrol *kcontrol,
755 struct snd_ctl_elem_value *ucontrol)
756{
757 int ret = -EINVAL;
758 struct msm_asoc_mach_data *pdata = NULL;
759 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
760
761 pdata = snd_soc_card_get_drvdata(codec->component.card);
762 pr_debug("%s: mclk_rsc_ref %d enable %ld\n",
763 __func__, atomic_read(&pdata->int_mclk0_rsc_ref),
764 ucontrol->value.integer.value[0]);
765 switch (ucontrol->value.integer.value[0]) {
766 case 1:
767 ret = msm_cdc_pinctrl_select_active_state(pdata->pdm_gpio_p);
768 if (ret) {
769 pr_err("%s: failed to enable the pri gpios: %d\n",
770 __func__, ret);
771 break;
772 }
773 mutex_lock(&pdata->cdc_int_mclk0_mutex);
774 if ((!atomic_read(&pdata->int_mclk0_rsc_ref)) &&
775 (!atomic_read(&pdata->int_mclk0_enabled))) {
776 pdata->digital_cdc_core_clk.enable = 1;
777 ret = afe_set_lpass_clock_v2(
778 AFE_PORT_ID_INT0_MI2S_RX,
779 &pdata->digital_cdc_core_clk);
780 if (ret < 0) {
781 pr_err("%s: failed to enable the MCLK: %d\n",
782 __func__, ret);
783 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
784 ret = msm_cdc_pinctrl_select_sleep_state(
785 pdata->pdm_gpio_p);
786 if (ret)
787 pr_err("%s: failed to disable the pri gpios: %d\n",
788 __func__, ret);
789 break;
790 }
791 atomic_set(&pdata->int_mclk0_enabled, true);
792 }
793 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
794 atomic_inc(&pdata->int_mclk0_rsc_ref);
795 msm_anlg_cdc_mclk_enable(codec, 1, true);
796 break;
797 case 0:
798 if (atomic_read(&pdata->int_mclk0_rsc_ref) <= 0)
799 break;
800 msm_anlg_cdc_mclk_enable(codec, 0, true);
801 mutex_lock(&pdata->cdc_int_mclk0_mutex);
802 if ((!atomic_dec_return(&pdata->int_mclk0_rsc_ref)) &&
803 (atomic_read(&pdata->int_mclk0_enabled))) {
804 pdata->digital_cdc_core_clk.enable = 0;
805 ret = afe_set_lpass_clock_v2(
806 AFE_PORT_ID_INT0_MI2S_RX,
807 &pdata->digital_cdc_core_clk);
808 if (ret < 0) {
809 pr_err("%s: failed to disable the CCLK: %d\n",
810 __func__, ret);
811 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
812 break;
813 }
814 atomic_set(&pdata->int_mclk0_enabled, false);
815 }
816 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
817 ret = msm_cdc_pinctrl_select_sleep_state(pdata->pdm_gpio_p);
818 if (ret)
819 pr_err("%s: failed to disable the pri gpios: %d\n",
820 __func__, ret);
821 break;
822 default:
823 pr_err("%s: Unexpected input value\n", __func__);
824 break;
825 }
826 return ret;
827}
828
829static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
830 struct snd_ctl_elem_value *ucontrol)
831{
832 /*
833 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
834 * when used for BT_SCO use case. Return either Rx or Tx sample rate
835 * value.
836 */
837 switch (bt_fm_cfg[BT_SLIM7].sample_rate) {
838 case SAMPLING_RATE_48KHZ:
839 ucontrol->value.integer.value[0] = 2;
840 break;
841 case SAMPLING_RATE_16KHZ:
842 ucontrol->value.integer.value[0] = 1;
843 break;
844 case SAMPLING_RATE_8KHZ:
845 default:
846 ucontrol->value.integer.value[0] = 0;
847 break;
848 }
849 pr_debug("%s: sample rate = %d", __func__,
850 bt_fm_cfg[BT_SLIM7].sample_rate);
851
852 return 0;
853}
854
855static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
856 struct snd_ctl_elem_value *ucontrol)
857{
858 switch (ucontrol->value.integer.value[0]) {
859 case 1:
860 bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_16KHZ;
861 break;
862 case 2:
863 bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_48KHZ;
864 break;
865 case 0:
866 default:
867 bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_8KHZ;
868 break;
869 }
870 pr_debug("%s: sample rates: slim7_rx = %d, value = %d\n",
871 __func__,
872 bt_fm_cfg[BT_SLIM7].sample_rate,
873 ucontrol->value.enumerated.item[0]);
874
875 return 0;
876}
877
878static const struct snd_kcontrol_new msm_snd_controls[] = {
879 SOC_ENUM_EXT("INT0_MI2S_RX Format", int0_mi2s_rx_format,
880 int_mi2s_bit_format_get, int_mi2s_bit_format_put),
881 SOC_ENUM_EXT("INT2_MI2S_TX Format", int2_mi2s_tx_format,
882 int_mi2s_bit_format_get, int_mi2s_bit_format_put),
883 SOC_ENUM_EXT("INT3_MI2S_TX Format", int3_mi2s_tx_format,
884 int_mi2s_bit_format_get, int_mi2s_bit_format_put),
885 SOC_ENUM_EXT("INT0_MI2S_RX SampleRate", int0_mi2s_rx_sample_rate,
886 int_mi2s_sample_rate_get,
887 int_mi2s_sample_rate_put),
888 SOC_ENUM_EXT("INT2_MI2S_TX SampleRate", int2_mi2s_tx_sample_rate,
889 int_mi2s_sample_rate_get,
890 int_mi2s_sample_rate_put),
891 SOC_ENUM_EXT("INT3_MI2S_TX SampleRate", int3_mi2s_tx_sample_rate,
892 int_mi2s_sample_rate_get,
893 int_mi2s_sample_rate_put),
894 SOC_ENUM_EXT("INT0_MI2S_RX Channels", int0_mi2s_rx_chs,
895 int_mi2s_ch_get, int_mi2s_ch_put),
896 SOC_ENUM_EXT("INT2_MI2S_TX Channels", int2_mi2s_tx_chs,
897 int_mi2s_ch_get, int_mi2s_ch_put),
898 SOC_ENUM_EXT("INT3_MI2S_TX Channels", int3_mi2s_tx_chs,
899 int_mi2s_ch_get, int_mi2s_ch_put),
900 SOC_ENUM_EXT("Loopback MCLK", loopback_mclk_en,
901 loopback_mclk_get, loopback_mclk_put),
902 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
903 msm_bt_sample_rate_get,
904 msm_bt_sample_rate_put),
905};
906
907static const struct snd_kcontrol_new msm_sdw_controls[] = {
908 SOC_ENUM_EXT("INT4_MI2S_RX Format", int4_mi2s_rx_format,
909 int_mi2s_bit_format_get, int_mi2s_bit_format_put),
910 SOC_ENUM_EXT("INT4_MI2S_RX SampleRate", int4_mi2s_rx_sample_rate,
911 int_mi2s_sample_rate_get,
912 int_mi2s_sample_rate_put),
913 SOC_ENUM_EXT("INT4_MI2S_RX Channels", int4_mi2s_rx_chs,
914 int_mi2s_ch_get, int_mi2s_ch_put),
915 SOC_ENUM_EXT("VI_FEED_TX Channels", int5_mi2s_tx_chs,
916 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
917};
918
919static int msm_dmic_event(struct snd_soc_dapm_widget *w,
920 struct snd_kcontrol *kcontrol, int event)
921{
922 struct msm_asoc_mach_data *pdata = NULL;
923 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
924 int ret = 0;
925
926 pdata = snd_soc_card_get_drvdata(codec->component.card);
927 pr_debug("%s: event = %d\n", __func__, event);
928 switch (event) {
929 case SND_SOC_DAPM_PRE_PMU:
930 ret = msm_cdc_pinctrl_select_active_state(pdata->dmic_gpio_p);
931 if (ret < 0) {
932 pr_err("%s: gpio set cannot be activated %sd",
933 __func__, "dmic_gpio");
934 return ret;
935 }
936 break;
937 case SND_SOC_DAPM_POST_PMD:
938 ret = msm_cdc_pinctrl_select_sleep_state(pdata->dmic_gpio_p);
939 if (ret < 0) {
940 pr_err("%s: gpio set cannot be de-activated %sd",
941 __func__, "dmic_gpio");
942 return ret;
943 }
944 break;
945 default:
946 pr_err("%s: invalid DAPM event %d\n", __func__, event);
947 return -EINVAL;
948 }
949 return 0;
950}
951
952static int msm_int_mclk0_event(struct snd_soc_dapm_widget *w,
953 struct snd_kcontrol *kcontrol, int event)
954{
955 struct msm_asoc_mach_data *pdata = NULL;
956 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
957 int ret = 0;
958
959 pdata = snd_soc_card_get_drvdata(codec->component.card);
960 pr_debug("%s: event = %d\n", __func__, event);
961 switch (event) {
962 case SND_SOC_DAPM_POST_PMD:
963 pr_debug("%s: mclk_res_ref = %d\n",
964 __func__, atomic_read(&pdata->int_mclk0_rsc_ref));
965 ret = msm_cdc_pinctrl_select_sleep_state(pdata->pdm_gpio_p);
966 if (ret < 0) {
967 pr_err("%s: gpio set cannot be de-activated %sd",
968 __func__, "int_pdm");
969 return ret;
970 }
971 if (atomic_read(&pdata->int_mclk0_rsc_ref) == 0) {
972 pr_debug("%s: disabling MCLK\n", __func__);
973 /* disable the codec mclk config*/
974 msm_anlg_cdc_mclk_enable(codec, 0, true);
975 msm_int_enable_dig_cdc_clk(codec, 0, true);
976 }
977 break;
978 default:
979 pr_err("%s: invalid DAPM event %d\n", __func__, event);
980 return -EINVAL;
981 }
982 return 0;
983}
984
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530985static int int_mi2s_get_port_id(int id)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530986{
987 int afe_port_id;
988
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530989 switch (id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530990 case MSM_BACKEND_DAI_INT0_MI2S_RX:
991 afe_port_id = AFE_PORT_ID_INT0_MI2S_RX;
992 break;
993 case MSM_BACKEND_DAI_INT2_MI2S_TX:
994 afe_port_id = AFE_PORT_ID_INT2_MI2S_TX;
995 break;
996 case MSM_BACKEND_DAI_INT3_MI2S_TX:
997 afe_port_id = AFE_PORT_ID_INT3_MI2S_TX;
998 break;
999 case MSM_BACKEND_DAI_INT4_MI2S_RX:
1000 afe_port_id = AFE_PORT_ID_INT4_MI2S_RX;
1001 break;
1002 case MSM_BACKEND_DAI_INT5_MI2S_TX:
1003 afe_port_id = AFE_PORT_ID_INT5_MI2S_TX;
1004 break;
1005 default:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301006 pr_err("%s: Invalid id: %d\n", __func__, id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301007 afe_port_id = -EINVAL;
1008 }
1009
1010 return afe_port_id;
1011}
1012
1013static int int_mi2s_get_index(int port_id)
1014{
1015 int index;
1016
1017 switch (port_id) {
1018 case AFE_PORT_ID_INT0_MI2S_RX:
1019 index = INT0_MI2S;
1020 break;
1021 case AFE_PORT_ID_INT2_MI2S_TX:
1022 index = INT2_MI2S;
1023 break;
1024 case AFE_PORT_ID_INT3_MI2S_TX:
1025 index = INT3_MI2S;
1026 break;
1027 case AFE_PORT_ID_INT4_MI2S_RX:
1028 index = INT4_MI2S;
1029 break;
1030 case AFE_PORT_ID_INT5_MI2S_TX:
1031 index = INT5_MI2S;
1032 break;
1033 default:
1034 pr_err("%s: Invalid port_id: %d\n", __func__, port_id);
1035 index = -EINVAL;
1036 }
1037
1038 return index;
1039}
1040
1041static u32 get_int_mi2s_bits_per_sample(u32 bit_format)
1042{
1043 u32 bit_per_sample;
1044
1045 switch (bit_format) {
1046 case SNDRV_PCM_FORMAT_S24_3LE:
1047 case SNDRV_PCM_FORMAT_S24_LE:
1048 bit_per_sample = 32;
1049 break;
1050 case SNDRV_PCM_FORMAT_S16_LE:
1051 default:
1052 bit_per_sample = 16;
1053 break;
1054 }
1055
1056 return bit_per_sample;
1057}
1058
1059static void update_int_mi2s_clk_val(int idx, int stream)
1060{
1061 u32 bit_per_sample;
1062
1063 bit_per_sample =
1064 get_int_mi2s_bits_per_sample(int_mi2s_cfg[idx].bit_format);
1065 int_mi2s_clk[idx].clk_freq_in_hz =
1066 (int_mi2s_cfg[idx].sample_rate * 2 * bit_per_sample);
1067}
1068
1069static int int_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
1070{
1071 int ret = 0;
1072 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1073 int port_id = 0;
1074 int index;
1075
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301076 port_id = int_mi2s_get_port_id(rtd->dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301077 if (port_id < 0) {
1078 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
1079 ret = port_id;
1080 goto done;
1081 }
1082 index = int_mi2s_get_index(port_id);
1083 if (index < 0) {
1084 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
1085 ret = port_id;
1086 goto done;
1087 }
1088 if (enable) {
1089 update_int_mi2s_clk_val(index, substream->stream);
1090 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
1091 int_mi2s_clk[index].clk_freq_in_hz);
1092 }
1093
1094 int_mi2s_clk[index].enable = enable;
1095 ret = afe_set_lpass_clock_v2(port_id,
1096 &int_mi2s_clk[index]);
1097 if (ret < 0) {
1098 dev_err(rtd->card->dev,
1099 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
1100 __func__, port_id, ret);
1101 goto done;
1102 }
1103
1104done:
1105 return ret;
1106}
1107
1108static int msm_sdw_mi2s_snd_startup(struct snd_pcm_substream *substream)
1109{
1110 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1111 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1112 int ret = 0;
1113
1114 pr_debug("%s(): substream = %s stream = %d\n", __func__,
1115 substream->name, substream->stream);
1116
1117 ret = int_mi2s_set_sclk(substream, true);
1118 if (ret < 0) {
1119 pr_err("%s: failed to enable sclk %d\n",
1120 __func__, ret);
1121 return ret;
1122 }
1123 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
1124 if (ret < 0)
1125 pr_err("%s: set fmt cpu dai failed; ret=%d\n", __func__, ret);
1126
1127 return ret;
1128}
1129
1130static void msm_sdw_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
1131{
1132 int ret;
1133
1134 pr_debug("%s(): substream = %s stream = %d\n", __func__,
1135 substream->name, substream->stream);
1136
1137 ret = int_mi2s_set_sclk(substream, false);
1138 if (ret < 0)
1139 pr_err("%s:clock disable failed; ret=%d\n", __func__,
1140 ret);
1141}
1142
1143static int msm_int_mi2s_snd_startup(struct snd_pcm_substream *substream)
1144{
1145 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1146 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1147 struct snd_soc_codec *codec = rtd->codec_dais[ANA_CDC]->codec;
1148 int ret = 0;
1149 struct msm_asoc_mach_data *pdata = NULL;
1150
1151 pdata = snd_soc_card_get_drvdata(codec->component.card);
1152 pr_debug("%s(): substream = %s stream = %d\n", __func__,
1153 substream->name, substream->stream);
1154
1155 ret = int_mi2s_set_sclk(substream, true);
1156 if (ret < 0) {
1157 pr_err("%s: failed to enable sclk %d\n",
1158 __func__, ret);
1159 return ret;
1160 }
1161 ret = msm_int_enable_dig_cdc_clk(codec, 1, true);
1162 if (ret < 0) {
1163 pr_err("failed to enable mclk\n");
1164 return ret;
1165 }
1166 /* Enable the codec mclk config */
1167 ret = msm_cdc_pinctrl_select_active_state(pdata->pdm_gpio_p);
1168 if (ret < 0) {
1169 pr_err("%s: gpio set cannot be activated %s\n",
1170 __func__, "int_pdm");
1171 return ret;
1172 }
1173 msm_anlg_cdc_mclk_enable(codec, 1, true);
1174 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
1175 if (ret < 0)
1176 pr_err("%s: set fmt cpu dai failed; ret=%d\n", __func__, ret);
1177
1178 return ret;
1179}
1180
1181static void msm_int_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
1182{
1183 int ret;
1184 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1185 struct snd_soc_card *card = rtd->card;
1186 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
1187
1188 pr_debug("%s(): substream = %s stream = %d\n", __func__,
1189 substream->name, substream->stream);
1190
1191 ret = int_mi2s_set_sclk(substream, false);
1192 if (ret < 0)
1193 pr_err("%s:clock disable failed; ret=%d\n", __func__,
1194 ret);
1195 if (atomic_read(&pdata->int_mclk0_rsc_ref) > 0) {
1196 atomic_dec(&pdata->int_mclk0_rsc_ref);
1197 pr_debug("%s: decrementing mclk_res_ref %d\n",
1198 __func__,
1199 atomic_read(&pdata->int_mclk0_rsc_ref));
1200 }
1201}
1202
1203static void *def_msm_int_wcd_mbhc_cal(void)
1204{
1205 void *msm_int_wcd_cal;
1206 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
1207 u16 *btn_low, *btn_high;
1208
1209 msm_int_wcd_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
1210 WCD_MBHC_DEF_RLOADS), GFP_KERNEL);
1211 if (!msm_int_wcd_cal)
1212 return NULL;
1213
1214#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(msm_int_wcd_cal)->X) = (Y))
1215 S(v_hs_max, 1500);
1216#undef S
1217#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(msm_int_wcd_cal)->X) = (Y))
1218 S(num_btn, WCD_MBHC_DEF_BUTTONS);
1219#undef S
1220
1221
1222 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(msm_int_wcd_cal);
1223 btn_low = btn_cfg->_v_btn_low;
1224 btn_high = ((void *)&btn_cfg->_v_btn_low) +
1225 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
1226
1227 /*
1228 * In SW we are maintaining two sets of threshold register
1229 * one for current source and another for Micbias.
1230 * all btn_low corresponds to threshold for current source
1231 * all bt_high corresponds to threshold for Micbias
1232 * Below thresholds are based on following resistances
1233 * 0-70 == Button 0
1234 * 110-180 == Button 1
1235 * 210-290 == Button 2
1236 * 360-680 == Button 3
1237 */
1238 btn_low[0] = 75;
1239 btn_high[0] = 75;
1240 btn_low[1] = 150;
1241 btn_high[1] = 150;
1242 btn_low[2] = 225;
1243 btn_high[2] = 225;
1244 btn_low[3] = 450;
1245 btn_high[3] = 450;
1246 btn_low[4] = 500;
1247 btn_high[4] = 500;
1248
1249 return msm_int_wcd_cal;
1250}
1251
1252static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
1253{
1254 struct snd_soc_codec *dig_cdc = rtd->codec_dais[DIG_CDC]->codec;
1255 struct snd_soc_codec *ana_cdc = rtd->codec_dais[ANA_CDC]->codec;
1256 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(ana_cdc);
1257 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1258 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(rtd->card);
1259 struct snd_card *card;
1260 int ret = -ENOMEM;
1261
1262 pr_debug("%s(),dev_name%s\n", __func__, dev_name(cpu_dai->dev));
1263
1264 ret = snd_soc_add_codec_controls(ana_cdc, msm_snd_controls,
1265 ARRAY_SIZE(msm_snd_controls));
1266 if (ret < 0) {
1267 pr_err("%s: add_codec_controls failed: %d\n",
1268 __func__, ret);
1269 return ret;
1270 }
1271 ret = snd_soc_add_codec_controls(ana_cdc, msm_common_snd_controls,
1272 msm_common_snd_controls_size());
1273 if (ret < 0) {
1274 pr_err("%s: add common snd controls failed: %d\n",
1275 __func__, ret);
1276 return ret;
1277 }
1278
1279 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
1280 ARRAY_SIZE(msm_int_dapm_widgets));
1281
1282 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
1283 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
1284 snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic");
1285 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
1286 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
1287
1288 snd_soc_dapm_ignore_suspend(dapm, "EAR");
1289 snd_soc_dapm_ignore_suspend(dapm, "HEADPHONE");
1290 snd_soc_dapm_ignore_suspend(dapm, "SPK_OUT");
1291 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
1292 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
1293 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
1294 snd_soc_dapm_ignore_suspend(dapm, "DMIC1");
1295 snd_soc_dapm_ignore_suspend(dapm, "DMIC2");
1296 snd_soc_dapm_ignore_suspend(dapm, "DMIC3");
1297 snd_soc_dapm_ignore_suspend(dapm, "DMIC4");
1298
1299 snd_soc_dapm_sync(dapm);
1300
1301 msm_anlg_cdc_spk_ext_pa_cb(enable_spk_ext_pa, ana_cdc);
1302 msm_dig_cdc_hph_comp_cb(msm_config_hph_compander_gpio, dig_cdc);
1303
1304 card = rtd->card->snd_card;
1305 if (!codec_root)
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301306 codec_root = snd_info_create_subdir(card->module, "codecs",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301307 card->proc_root);
1308 if (!codec_root) {
1309 pr_debug("%s: Cannot create codecs module entry\n",
1310 __func__);
1311 goto done;
1312 }
1313 pdata->codec_root = codec_root;
1314 msm_dig_codec_info_create_codec_entry(codec_root, dig_cdc);
1315 msm_anlg_codec_info_create_codec_entry(codec_root, ana_cdc);
1316done:
Laxminath Kasam38070be2017-08-17 18:21:59 +05301317 msm_set_codec_reg_done(true);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301318 return 0;
1319}
1320
1321static int msm_sdw_audrx_init(struct snd_soc_pcm_runtime *rtd)
1322{
1323 struct snd_soc_codec *codec = rtd->codec;
1324 struct snd_soc_dapm_context *dapm =
1325 snd_soc_codec_get_dapm(codec);
1326 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(rtd->card);
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301327 struct snd_soc_component *aux_comp;
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301328 struct snd_card *card;
1329
1330 snd_soc_add_codec_controls(codec, msm_sdw_controls,
1331 ARRAY_SIZE(msm_sdw_controls));
1332
1333 snd_soc_dapm_ignore_suspend(dapm, "AIF1_SDW Playback");
1334 snd_soc_dapm_ignore_suspend(dapm, "VIfeed_SDW");
1335 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
1336 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
1337 snd_soc_dapm_ignore_suspend(dapm, "AIF1_SDW VI");
1338 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_SDW");
1339
1340 snd_soc_dapm_sync(dapm);
1341
1342 /*
1343 * Send speaker configuration only for WSA8810.
1344 * Default configuration is for WSA8815.
1345 */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301346 pr_debug("%s: Number of aux devices: %d\n",
1347 __func__, rtd->card->num_aux_devs);
1348 if (rtd->card->num_aux_devs &&
1349 !list_empty(&rtd->card->aux_comp_list)) {
1350 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
1351 struct snd_soc_component, list_aux);
1352 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
1353 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301354 msm_sdw_set_spkr_mode(rtd->codec, SPKR_MODE_1);
1355 msm_sdw_set_spkr_gain_offset(rtd->codec,
1356 RX_GAIN_OFFSET_M1P5_DB);
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301357 }
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301358 }
1359 card = rtd->card->snd_card;
1360 if (!codec_root)
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301361 codec_root = snd_info_create_subdir(card->module, "codecs",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301362 card->proc_root);
1363 if (!codec_root) {
1364 pr_debug("%s: Cannot create codecs module entry\n",
1365 __func__);
1366 goto done;
1367 }
1368 pdata->codec_root = codec_root;
1369 msm_sdw_codec_info_create_codec_entry(codec_root, codec);
1370done:
1371 return 0;
1372}
1373
1374static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
1375{
1376 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
1377 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
1378 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1379
1380 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
1381 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
1382}
1383
1384static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
1385 struct snd_pcm_hw_params *params)
1386{
1387 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1388 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1389 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1390 struct snd_soc_dai_link *dai_link = rtd->dai_link;
1391 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
1392 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
1393 int ret;
1394
1395 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
1396 codec_dai->name, codec_dai->id);
1397 ret = snd_soc_dai_get_channel_map(codec_dai,
1398 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
1399 if (ret) {
1400 dev_err(rtd->dev,
1401 "%s: failed to get BTFM codec chan map\n, err:%d\n",
1402 __func__, ret);
1403 goto exit;
1404 }
1405
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301406 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) id %d\n",
1407 __func__, tx_ch_cnt, dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301408
1409 ret = snd_soc_dai_set_channel_map(cpu_dai,
1410 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
1411 if (ret)
1412 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
1413 __func__, ret);
1414
1415exit:
1416 return ret;
1417}
1418
1419static unsigned int tdm_param_set_slot_mask(u16 port_id, int slot_width,
1420 int slots)
1421{
1422 unsigned int slot_mask = 0;
1423 int i, j;
1424 unsigned int *slot_offset;
1425
1426 for (i = TDM_0; i < TDM_PORT_MAX; i++) {
1427 slot_offset = tdm_slot_offset[i];
1428
1429 for (j = 0; j < TDM_SLOT_OFFSET_MAX; j++) {
1430 if (slot_offset[j] != AFE_SLOT_MAPPING_OFFSET_INVALID)
1431 slot_mask |=
1432 (1 << ((slot_offset[j] * 8) / slot_width));
1433 else
1434 break;
1435 }
1436 }
1437
1438 return slot_mask;
1439}
1440
1441static int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream,
1442 struct snd_pcm_hw_params *params)
1443{
1444 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1445 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1446 int ret = 0;
1447 int channels, slot_width, slots;
1448 unsigned int slot_mask;
1449 unsigned int *slot_offset;
1450 int offset_channels = 0;
1451 int i;
1452
1453 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
1454
1455 channels = params_channels(params);
1456 switch (channels) {
1457 case 1:
1458 case 2:
1459 case 3:
1460 case 4:
1461 case 5:
1462 case 6:
1463 case 7:
1464 case 8:
1465 switch (params_format(params)) {
1466 case SNDRV_PCM_FORMAT_S32_LE:
1467 case SNDRV_PCM_FORMAT_S24_LE:
1468 case SNDRV_PCM_FORMAT_S16_LE:
1469 /*
1470 * up to 8 channels HW config should
1471 * use 32 bit slot width for max support of
1472 * stream bit width. (slot_width > bit_width)
1473 */
1474 slot_width = 32;
1475 break;
1476 default:
1477 pr_err("%s: invalid param format 0x%x\n",
1478 __func__, params_format(params));
1479 return -EINVAL;
1480 }
1481 slots = 8;
1482 slot_mask = tdm_param_set_slot_mask(cpu_dai->id,
1483 slot_width,
1484 slots);
1485 if (!slot_mask) {
1486 pr_err("%s: invalid slot_mask 0x%x\n",
1487 __func__, slot_mask);
1488 return -EINVAL;
1489 }
1490 break;
1491 default:
1492 pr_err("%s: invalid param channels %d\n",
1493 __func__, channels);
1494 return -EINVAL;
1495 }
1496 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
1497 switch (cpu_dai->id) {
1498 case AFE_PORT_ID_PRIMARY_TDM_RX:
1499 case AFE_PORT_ID_SECONDARY_TDM_RX:
1500 case AFE_PORT_ID_TERTIARY_TDM_RX:
1501 case AFE_PORT_ID_QUATERNARY_TDM_RX:
Rohit Kumard1754482017-09-10 22:57:39 +05301502 case AFE_PORT_ID_QUINARY_TDM_RX:
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301503 case AFE_PORT_ID_PRIMARY_TDM_TX:
1504 case AFE_PORT_ID_SECONDARY_TDM_TX:
1505 case AFE_PORT_ID_TERTIARY_TDM_TX:
1506 case AFE_PORT_ID_QUATERNARY_TDM_TX:
Rohit Kumard1754482017-09-10 22:57:39 +05301507 case AFE_PORT_ID_QUINARY_TDM_TX:
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301508 slot_offset = tdm_slot_offset[TDM_0];
1509 break;
1510 default:
1511 pr_err("%s: dai id 0x%x not supported\n",
1512 __func__, cpu_dai->id);
1513 return -EINVAL;
1514 }
1515
1516 for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
1517 if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)
1518 offset_channels++;
1519 else
1520 break;
1521 }
1522
1523 if (offset_channels == 0) {
1524 pr_err("%s: slot offset not supported, offset_channels %d\n",
1525 __func__, offset_channels);
1526 return -EINVAL;
1527 }
1528
1529 if (channels > offset_channels) {
1530 pr_err("%s: channels %d exceed offset_channels %d\n",
1531 __func__, channels, offset_channels);
1532 return -EINVAL;
1533 }
1534
1535 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1536 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
1537 slots, slot_width);
1538 if (ret < 0) {
1539 pr_err("%s: failed to set tdm slot, err:%d\n",
1540 __func__, ret);
1541 goto end;
1542 }
1543
1544 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,
1545 channels, slot_offset);
1546 if (ret < 0) {
1547 pr_err("%s: failed to set channel map, err:%d\n",
1548 __func__, ret);
1549 goto end;
1550 }
1551 } else {
1552 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
1553 slots, slot_width);
1554 if (ret < 0) {
1555 pr_err("%s: failed to set tdm slot, err:%d\n",
1556 __func__, ret);
1557 goto end;
1558 }
1559
1560 ret = snd_soc_dai_set_channel_map(cpu_dai, channels,
1561 slot_offset, 0, NULL);
1562 if (ret < 0) {
1563 pr_err("%s: failed to set channel map, err:%d\n",
1564 __func__, ret);
1565 goto end;
1566 }
1567 }
1568end:
1569 return ret;
1570}
1571
1572static int msm_snd_card_late_probe(struct snd_soc_card *card)
1573{
1574 const char *be_dl_name = LPASS_BE_INT0_MI2S_RX;
1575 struct snd_soc_codec *ana_cdc;
1576 struct snd_soc_pcm_runtime *rtd;
1577 int ret = 0;
1578
1579 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
1580 if (!rtd) {
1581 dev_err(card->dev,
1582 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
1583 __func__, be_dl_name);
1584 return -EINVAL;
1585 }
1586
1587 ana_cdc = rtd->codec_dais[ANA_CDC]->codec;
1588 mbhc_cfg_ptr->calibration = def_msm_int_wcd_mbhc_cal();
1589 if (!mbhc_cfg_ptr->calibration)
1590 return -ENOMEM;
1591
1592 ret = msm_anlg_cdc_hs_detect(ana_cdc, mbhc_cfg_ptr);
1593 if (ret) {
1594 dev_err(card->dev,
1595 "%s: msm_anlg_cdc_hs_detect failed\n", __func__);
1596 kfree(mbhc_cfg_ptr->calibration);
1597 }
1598
1599 return ret;
1600}
1601
1602static struct snd_soc_ops msm_tdm_be_ops = {
1603 .hw_params = msm_tdm_snd_hw_params
1604};
1605
1606static struct snd_soc_ops msm_wcn_ops = {
1607 .hw_params = msm_wcn_hw_params,
1608};
1609
1610static struct snd_soc_ops msm_mi2s_be_ops = {
1611 .startup = msm_mi2s_snd_startup,
1612 .shutdown = msm_mi2s_snd_shutdown,
1613};
1614
1615static struct snd_soc_ops msm_aux_pcm_be_ops = {
1616 .startup = msm_aux_pcm_snd_startup,
1617 .shutdown = msm_aux_pcm_snd_shutdown,
1618};
1619
1620static struct snd_soc_ops msm_int_mi2s_be_ops = {
1621 .startup = msm_int_mi2s_snd_startup,
1622 .shutdown = msm_int_mi2s_snd_shutdown,
1623};
1624
1625static struct snd_soc_ops msm_sdw_mi2s_be_ops = {
1626 .startup = msm_sdw_mi2s_snd_startup,
1627 .shutdown = msm_sdw_mi2s_snd_shutdown,
1628};
1629
1630struct snd_soc_dai_link_component dlc_rx1[] = {
1631 {
1632 .of_node = NULL,
1633 .dai_name = "msm_dig_cdc_dai_rx1",
1634 },
1635 {
1636 .of_node = NULL,
1637 .dai_name = "msm_anlg_cdc_i2s_rx1",
1638 },
1639};
1640
1641struct snd_soc_dai_link_component dlc_tx1[] = {
1642 {
1643 .of_node = NULL,
1644 .dai_name = "msm_dig_cdc_dai_tx1",
1645 },
1646 {
1647 .of_node = NULL,
1648 .dai_name = "msm_anlg_cdc_i2s_tx1",
1649 },
1650};
1651
1652struct snd_soc_dai_link_component dlc_tx2[] = {
1653 {
1654 .of_node = NULL,
1655 .dai_name = "msm_dig_cdc_dai_tx2",
1656 },
1657 {
1658 .of_node = NULL,
1659 .dai_name = "msm_anlg_cdc_i2s_tx2",
1660 },
1661};
1662
1663/* Digital audio interface glue - connects codec <---> CPU */
1664static struct snd_soc_dai_link msm_int_dai[] = {
1665 /* FrontEnd DAI Links */
1666 {/* hw:x,0 */
1667 .name = MSM_DAILINK_NAME(Media1),
1668 .stream_name = "MultiMedia1",
1669 .cpu_dai_name = "MultiMedia1",
1670 .platform_name = "msm-pcm-dsp.0",
1671 .dynamic = 1,
1672 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1673 SND_SOC_DPCM_TRIGGER_POST},
1674 .codec_dai_name = "snd-soc-dummy-dai",
1675 .codec_name = "snd-soc-dummy",
1676 .ignore_suspend = 1,
1677 .dpcm_playback = 1,
1678 .dpcm_capture = 1,
1679 /* this dai link has playback support */
1680 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301681 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301682 },
1683 {/* hw:x,1 */
1684 .name = MSM_DAILINK_NAME(Media2),
1685 .stream_name = "MultiMedia2",
1686 .cpu_dai_name = "MultiMedia2",
1687 .platform_name = "msm-pcm-dsp.0",
1688 .dynamic = 1,
1689 .dpcm_playback = 1,
1690 .dpcm_capture = 1,
1691 .codec_dai_name = "snd-soc-dummy-dai",
1692 .codec_name = "snd-soc-dummy",
1693 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1694 SND_SOC_DPCM_TRIGGER_POST},
1695 .ignore_suspend = 1,
1696 /* this dai link has playback support */
1697 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301698 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301699 },
1700 {/* hw:x,2 */
1701 .name = "VoiceMMode1",
1702 .stream_name = "VoiceMMode1",
1703 .cpu_dai_name = "VoiceMMode1",
1704 .platform_name = "msm-pcm-voice",
1705 .dynamic = 1,
1706 .dpcm_capture = 1,
1707 .dpcm_playback = 1,
1708 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1709 SND_SOC_DPCM_TRIGGER_POST},
1710 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1711 .ignore_suspend = 1,
1712 .ignore_pmdown_time = 1,
1713 .codec_dai_name = "snd-soc-dummy-dai",
1714 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301715 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301716 },
1717 {/* hw:x,3 */
1718 .name = "MSM VoIP",
1719 .stream_name = "VoIP",
1720 .cpu_dai_name = "VoIP",
1721 .platform_name = "msm-voip-dsp",
1722 .dynamic = 1,
1723 .dpcm_playback = 1,
1724 .dpcm_capture = 1,
1725 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1726 SND_SOC_DPCM_TRIGGER_POST},
1727 .codec_dai_name = "snd-soc-dummy-dai",
1728 .codec_name = "snd-soc-dummy",
1729 .ignore_suspend = 1,
1730 /* this dai link has playback support */
1731 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301732 .id = MSM_FRONTEND_DAI_VOIP,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301733 },
1734 {/* hw:x,4 */
1735 .name = MSM_DAILINK_NAME(ULL),
1736 .stream_name = "ULL",
1737 .cpu_dai_name = "MultiMedia3",
1738 .platform_name = "msm-pcm-dsp.2",
1739 .dynamic = 1,
1740 .dpcm_playback = 1,
1741 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1742 SND_SOC_DPCM_TRIGGER_POST},
1743 .codec_dai_name = "snd-soc-dummy-dai",
1744 .codec_name = "snd-soc-dummy",
1745 .ignore_suspend = 1,
1746 /* this dai link has playback support */
1747 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301748 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301749 },
1750 /* Hostless PCM purpose */
1751 {/* hw:x,5 */
1752 .name = "INT4 MI2S_RX Hostless",
1753 .stream_name = "INT4 MI2S_RX Hostless",
1754 .cpu_dai_name = "INT4_MI2S_RX_HOSTLESS",
1755 .platform_name = "msm-pcm-hostless",
1756 .dynamic = 1,
1757 .dpcm_playback = 1,
1758 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1759 SND_SOC_DPCM_TRIGGER_POST},
1760 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1761 .ignore_suspend = 1,
1762 /* this dailink has playback support */
1763 .ignore_pmdown_time = 1,
1764 /* This dainlink has MI2S support */
1765 .codec_dai_name = "snd-soc-dummy-dai",
1766 .codec_name = "snd-soc-dummy",
1767 },
1768 {/* hw:x,6 */
1769 .name = "MSM AFE-PCM RX",
1770 .stream_name = "AFE-PROXY RX",
1771 .cpu_dai_name = "msm-dai-q6-dev.241",
1772 .codec_name = "msm-stub-codec.1",
1773 .codec_dai_name = "msm-stub-rx",
1774 .platform_name = "msm-pcm-afe",
1775 .ignore_suspend = 1,
1776 /* this dai link has playback support */
1777 .ignore_pmdown_time = 1,
1778 },
1779 {/* hw:x,7 */
1780 .name = "MSM AFE-PCM TX",
1781 .stream_name = "AFE-PROXY TX",
1782 .cpu_dai_name = "msm-dai-q6-dev.240",
1783 .codec_name = "msm-stub-codec.1",
1784 .codec_dai_name = "msm-stub-tx",
1785 .platform_name = "msm-pcm-afe",
1786 .ignore_suspend = 1,
1787 },
1788 {/* hw:x,8 */
1789 .name = MSM_DAILINK_NAME(Compress1),
1790 .stream_name = "Compress1",
1791 .cpu_dai_name = "MultiMedia4",
1792 .platform_name = "msm-compress-dsp",
1793 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
1794 .dynamic = 1,
1795 .dpcm_capture = 1,
1796 .dpcm_playback = 1,
1797 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1798 SND_SOC_DPCM_TRIGGER_POST},
1799 .codec_dai_name = "snd-soc-dummy-dai",
1800 .codec_name = "snd-soc-dummy",
1801 .ignore_suspend = 1,
1802 .ignore_pmdown_time = 1,
1803 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301804 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301805 },
1806 {/* hw:x,9*/
1807 .name = "AUXPCM Hostless",
1808 .stream_name = "AUXPCM Hostless",
1809 .cpu_dai_name = "AUXPCM_HOSTLESS",
1810 .platform_name = "msm-pcm-hostless",
1811 .dynamic = 1,
1812 .dpcm_capture = 1,
1813 .dpcm_playback = 1,
1814 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1815 SND_SOC_DPCM_TRIGGER_POST},
1816 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1817 .ignore_suspend = 1,
1818 /* this dai link has playback support */
1819 .ignore_pmdown_time = 1,
1820 .codec_dai_name = "snd-soc-dummy-dai",
1821 .codec_name = "snd-soc-dummy",
1822 },
1823 {/* hw:x,10 */
1824 .name = "SLIMBUS_1 Hostless",
1825 .stream_name = "SLIMBUS_1 Hostless",
1826 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
1827 .platform_name = "msm-pcm-hostless",
1828 .dynamic = 1,
1829 .dpcm_capture = 1,
1830 .dpcm_playback = 1,
1831 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1832 SND_SOC_DPCM_TRIGGER_POST},
1833 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1834 .ignore_suspend = 1,
1835 .ignore_pmdown_time = 1, /* dai link has playback support */
1836 .codec_dai_name = "snd-soc-dummy-dai",
1837 .codec_name = "snd-soc-dummy",
1838 },
1839 {/* hw:x,11 */
1840 .name = "INT3 MI2S_TX Hostless",
1841 .stream_name = "INT3 MI2S_TX Hostless",
1842 .cpu_dai_name = "INT3_MI2S_TX_HOSTLESS",
1843 .platform_name = "msm-pcm-hostless",
1844 .dynamic = 1,
1845 .dpcm_capture = 1,
1846 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1847 SND_SOC_DPCM_TRIGGER_POST},
1848 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1849 .ignore_suspend = 1,
1850 .ignore_pmdown_time = 1,
1851 .codec_dai_name = "snd-soc-dummy-dai",
1852 .codec_name = "snd-soc-dummy",
1853 },
1854 {/* hw:x,12 */
1855 .name = "SLIMBUS_7 Hostless",
1856 .stream_name = "SLIMBUS_7 Hostless",
1857 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
1858 .platform_name = "msm-pcm-hostless",
1859 .dynamic = 1,
1860 .dpcm_capture = 1,
1861 .dpcm_playback = 1,
1862 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1863 SND_SOC_DPCM_TRIGGER_POST},
1864 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1865 .ignore_suspend = 1,
1866 .ignore_pmdown_time = 1, /* dai link has playback support */
1867 .codec_dai_name = "snd-soc-dummy-dai",
1868 .codec_name = "snd-soc-dummy",
1869 },
1870 {/* hw:x,13 */
1871 .name = MSM_DAILINK_NAME(LowLatency),
1872 .stream_name = "MultiMedia5",
1873 .cpu_dai_name = "MultiMedia5",
1874 .platform_name = "msm-pcm-dsp.1",
1875 .dynamic = 1,
1876 .dpcm_capture = 1,
1877 .dpcm_playback = 1,
1878 .codec_dai_name = "snd-soc-dummy-dai",
1879 .codec_name = "snd-soc-dummy",
1880 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1881 SND_SOC_DPCM_TRIGGER_POST},
1882 .ignore_suspend = 1,
1883 /* this dai link has playback support */
1884 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301885 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301886 },
1887 /* LSM FE */
1888 {/* hw:x,14 */
1889 .name = "Listen 1 Audio Service",
1890 .stream_name = "Listen 1 Audio Service",
1891 .cpu_dai_name = "LSM1",
1892 .platform_name = "msm-lsm-client",
1893 .dynamic = 1,
1894 .dpcm_capture = 1,
1895 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1896 SND_SOC_DPCM_TRIGGER_POST },
1897 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1898 .ignore_suspend = 1,
1899 .ignore_pmdown_time = 1,
1900 .codec_dai_name = "snd-soc-dummy-dai",
1901 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301902 .id = MSM_FRONTEND_DAI_LSM1,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301903 },
1904 {/* hw:x,15 */
1905 .name = MSM_DAILINK_NAME(Compress2),
1906 .stream_name = "Compress2",
1907 .cpu_dai_name = "MultiMedia7",
1908 .platform_name = "msm-compress-dsp",
1909 .dynamic = 1,
1910 .dpcm_capture = 1,
1911 .dpcm_playback = 1,
1912 .codec_dai_name = "snd-soc-dummy-dai",
1913 .codec_name = "snd-soc-dummy",
1914 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1915 SND_SOC_DPCM_TRIGGER_POST},
1916 .ignore_suspend = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301917 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301918 },
1919 {/* hw:x,16 */
Laxminath Kasam38070be2017-08-17 18:21:59 +05301920 .name = MSM_DAILINK_NAME(MultiMedia10),
1921 .stream_name = "MultiMedia10",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301922 .cpu_dai_name = "MultiMedia10",
Laxminath Kasam38070be2017-08-17 18:21:59 +05301923 .platform_name = "msm-pcm-dsp.1",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301924 .dynamic = 1,
1925 .dpcm_capture = 1,
1926 .dpcm_playback = 1,
Laxminath Kasam38070be2017-08-17 18:21:59 +05301927 .dpcm_capture = 1,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301928 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1929 SND_SOC_DPCM_TRIGGER_POST},
1930 .codec_dai_name = "snd-soc-dummy-dai",
1931 .codec_name = "snd-soc-dummy",
1932 .ignore_suspend = 1,
1933 .ignore_pmdown_time = 1,
1934 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301935 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301936 },
1937 {/* hw:x,17 */
1938 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
1939 .stream_name = "MM_NOIRQ",
1940 .cpu_dai_name = "MultiMedia8",
1941 .platform_name = "msm-pcm-dsp-noirq",
1942 .dynamic = 1,
1943 .dpcm_capture = 1,
1944 .dpcm_playback = 1,
1945 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1946 SND_SOC_DPCM_TRIGGER_POST},
1947 .codec_dai_name = "snd-soc-dummy-dai",
1948 .codec_name = "snd-soc-dummy",
1949 .ignore_suspend = 1,
1950 .ignore_pmdown_time = 1,
1951 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301952 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301953 },
1954 {/* hw:x,18 */
1955 .name = "HDMI_RX_HOSTLESS",
1956 .stream_name = "HDMI_RX_HOSTLESS",
1957 .cpu_dai_name = "HDMI_HOSTLESS",
1958 .platform_name = "msm-pcm-hostless",
1959 .dynamic = 1,
1960 .dpcm_playback = 1,
1961 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1962 SND_SOC_DPCM_TRIGGER_POST},
1963 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1964 .ignore_suspend = 1,
1965 .ignore_pmdown_time = 1,
1966 .codec_dai_name = "snd-soc-dummy-dai",
1967 .codec_name = "snd-soc-dummy",
1968 },
1969 {/* hw:x,19 */
1970 .name = "VoiceMMode2",
1971 .stream_name = "VoiceMMode2",
1972 .cpu_dai_name = "VoiceMMode2",
1973 .platform_name = "msm-pcm-voice",
1974 .dynamic = 1,
1975 .dpcm_capture = 1,
1976 .dpcm_playback = 1,
1977 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1978 SND_SOC_DPCM_TRIGGER_POST},
1979 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1980 .ignore_suspend = 1,
1981 .ignore_pmdown_time = 1,
1982 .codec_dai_name = "snd-soc-dummy-dai",
1983 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05301984 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301985 },
1986 {/* hw:x,20 */
1987 .name = "Listen 2 Audio Service",
1988 .stream_name = "Listen 2 Audio Service",
1989 .cpu_dai_name = "LSM2",
1990 .platform_name = "msm-lsm-client",
1991 .dynamic = 1,
1992 .dpcm_capture = 1,
1993 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
1994 SND_SOC_DPCM_TRIGGER_POST },
1995 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
1996 .ignore_suspend = 1,
1997 .ignore_pmdown_time = 1,
1998 .codec_dai_name = "snd-soc-dummy-dai",
1999 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302000 .id = MSM_FRONTEND_DAI_LSM2,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302001 },
2002 {/* hw:x,21 */
2003 .name = "Listen 3 Audio Service",
2004 .stream_name = "Listen 3 Audio Service",
2005 .cpu_dai_name = "LSM3",
2006 .platform_name = "msm-lsm-client",
2007 .dynamic = 1,
2008 .dpcm_capture = 1,
2009 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2010 SND_SOC_DPCM_TRIGGER_POST },
2011 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2012 .ignore_suspend = 1,
2013 .ignore_pmdown_time = 1,
2014 .codec_dai_name = "snd-soc-dummy-dai",
2015 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302016 .id = MSM_FRONTEND_DAI_LSM3,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302017 },
2018 {/* hw:x,22 */
2019 .name = "Listen 4 Audio Service",
2020 .stream_name = "Listen 4 Audio Service",
2021 .cpu_dai_name = "LSM4",
2022 .platform_name = "msm-lsm-client",
2023 .dynamic = 1,
2024 .dpcm_capture = 1,
2025 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2026 SND_SOC_DPCM_TRIGGER_POST },
2027 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2028 .ignore_suspend = 1,
2029 .ignore_pmdown_time = 1,
2030 .codec_dai_name = "snd-soc-dummy-dai",
2031 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302032 .id = MSM_FRONTEND_DAI_LSM4,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302033 },
2034 {/* hw:x,23 */
2035 .name = "Listen 5 Audio Service",
2036 .stream_name = "Listen 5 Audio Service",
2037 .cpu_dai_name = "LSM5",
2038 .platform_name = "msm-lsm-client",
2039 .dynamic = 1,
2040 .dpcm_capture = 1,
2041 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2042 SND_SOC_DPCM_TRIGGER_POST },
2043 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2044 .ignore_suspend = 1,
2045 .ignore_pmdown_time = 1,
2046 .codec_dai_name = "snd-soc-dummy-dai",
2047 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302048 .id = MSM_FRONTEND_DAI_LSM5,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302049 },
2050 {/* hw:x,24 */
2051 .name = "Listen 6 Audio Service",
2052 .stream_name = "Listen 6 Audio Service",
2053 .cpu_dai_name = "LSM6",
2054 .platform_name = "msm-lsm-client",
2055 .dynamic = 1,
2056 .dpcm_capture = 1,
2057 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2058 SND_SOC_DPCM_TRIGGER_POST },
2059 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2060 .ignore_suspend = 1,
2061 .ignore_pmdown_time = 1,
2062 .codec_dai_name = "snd-soc-dummy-dai",
2063 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302064 .id = MSM_FRONTEND_DAI_LSM6
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302065 },
2066 {/* hw:x,25 */
2067 .name = "Listen 7 Audio Service",
2068 .stream_name = "Listen 7 Audio Service",
2069 .cpu_dai_name = "LSM7",
2070 .platform_name = "msm-lsm-client",
2071 .dynamic = 1,
2072 .dpcm_capture = 1,
2073 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2074 SND_SOC_DPCM_TRIGGER_POST },
2075 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2076 .ignore_suspend = 1,
2077 .ignore_pmdown_time = 1,
2078 .codec_dai_name = "snd-soc-dummy-dai",
2079 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302080 .id = MSM_FRONTEND_DAI_LSM7,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302081 },
2082 {/* hw:x,26 */
2083 .name = "Listen 8 Audio Service",
2084 .stream_name = "Listen 8 Audio Service",
2085 .cpu_dai_name = "LSM8",
2086 .platform_name = "msm-lsm-client",
2087 .dynamic = 1,
2088 .dpcm_capture = 1,
2089 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2090 SND_SOC_DPCM_TRIGGER_POST },
2091 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2092 .ignore_suspend = 1,
2093 .ignore_pmdown_time = 1,
2094 .codec_dai_name = "snd-soc-dummy-dai",
2095 .codec_name = "snd-soc-dummy",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302096 .id = MSM_FRONTEND_DAI_LSM8,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302097 },
2098 {/* hw:x,27 */
2099 .name = MSM_DAILINK_NAME(Media9),
2100 .stream_name = "MultiMedia9",
2101 .cpu_dai_name = "MultiMedia9",
2102 .platform_name = "msm-pcm-dsp.0",
2103 .dynamic = 1,
2104 .dpcm_capture = 1,
2105 .dpcm_playback = 1,
2106 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2107 SND_SOC_DPCM_TRIGGER_POST},
2108 .codec_dai_name = "snd-soc-dummy-dai",
2109 .codec_name = "snd-soc-dummy",
2110 .ignore_suspend = 1,
2111 .ignore_pmdown_time = 1,
2112 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302113 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302114 },
2115 {/* hw:x,28 */
2116 .name = MSM_DAILINK_NAME(Compress4),
2117 .stream_name = "Compress4",
2118 .cpu_dai_name = "MultiMedia11",
2119 .platform_name = "msm-compress-dsp",
2120 .dynamic = 1,
2121 .dpcm_capture = 1,
2122 .dpcm_playback = 1,
2123 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2124 SND_SOC_DPCM_TRIGGER_POST},
2125 .codec_dai_name = "snd-soc-dummy-dai",
2126 .codec_name = "snd-soc-dummy",
2127 .ignore_suspend = 1,
2128 .ignore_pmdown_time = 1,
2129 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302130 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302131 },
2132 {/* hw:x,29 */
2133 .name = MSM_DAILINK_NAME(Compress5),
2134 .stream_name = "Compress5",
2135 .cpu_dai_name = "MultiMedia12",
2136 .platform_name = "msm-compress-dsp",
2137 .dynamic = 1,
2138 .dpcm_capture = 1,
2139 .dpcm_playback = 1,
2140 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2141 SND_SOC_DPCM_TRIGGER_POST},
2142 .codec_dai_name = "snd-soc-dummy-dai",
2143 .codec_name = "snd-soc-dummy",
2144 .ignore_suspend = 1,
2145 .ignore_pmdown_time = 1,
2146 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302147 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302148 },
2149 {/* hw:x,30 */
2150 .name = MSM_DAILINK_NAME(Compress6),
2151 .stream_name = "Compress6",
2152 .cpu_dai_name = "MultiMedia13",
2153 .platform_name = "msm-compress-dsp",
2154 .dynamic = 1,
2155 .dpcm_capture = 1,
2156 .dpcm_playback = 1,
2157 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2158 SND_SOC_DPCM_TRIGGER_POST},
2159 .codec_dai_name = "snd-soc-dummy-dai",
2160 .codec_name = "snd-soc-dummy",
2161 .ignore_suspend = 1,
2162 .ignore_pmdown_time = 1,
2163 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302164 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302165 },
2166 {/* hw:x,31 */
2167 .name = MSM_DAILINK_NAME(Compress7),
2168 .stream_name = "Compress7",
2169 .cpu_dai_name = "MultiMedia14",
2170 .platform_name = "msm-compress-dsp",
2171 .dynamic = 1,
2172 .dpcm_capture = 1,
2173 .dpcm_playback = 1,
2174 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2175 SND_SOC_DPCM_TRIGGER_POST},
2176 .codec_dai_name = "snd-soc-dummy-dai",
2177 .codec_name = "snd-soc-dummy",
2178 .ignore_suspend = 1,
2179 .ignore_pmdown_time = 1,
2180 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302181 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302182 },
2183 {/* hw:x,32 */
2184 .name = MSM_DAILINK_NAME(Compress8),
2185 .stream_name = "Compress8",
2186 .cpu_dai_name = "MultiMedia15",
2187 .platform_name = "msm-compress-dsp",
2188 .dynamic = 1,
2189 .dpcm_capture = 1,
2190 .dpcm_playback = 1,
2191 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2192 SND_SOC_DPCM_TRIGGER_POST},
2193 .codec_dai_name = "snd-soc-dummy-dai",
2194 .codec_name = "snd-soc-dummy",
2195 .ignore_suspend = 1,
2196 .ignore_pmdown_time = 1,
2197 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302198 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302199 },
2200 {/* hw:x,33 */
Asish Bhattacharya34504582017-08-08 12:55:01 +05302201 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
2202 .stream_name = "MM_NOIRQ_2",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302203 .cpu_dai_name = "MultiMedia16",
Asish Bhattacharya34504582017-08-08 12:55:01 +05302204 .platform_name = "msm-pcm-dsp-noirq",
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302205 .dynamic = 1,
2206 .dpcm_capture = 1,
2207 .dpcm_playback = 1,
2208 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2209 SND_SOC_DPCM_TRIGGER_POST},
2210 .codec_dai_name = "snd-soc-dummy-dai",
2211 .codec_name = "snd-soc-dummy",
2212 .ignore_suspend = 1,
2213 .ignore_pmdown_time = 1,
2214 /* this dai link has playback support */
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302215 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302216 },
2217 {/* hw:x,34 */
2218 .name = "SLIMBUS_8 Hostless",
2219 .stream_name = "SLIMBUS8_HOSTLESS Capture",
2220 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
2221 .platform_name = "msm-pcm-hostless",
2222 .dynamic = 1,
2223 .dpcm_capture = 1,
2224 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2225 SND_SOC_DPCM_TRIGGER_POST},
2226 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2227 .ignore_suspend = 1,
2228 .ignore_pmdown_time = 1,
2229 .codec_dai_name = "snd-soc-dummy-dai",
2230 .codec_name = "snd-soc-dummy",
2231 },
2232 {/* hw:x,35 */
2233 .name = "Primary MI2S_RX Hostless",
2234 .stream_name = "Primary MI2S_RX Hostless",
2235 .cpu_dai_name = "PRI_MI2S_RX_HOSTLESS",
2236 .platform_name = "msm-pcm-hostless",
2237 .dynamic = 1,
2238 .dpcm_playback = 1,
2239 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2240 SND_SOC_DPCM_TRIGGER_POST},
2241 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2242 .ignore_suspend = 1,
2243 /* this dailink has playback support */
2244 .ignore_pmdown_time = 1,
2245 /* This dainlink has MI2S support */
2246 .codec_dai_name = "snd-soc-dummy-dai",
2247 .codec_name = "snd-soc-dummy",
2248 },
2249 {/* hw:x,36 */
2250 .name = "Secondary MI2S_RX Hostless",
2251 .stream_name = "Secondary MI2S_RX Hostless",
2252 .cpu_dai_name = "SEC_MI2S_RX_HOSTLESS",
2253 .platform_name = "msm-pcm-hostless",
2254 .dynamic = 1,
2255 .dpcm_playback = 1,
2256 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2257 SND_SOC_DPCM_TRIGGER_POST},
2258 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2259 .ignore_suspend = 1,
2260 /* this dailink has playback support */
2261 .ignore_pmdown_time = 1,
2262 /* This dainlink has MI2S support */
2263 .codec_dai_name = "snd-soc-dummy-dai",
2264 .codec_name = "snd-soc-dummy",
2265 },
2266 {/* hw:x,37 */
2267 .name = "Tertiary MI2S_RX Hostless",
2268 .stream_name = "Tertiary MI2S_RX Hostless",
2269 .cpu_dai_name = "TERT_MI2S_RX_HOSTLESS",
2270 .platform_name = "msm-pcm-hostless",
2271 .dynamic = 1,
2272 .dpcm_playback = 1,
2273 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2274 SND_SOC_DPCM_TRIGGER_POST},
2275 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2276 .ignore_suspend = 1,
2277 /* this dailink has playback support */
2278 .ignore_pmdown_time = 1,
2279 /* This dainlink has MI2S support */
2280 .codec_dai_name = "snd-soc-dummy-dai",
2281 .codec_name = "snd-soc-dummy",
2282 },
2283 {/* hw:x,38 */
2284 .name = "INT0 MI2S_RX Hostless",
2285 .stream_name = "INT0 MI2S_RX Hostless",
2286 .cpu_dai_name = "INT0_MI2S_RX_HOSTLESS",
2287 .platform_name = "msm-pcm-hostless",
2288 .dynamic = 1,
2289 .dpcm_playback = 1,
2290 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2291 SND_SOC_DPCM_TRIGGER_POST},
2292 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2293 .ignore_suspend = 1,
2294 /* this dailink has playback support */
2295 .ignore_pmdown_time = 1,
2296 /* This dainlink has MI2S support */
2297 .codec_dai_name = "snd-soc-dummy-dai",
2298 .codec_name = "snd-soc-dummy",
2299 },
2300 {/* hw:x,39 */
2301 .name = "SDM660 HFP TX",
2302 .stream_name = "MultiMedia6",
2303 .cpu_dai_name = "MultiMedia6",
2304 .platform_name = "msm-pcm-loopback",
2305 .dynamic = 1,
2306 .dpcm_playback = 1,
2307 .dpcm_capture = 1,
2308 .codec_dai_name = "snd-soc-dummy-dai",
2309 .codec_name = "snd-soc-dummy",
2310 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2311 SND_SOC_DPCM_TRIGGER_POST},
2312 .ignore_suspend = 1,
2313 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2314 .ignore_pmdown_time = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302315 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302316 },
2317};
2318
2319
2320static struct snd_soc_dai_link msm_int_wsa_dai[] = {
2321 {/* hw:x,40 */
2322 .name = LPASS_BE_INT5_MI2S_TX,
2323 .stream_name = "INT5_mi2s Capture",
2324 .cpu_dai_name = "msm-dai-q6-mi2s.12",
2325 .platform_name = "msm-pcm-hostless",
2326 .codec_name = "msm_sdw_codec",
2327 .codec_dai_name = "msm_sdw_vifeedback",
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302328 .id = MSM_BACKEND_DAI_INT5_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302329 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2330 .ops = &msm_sdw_mi2s_be_ops,
2331 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
2332 .ignore_suspend = 1,
2333 .dpcm_capture = 1,
2334 .ignore_pmdown_time = 1,
2335 },
2336};
2337
2338static struct snd_soc_dai_link msm_int_be_dai[] = {
2339 /* Backend I2S DAI Links */
2340 {
2341 .name = LPASS_BE_INT0_MI2S_RX,
2342 .stream_name = "INT0 MI2S Playback",
2343 .cpu_dai_name = "msm-dai-q6-mi2s.7",
2344 .platform_name = "msm-pcm-routing",
2345 .codecs = dlc_rx1,
2346 .num_codecs = CODECS_MAX,
2347 .no_pcm = 1,
2348 .dpcm_playback = 1,
2349 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
2350 ASYNC_DPCM_SND_SOC_HW_PARAMS,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302351 .id = MSM_BACKEND_DAI_INT0_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302352 .init = &msm_audrx_init,
2353 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2354 .ops = &msm_int_mi2s_be_ops,
2355 .ignore_suspend = 1,
2356 },
2357 {
2358 .name = LPASS_BE_INT3_MI2S_TX,
2359 .stream_name = "INT3 MI2S Capture",
2360 .cpu_dai_name = "msm-dai-q6-mi2s.10",
2361 .platform_name = "msm-pcm-routing",
2362 .codecs = dlc_tx1,
2363 .num_codecs = CODECS_MAX,
2364 .no_pcm = 1,
2365 .dpcm_capture = 1,
2366 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
2367 ASYNC_DPCM_SND_SOC_HW_PARAMS,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302368 .id = MSM_BACKEND_DAI_INT3_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302369 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2370 .ops = &msm_int_mi2s_be_ops,
2371 .ignore_suspend = 1,
2372 },
2373 {
2374 .name = LPASS_BE_INT2_MI2S_TX,
2375 .stream_name = "INT2 MI2S Capture",
2376 .cpu_dai_name = "msm-dai-q6-mi2s.9",
2377 .platform_name = "msm-pcm-routing",
2378 .codecs = dlc_tx2,
2379 .num_codecs = CODECS_MAX,
2380 .no_pcm = 1,
2381 .dpcm_capture = 1,
2382 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
2383 ASYNC_DPCM_SND_SOC_HW_PARAMS,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302384 .id = MSM_BACKEND_DAI_INT2_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302385 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
2386 .ops = &msm_int_mi2s_be_ops,
2387 .ignore_suspend = 1,
2388 },
2389 {
2390 .name = LPASS_BE_AFE_PCM_RX,
2391 .stream_name = "AFE Playback",
2392 .cpu_dai_name = "msm-dai-q6-dev.224",
2393 .platform_name = "msm-pcm-routing",
2394 .codec_name = "msm-stub-codec.1",
2395 .codec_dai_name = "msm-stub-rx",
2396 .no_pcm = 1,
2397 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302398 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302399 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2400 /* this dainlink has playback support */
2401 .ignore_pmdown_time = 1,
2402 .ignore_suspend = 1,
2403 },
2404 {
2405 .name = LPASS_BE_AFE_PCM_TX,
2406 .stream_name = "AFE Capture",
2407 .cpu_dai_name = "msm-dai-q6-dev.225",
2408 .platform_name = "msm-pcm-routing",
2409 .codec_name = "msm-stub-codec.1",
2410 .codec_dai_name = "msm-stub-tx",
2411 .no_pcm = 1,
2412 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302413 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302414 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2415 .ignore_suspend = 1,
2416 },
2417 /* Incall Record Uplink BACK END DAI Link */
2418 {
2419 .name = LPASS_BE_INCALL_RECORD_TX,
2420 .stream_name = "Voice Uplink Capture",
2421 .cpu_dai_name = "msm-dai-q6-dev.32772",
2422 .platform_name = "msm-pcm-routing",
2423 .codec_name = "msm-stub-codec.1",
2424 .codec_dai_name = "msm-stub-tx",
2425 .no_pcm = 1,
2426 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302427 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302428 .be_hw_params_fixup = msm_be_hw_params_fixup,
2429 .ignore_suspend = 1,
2430 },
2431 /* Incall Record Downlink BACK END DAI Link */
2432 {
2433 .name = LPASS_BE_INCALL_RECORD_RX,
2434 .stream_name = "Voice Downlink Capture",
2435 .cpu_dai_name = "msm-dai-q6-dev.32771",
2436 .platform_name = "msm-pcm-routing",
2437 .codec_name = "msm-stub-codec.1",
2438 .codec_dai_name = "msm-stub-tx",
2439 .no_pcm = 1,
2440 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302441 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302442 .be_hw_params_fixup = msm_be_hw_params_fixup,
2443 .ignore_suspend = 1,
2444 },
2445 /* Incall Music BACK END DAI Link */
2446 {
2447 .name = LPASS_BE_VOICE_PLAYBACK_TX,
2448 .stream_name = "Voice Farend Playback",
2449 .cpu_dai_name = "msm-dai-q6-dev.32773",
2450 .platform_name = "msm-pcm-routing",
2451 .codec_name = "msm-stub-codec.1",
2452 .codec_dai_name = "msm-stub-rx",
2453 .no_pcm = 1,
2454 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302455 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302456 .be_hw_params_fixup = msm_be_hw_params_fixup,
2457 .ignore_suspend = 1,
2458 },
2459 /* Incall Music 2 BACK END DAI Link */
2460 {
2461 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
2462 .stream_name = "Voice2 Farend Playback",
2463 .cpu_dai_name = "msm-dai-q6-dev.32770",
2464 .platform_name = "msm-pcm-routing",
2465 .codec_name = "msm-stub-codec.1",
2466 .codec_dai_name = "msm-stub-rx",
2467 .no_pcm = 1,
2468 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302469 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302470 .be_hw_params_fixup = msm_be_hw_params_fixup,
2471 .ignore_suspend = 1,
2472 },
2473 {
2474 .name = LPASS_BE_USB_AUDIO_RX,
2475 .stream_name = "USB Audio Playback",
2476 .cpu_dai_name = "msm-dai-q6-dev.28672",
2477 .platform_name = "msm-pcm-routing",
2478 .codec_name = "msm-stub-codec.1",
2479 .codec_dai_name = "msm-stub-rx",
2480 .no_pcm = 1,
2481 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302482 .id = MSM_BACKEND_DAI_USB_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302483 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2484 .ignore_pmdown_time = 1,
2485 .ignore_suspend = 1,
2486 },
2487 {
2488 .name = LPASS_BE_USB_AUDIO_TX,
2489 .stream_name = "USB Audio Capture",
2490 .cpu_dai_name = "msm-dai-q6-dev.28673",
2491 .platform_name = "msm-pcm-routing",
2492 .codec_name = "msm-stub-codec.1",
2493 .codec_dai_name = "msm-stub-tx",
2494 .no_pcm = 1,
2495 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302496 .id = MSM_BACKEND_DAI_USB_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302497 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2498 .ignore_suspend = 1,
2499 },
2500 {
2501 .name = LPASS_BE_PRI_TDM_RX_0,
2502 .stream_name = "Primary TDM0 Playback",
2503 .cpu_dai_name = "msm-dai-q6-tdm.36864",
2504 .platform_name = "msm-pcm-routing",
2505 .codec_name = "msm-stub-codec.1",
2506 .codec_dai_name = "msm-stub-rx",
2507 .no_pcm = 1,
2508 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302509 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302510 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2511 .ops = &msm_tdm_be_ops,
2512 .ignore_suspend = 1,
2513 },
2514 {
2515 .name = LPASS_BE_PRI_TDM_TX_0,
2516 .stream_name = "Primary TDM0 Capture",
2517 .cpu_dai_name = "msm-dai-q6-tdm.36865",
2518 .platform_name = "msm-pcm-routing",
2519 .codec_name = "msm-stub-codec.1",
2520 .codec_dai_name = "msm-stub-tx",
2521 .no_pcm = 1,
2522 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302523 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302524 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2525 .ops = &msm_tdm_be_ops,
2526 .ignore_suspend = 1,
2527 },
2528 {
2529 .name = LPASS_BE_SEC_TDM_RX_0,
2530 .stream_name = "Secondary TDM0 Playback",
2531 .cpu_dai_name = "msm-dai-q6-tdm.36880",
2532 .platform_name = "msm-pcm-routing",
2533 .codec_name = "msm-stub-codec.1",
2534 .codec_dai_name = "msm-stub-rx",
2535 .no_pcm = 1,
2536 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302537 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302538 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2539 .ops = &msm_tdm_be_ops,
2540 .ignore_suspend = 1,
2541 },
2542 {
2543 .name = LPASS_BE_SEC_TDM_TX_0,
2544 .stream_name = "Secondary TDM0 Capture",
2545 .cpu_dai_name = "msm-dai-q6-tdm.36881",
2546 .platform_name = "msm-pcm-routing",
2547 .codec_name = "msm-stub-codec.1",
2548 .codec_dai_name = "msm-stub-tx",
2549 .no_pcm = 1,
2550 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302551 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302552 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2553 .ops = &msm_tdm_be_ops,
2554 .ignore_suspend = 1,
2555 },
2556 {
2557 .name = LPASS_BE_TERT_TDM_RX_0,
2558 .stream_name = "Tertiary TDM0 Playback",
2559 .cpu_dai_name = "msm-dai-q6-tdm.36896",
2560 .platform_name = "msm-pcm-routing",
2561 .codec_name = "msm-stub-codec.1",
2562 .codec_dai_name = "msm-stub-rx",
2563 .no_pcm = 1,
2564 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302565 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302566 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2567 .ops = &msm_tdm_be_ops,
2568 .ignore_suspend = 1,
2569 },
2570 {
2571 .name = LPASS_BE_TERT_TDM_TX_0,
2572 .stream_name = "Tertiary TDM0 Capture",
2573 .cpu_dai_name = "msm-dai-q6-tdm.36897",
2574 .platform_name = "msm-pcm-routing",
2575 .codec_name = "msm-stub-codec.1",
2576 .codec_dai_name = "msm-stub-tx",
2577 .no_pcm = 1,
2578 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302579 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302580 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2581 .ops = &msm_tdm_be_ops,
2582 .ignore_suspend = 1,
2583 },
2584 {
2585 .name = LPASS_BE_QUAT_TDM_RX_0,
2586 .stream_name = "Quaternary TDM0 Playback",
2587 .cpu_dai_name = "msm-dai-q6-tdm.36912",
2588 .platform_name = "msm-pcm-routing",
2589 .codec_name = "msm-stub-codec.1",
2590 .codec_dai_name = "msm-stub-rx",
2591 .no_pcm = 1,
2592 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302593 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302594 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2595 .ops = &msm_tdm_be_ops,
2596 .ignore_suspend = 1,
2597 },
2598 {
2599 .name = LPASS_BE_QUAT_TDM_TX_0,
2600 .stream_name = "Quaternary TDM0 Capture",
2601 .cpu_dai_name = "msm-dai-q6-tdm.36913",
2602 .platform_name = "msm-pcm-routing",
2603 .codec_name = "msm-stub-codec.1",
2604 .codec_dai_name = "msm-stub-tx",
2605 .no_pcm = 1,
2606 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302607 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302608 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2609 .ops = &msm_tdm_be_ops,
2610 .ignore_suspend = 1,
2611 },
Rohit Kumard1754482017-09-10 22:57:39 +05302612 {
2613 .name = LPASS_BE_QUIN_TDM_RX_0,
2614 .stream_name = "Quinary TDM0 Playback",
2615 .cpu_dai_name = "msm-dai-q6-tdm.37184",
2616 .platform_name = "msm-pcm-routing",
2617 .codec_name = "msm-stub-codec.1",
2618 .codec_dai_name = "msm-stub-rx",
2619 .no_pcm = 1,
2620 .dpcm_playback = 1,
2621 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
2622 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2623 .ops = &msm_tdm_be_ops,
2624 .ignore_suspend = 1,
2625 },
2626 {
2627 .name = LPASS_BE_QUIN_TDM_TX_0,
2628 .stream_name = "Quinary TDM0 Capture",
2629 .cpu_dai_name = "msm-dai-q6-tdm.37185",
2630 .platform_name = "msm-pcm-routing",
2631 .codec_name = "msm-stub-codec.1",
2632 .codec_dai_name = "msm-stub-tx",
2633 .no_pcm = 1,
2634 .dpcm_capture = 1,
2635 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
2636 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2637 .ops = &msm_tdm_be_ops,
2638 .ignore_suspend = 1,
2639 },
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302640};
2641
2642static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
2643 {
2644 .name = LPASS_BE_PRI_MI2S_RX,
2645 .stream_name = "Primary MI2S Playback",
2646 .cpu_dai_name = "msm-dai-q6-mi2s.0",
2647 .platform_name = "msm-pcm-routing",
2648 .codec_name = "msm-stub-codec.1",
2649 .codec_dai_name = "msm-stub-rx",
2650 .no_pcm = 1,
2651 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302652 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302653 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2654 .ops = &msm_mi2s_be_ops,
2655 .ignore_suspend = 1,
2656 .ignore_pmdown_time = 1,
2657 },
2658 {
2659 .name = LPASS_BE_PRI_MI2S_TX,
2660 .stream_name = "Primary MI2S Capture",
2661 .cpu_dai_name = "msm-dai-q6-mi2s.0",
2662 .platform_name = "msm-pcm-routing",
2663 .codec_name = "msm-stub-codec.1",
2664 .codec_dai_name = "msm-stub-tx",
2665 .no_pcm = 1,
2666 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302667 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302668 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2669 .ops = &msm_mi2s_be_ops,
2670 .ignore_suspend = 1,
2671 },
2672 {
2673 .name = LPASS_BE_SEC_MI2S_RX,
2674 .stream_name = "Secondary MI2S Playback",
2675 .cpu_dai_name = "msm-dai-q6-mi2s.1",
2676 .platform_name = "msm-pcm-routing",
2677 .codec_name = "msm-stub-codec.1",
2678 .codec_dai_name = "msm-stub-rx",
2679 .no_pcm = 1,
2680 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302681 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302682 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2683 .ops = &msm_mi2s_be_ops,
2684 .ignore_suspend = 1,
2685 .ignore_pmdown_time = 1,
2686 },
2687 {
2688 .name = LPASS_BE_SEC_MI2S_TX,
2689 .stream_name = "Secondary MI2S Capture",
2690 .cpu_dai_name = "msm-dai-q6-mi2s.1",
2691 .platform_name = "msm-pcm-routing",
2692 .codec_name = "msm-stub-codec.1",
2693 .codec_dai_name = "msm-stub-tx",
2694 .no_pcm = 1,
2695 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302696 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302697 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2698 .ops = &msm_mi2s_be_ops,
2699 .ignore_suspend = 1,
2700 },
2701 {
2702 .name = LPASS_BE_TERT_MI2S_RX,
2703 .stream_name = "Tertiary MI2S Playback",
2704 .cpu_dai_name = "msm-dai-q6-mi2s.2",
2705 .platform_name = "msm-pcm-routing",
2706 .codec_name = "msm-stub-codec.1",
2707 .codec_dai_name = "msm-stub-rx",
2708 .no_pcm = 1,
2709 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302710 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302711 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2712 .ops = &msm_mi2s_be_ops,
2713 .ignore_suspend = 1,
2714 .ignore_pmdown_time = 1,
2715 },
2716 {
2717 .name = LPASS_BE_TERT_MI2S_TX,
2718 .stream_name = "Tertiary MI2S Capture",
2719 .cpu_dai_name = "msm-dai-q6-mi2s.2",
2720 .platform_name = "msm-pcm-routing",
2721 .codec_name = "msm-stub-codec.1",
2722 .codec_dai_name = "msm-stub-tx",
2723 .no_pcm = 1,
2724 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302725 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302726 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2727 .ops = &msm_mi2s_be_ops,
2728 .ignore_suspend = 1,
2729 },
2730 {
2731 .name = LPASS_BE_QUAT_MI2S_RX,
2732 .stream_name = "Quaternary MI2S Playback",
2733 .cpu_dai_name = "msm-dai-q6-mi2s.3",
2734 .platform_name = "msm-pcm-routing",
2735 .codec_name = "msm-stub-codec.1",
2736 .codec_dai_name = "msm-stub-rx",
2737 .no_pcm = 1,
2738 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302739 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302740 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2741 .ops = &msm_mi2s_be_ops,
2742 .ignore_suspend = 1,
2743 .ignore_pmdown_time = 1,
2744 },
2745 {
2746 .name = LPASS_BE_QUAT_MI2S_TX,
2747 .stream_name = "Quaternary MI2S Capture",
2748 .cpu_dai_name = "msm-dai-q6-mi2s.3",
2749 .platform_name = "msm-pcm-routing",
2750 .codec_name = "msm-stub-codec.1",
2751 .codec_dai_name = "msm-stub-tx",
2752 .no_pcm = 1,
2753 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302754 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302755 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2756 .ops = &msm_mi2s_be_ops,
2757 .ignore_suspend = 1,
2758 },
Rohit Kumard1754482017-09-10 22:57:39 +05302759 {
2760 .name = LPASS_BE_QUIN_MI2S_RX,
2761 .stream_name = "Quinary MI2S Playback",
2762 .cpu_dai_name = "msm-dai-q6-mi2s.5",
2763 .platform_name = "msm-pcm-routing",
2764 .codec_name = "msm-stub-codec.1",
2765 .codec_dai_name = "msm-stub-rx",
2766 .no_pcm = 1,
2767 .dpcm_playback = 1,
2768 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
2769 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2770 .ops = &msm_mi2s_be_ops,
2771 .ignore_suspend = 1,
2772 .ignore_pmdown_time = 1,
2773 },
2774 {
2775 .name = LPASS_BE_QUIN_MI2S_TX,
2776 .stream_name = "Quinary MI2S Capture",
2777 .cpu_dai_name = "msm-dai-q6-mi2s.5",
2778 .platform_name = "msm-pcm-routing",
2779 .codec_name = "msm-stub-codec.1",
2780 .codec_dai_name = "msm-stub-tx",
2781 .no_pcm = 1,
2782 .dpcm_capture = 1,
2783 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
2784 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2785 .ops = &msm_mi2s_be_ops,
2786 .ignore_suspend = 1,
2787 },
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302788};
2789
2790static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
2791 /* Primary AUX PCM Backend DAI Links */
2792 {
2793 .name = LPASS_BE_AUXPCM_RX,
2794 .stream_name = "AUX PCM Playback",
2795 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
2796 .platform_name = "msm-pcm-routing",
2797 .codec_name = "msm-stub-codec.1",
2798 .codec_dai_name = "msm-stub-rx",
2799 .no_pcm = 1,
2800 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302801 .id = MSM_BACKEND_DAI_AUXPCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302802 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2803 .ignore_pmdown_time = 1,
2804 .ignore_suspend = 1,
2805 .ops = &msm_aux_pcm_be_ops,
2806 },
2807 {
2808 .name = LPASS_BE_AUXPCM_TX,
2809 .stream_name = "AUX PCM Capture",
2810 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
2811 .platform_name = "msm-pcm-routing",
2812 .codec_name = "msm-stub-codec.1",
2813 .codec_dai_name = "msm-stub-tx",
2814 .no_pcm = 1,
2815 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302816 .id = MSM_BACKEND_DAI_AUXPCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302817 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2818 .ignore_pmdown_time = 1,
2819 .ignore_suspend = 1,
2820 .ops = &msm_aux_pcm_be_ops,
2821 },
2822 /* Secondary AUX PCM Backend DAI Links */
2823 {
2824 .name = LPASS_BE_SEC_AUXPCM_RX,
2825 .stream_name = "Sec AUX PCM Playback",
2826 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
2827 .platform_name = "msm-pcm-routing",
2828 .codec_name = "msm-stub-codec.1",
2829 .codec_dai_name = "msm-stub-rx",
2830 .no_pcm = 1,
2831 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302832 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302833 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2834 .ignore_pmdown_time = 1,
2835 .ignore_suspend = 1,
2836 .ops = &msm_aux_pcm_be_ops,
2837 },
2838 {
2839 .name = LPASS_BE_SEC_AUXPCM_TX,
2840 .stream_name = "Sec AUX PCM Capture",
2841 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
2842 .platform_name = "msm-pcm-routing",
2843 .codec_name = "msm-stub-codec.1",
2844 .codec_dai_name = "msm-stub-tx",
2845 .no_pcm = 1,
2846 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302847 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302848 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2849 .ignore_suspend = 1,
2850 .ignore_pmdown_time = 1,
2851 .ops = &msm_aux_pcm_be_ops,
2852 },
2853 /* Tertiary AUX PCM Backend DAI Links */
2854 {
2855 .name = LPASS_BE_TERT_AUXPCM_RX,
2856 .stream_name = "Tert AUX PCM Playback",
2857 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
2858 .platform_name = "msm-pcm-routing",
2859 .codec_name = "msm-stub-codec.1",
2860 .codec_dai_name = "msm-stub-rx",
2861 .no_pcm = 1,
2862 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302863 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302864 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2865 .ignore_pmdown_time = 1,
2866 .ignore_suspend = 1,
2867 .ops = &msm_aux_pcm_be_ops,
2868 },
2869 {
2870 .name = LPASS_BE_TERT_AUXPCM_TX,
2871 .stream_name = "Tert AUX PCM Capture",
2872 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
2873 .platform_name = "msm-pcm-routing",
2874 .codec_name = "msm-stub-codec.1",
2875 .codec_dai_name = "msm-stub-tx",
2876 .no_pcm = 1,
2877 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302878 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302879 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2880 .ignore_suspend = 1,
2881 .ignore_pmdown_time = 1,
2882 .ops = &msm_aux_pcm_be_ops,
2883 },
2884 /* Quaternary AUX PCM Backend DAI Links */
2885 {
2886 .name = LPASS_BE_QUAT_AUXPCM_RX,
2887 .stream_name = "Quat AUX PCM Playback",
2888 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
2889 .platform_name = "msm-pcm-routing",
2890 .codec_name = "msm-stub-codec.1",
2891 .codec_dai_name = "msm-stub-rx",
2892 .no_pcm = 1,
2893 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302894 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302895 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2896 .ignore_pmdown_time = 1,
2897 .ignore_suspend = 1,
2898 .ops = &msm_aux_pcm_be_ops,
2899 },
2900 {
2901 .name = LPASS_BE_QUAT_AUXPCM_TX,
2902 .stream_name = "Quat AUX PCM Capture",
2903 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
2904 .platform_name = "msm-pcm-routing",
2905 .codec_name = "msm-stub-codec.1",
2906 .codec_dai_name = "msm-stub-tx",
2907 .no_pcm = 1,
2908 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302909 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302910 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2911 .ignore_suspend = 1,
2912 .ignore_pmdown_time = 1,
2913 .ops = &msm_aux_pcm_be_ops,
2914 },
Rohit Kumard1754482017-09-10 22:57:39 +05302915 /* Quinary AUX PCM Backend DAI Links */
2916 {
2917 .name = LPASS_BE_QUIN_AUXPCM_RX,
2918 .stream_name = "Quin AUX PCM Playback",
2919 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
2920 .platform_name = "msm-pcm-routing",
2921 .codec_name = "msm-stub-codec.1",
2922 .codec_dai_name = "msm-stub-rx",
2923 .no_pcm = 1,
2924 .dpcm_playback = 1,
2925 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
2926 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2927 .ignore_pmdown_time = 1,
2928 .ignore_suspend = 1,
2929 .ops = &msm_aux_pcm_be_ops,
2930 },
2931 {
2932 .name = LPASS_BE_QUIN_AUXPCM_TX,
2933 .stream_name = "Quin AUX PCM Capture",
2934 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
2935 .platform_name = "msm-pcm-routing",
2936 .codec_name = "msm-stub-codec.1",
2937 .codec_dai_name = "msm-stub-tx",
2938 .no_pcm = 1,
2939 .dpcm_capture = 1,
2940 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
2941 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
2942 .ignore_suspend = 1,
2943 .ignore_pmdown_time = 1,
2944 .ops = &msm_aux_pcm_be_ops,
2945 },
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302946};
2947
2948
2949static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
2950 {
2951 .name = LPASS_BE_SLIMBUS_7_RX,
2952 .stream_name = "Slimbus7 Playback",
2953 .cpu_dai_name = "msm-dai-q6-dev.16398",
2954 .platform_name = "msm-pcm-routing",
2955 .codec_name = "btfmslim_slave",
2956 /* BT codec driver determines capabilities based on
2957 * dai name, bt codecdai name should always contains
2958 * supported usecase information
2959 */
2960 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
2961 .no_pcm = 1,
2962 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302963 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302964 .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
2965 .ops = &msm_wcn_ops,
2966 /* dai link has playback support */
2967 .ignore_pmdown_time = 1,
2968 .ignore_suspend = 1,
2969 },
2970 {
2971 .name = LPASS_BE_SLIMBUS_7_TX,
2972 .stream_name = "Slimbus7 Capture",
2973 .cpu_dai_name = "msm-dai-q6-dev.16399",
2974 .platform_name = "msm-pcm-routing",
2975 .codec_name = "btfmslim_slave",
2976 .codec_dai_name = "btfm_bt_sco_slim_tx",
2977 .no_pcm = 1,
2978 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302979 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302980 .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
2981 .ops = &msm_wcn_ops,
2982 .ignore_suspend = 1,
2983 },
2984 {
2985 .name = LPASS_BE_SLIMBUS_8_TX,
2986 .stream_name = "Slimbus8 Capture",
2987 .cpu_dai_name = "msm-dai-q6-dev.16401",
2988 .platform_name = "msm-pcm-routing",
2989 .codec_name = "btfmslim_slave",
2990 .codec_dai_name = "btfm_fm_slim_tx",
2991 .no_pcm = 1,
2992 .dpcm_capture = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302993 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302994 .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
2995 .init = &msm_wcn_init,
2996 .ops = &msm_wcn_ops,
2997 .ignore_suspend = 1,
2998 },
2999};
3000
3001static struct snd_soc_dai_link msm_wsa_be_dai_links[] = {
3002 {
3003 .name = LPASS_BE_INT4_MI2S_RX,
3004 .stream_name = "INT4 MI2S Playback",
3005 .cpu_dai_name = "msm-dai-q6-mi2s.11",
3006 .platform_name = "msm-pcm-routing",
3007 .codec_name = "msm_sdw_codec",
3008 .codec_dai_name = "msm_sdw_i2s_rx1",
3009 .no_pcm = 1,
3010 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05303011 .id = MSM_BACKEND_DAI_INT4_MI2S_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05303012 .init = &msm_sdw_audrx_init,
3013 .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
3014 .ops = &msm_sdw_mi2s_be_ops,
3015 .ignore_suspend = 1,
3016 },
3017};
3018
3019static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
3020 /* DISP PORT BACK END DAI Link */
3021 {
3022 .name = LPASS_BE_DISPLAY_PORT,
3023 .stream_name = "Display Port Playback",
3024 .cpu_dai_name = "msm-dai-q6-dp.24608",
3025 .platform_name = "msm-pcm-routing",
3026 .codec_name = "msm-ext-disp-audio-codec-rx",
3027 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
3028 .no_pcm = 1,
3029 .dpcm_playback = 1,
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05303030 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05303031 .be_hw_params_fixup = msm_common_be_hw_params_fixup,
3032 .ignore_pmdown_time = 1,
3033 .ignore_suspend = 1,
3034 },
3035};
3036
3037static struct snd_soc_dai_link msm_int_dai_links[
3038ARRAY_SIZE(msm_int_dai) +
3039ARRAY_SIZE(msm_int_wsa_dai) +
3040ARRAY_SIZE(msm_int_be_dai) +
3041ARRAY_SIZE(msm_mi2s_be_dai_links) +
3042ARRAY_SIZE(msm_auxpcm_be_dai_links)+
3043ARRAY_SIZE(msm_wcn_be_dai_links) +
3044ARRAY_SIZE(msm_wsa_be_dai_links) +
3045ARRAY_SIZE(ext_disp_be_dai_link)];
3046
3047static struct snd_soc_card sdm660_card = {
3048 /* snd_soc_card_sdm660 */
3049 .name = "sdm660-snd-card",
3050 .dai_link = msm_int_dai,
3051 .num_links = ARRAY_SIZE(msm_int_dai),
3052 .late_probe = msm_snd_card_late_probe,
3053};
3054
3055static void msm_disable_int_mclk0(struct work_struct *work)
3056{
3057 struct msm_asoc_mach_data *pdata = NULL;
3058 struct delayed_work *dwork;
3059 int ret = 0;
3060
3061 dwork = to_delayed_work(work);
3062 pdata = container_of(dwork, struct msm_asoc_mach_data,
3063 disable_int_mclk0_work);
3064 mutex_lock(&pdata->cdc_int_mclk0_mutex);
3065 pr_debug("%s: mclk_enabled %d mclk_rsc_ref %d\n", __func__,
3066 atomic_read(&pdata->int_mclk0_enabled),
3067 atomic_read(&pdata->int_mclk0_rsc_ref));
3068
3069 if (atomic_read(&pdata->int_mclk0_enabled) == true
3070 && atomic_read(&pdata->int_mclk0_rsc_ref) == 0) {
3071 pr_debug("Disable the mclk\n");
3072 pdata->digital_cdc_core_clk.enable = 0;
3073 ret = afe_set_lpass_clock_v2(
3074 AFE_PORT_ID_INT0_MI2S_RX,
3075 &pdata->digital_cdc_core_clk);
3076 if (ret < 0)
3077 pr_err("%s failed to disable the CCLK\n", __func__);
3078 atomic_set(&pdata->int_mclk0_enabled, false);
3079 }
3080 mutex_unlock(&pdata->cdc_int_mclk0_mutex);
3081}
3082
3083static void msm_int_dt_parse_cap_info(struct platform_device *pdev,
3084 struct msm_asoc_mach_data *pdata)
3085{
3086 const char *ext1_cap = "qcom,msm-micbias1-ext-cap";
3087 const char *ext2_cap = "qcom,msm-micbias2-ext-cap";
3088
3089 pdata->micbias1_cap_mode =
3090 (of_property_read_bool(pdev->dev.of_node, ext1_cap) ?
3091 MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
3092
3093 pdata->micbias2_cap_mode =
3094 (of_property_read_bool(pdev->dev.of_node, ext2_cap) ?
3095 MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
3096}
3097
3098static struct snd_soc_card *msm_int_populate_sndcard_dailinks(
3099 struct device *dev)
3100{
3101 struct snd_soc_card *card = &sdm660_card;
3102 struct snd_soc_dai_link *dailink;
3103 int len1;
3104
3105 card->name = dev_name(dev);
3106 len1 = ARRAY_SIZE(msm_int_dai);
3107 memcpy(msm_int_dai_links, msm_int_dai, sizeof(msm_int_dai));
3108 dailink = msm_int_dai_links;
3109 if (!of_property_read_bool(dev->of_node,
3110 "qcom,wsa-disable")) {
3111 memcpy(dailink + len1,
3112 msm_int_wsa_dai,
3113 sizeof(msm_int_wsa_dai));
3114 len1 += ARRAY_SIZE(msm_int_wsa_dai);
3115 }
3116 memcpy(dailink + len1, msm_int_be_dai, sizeof(msm_int_be_dai));
3117 len1 += ARRAY_SIZE(msm_int_be_dai);
3118
3119 if (of_property_read_bool(dev->of_node,
3120 "qcom,mi2s-audio-intf")) {
3121 memcpy(dailink + len1,
3122 msm_mi2s_be_dai_links,
3123 sizeof(msm_mi2s_be_dai_links));
3124 len1 += ARRAY_SIZE(msm_mi2s_be_dai_links);
3125 }
3126 if (of_property_read_bool(dev->of_node,
3127 "qcom,auxpcm-audio-intf")) {
3128 memcpy(dailink + len1,
3129 msm_auxpcm_be_dai_links,
3130 sizeof(msm_auxpcm_be_dai_links));
3131 len1 += ARRAY_SIZE(msm_auxpcm_be_dai_links);
3132 }
3133 if (of_property_read_bool(dev->of_node, "qcom,wcn-btfm")) {
3134 dev_dbg(dev, "%s(): WCN BTFM support present\n",
3135 __func__);
3136 memcpy(dailink + len1,
3137 msm_wcn_be_dai_links,
3138 sizeof(msm_wcn_be_dai_links));
3139 len1 += ARRAY_SIZE(msm_wcn_be_dai_links);
3140 }
3141 if (!of_property_read_bool(dev->of_node, "qcom,wsa-disable")) {
3142 memcpy(dailink + len1,
3143 msm_wsa_be_dai_links,
3144 sizeof(msm_wsa_be_dai_links));
3145 len1 += ARRAY_SIZE(msm_wsa_be_dai_links);
3146 }
3147 if (of_property_read_bool(dev->of_node, "qcom,ext-disp-audio-rx")) {
3148 dev_dbg(dev, "%s(): ext disp audio support present\n",
3149 __func__);
3150 memcpy(dailink + len1,
3151 ext_disp_be_dai_link,
3152 sizeof(ext_disp_be_dai_link));
3153 len1 += ARRAY_SIZE(ext_disp_be_dai_link);
3154 }
3155 card->dai_link = dailink;
3156 card->num_links = len1;
3157 return card;
3158}
3159
3160static int msm_internal_init(struct platform_device *pdev,
3161 struct msm_asoc_mach_data *pdata,
3162 struct snd_soc_card *card)
3163{
3164 const char *type = NULL;
3165 const char *hs_micbias_type = "qcom,msm-hs-micbias-type";
3166 int ret;
3167
3168 ret = is_ext_spk_gpio_support(pdev, pdata);
3169 if (ret < 0)
3170 dev_dbg(&pdev->dev,
3171 "%s: doesn't support external speaker pa\n",
3172 __func__);
3173
3174 ret = of_property_read_string(pdev->dev.of_node,
3175 hs_micbias_type, &type);
3176 if (ret) {
3177 dev_err(&pdev->dev, "%s: missing %s in dt node\n",
3178 __func__, hs_micbias_type);
3179 goto err;
3180 }
3181 if (!strcmp(type, "external")) {
3182 dev_dbg(&pdev->dev, "Headset is using external micbias\n");
3183 mbhc_cfg_ptr->hs_ext_micbias = true;
3184 } else {
3185 dev_dbg(&pdev->dev, "Headset is using internal micbias\n");
3186 mbhc_cfg_ptr->hs_ext_micbias = false;
3187 }
3188
3189 /* initialize the int_mclk0 */
3190 pdata->digital_cdc_core_clk.clk_set_minor_version =
3191 AFE_API_VERSION_I2S_CONFIG;
3192 pdata->digital_cdc_core_clk.clk_id =
3193 Q6AFE_LPASS_CLK_ID_INT_MCLK_0;
3194 pdata->digital_cdc_core_clk.clk_freq_in_hz = pdata->mclk_freq;
3195 pdata->digital_cdc_core_clk.clk_attri =
3196 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
3197 pdata->digital_cdc_core_clk.clk_root =
3198 Q6AFE_LPASS_CLK_ROOT_DEFAULT;
3199 pdata->digital_cdc_core_clk.enable = 1;
3200
3201 /* Initialize loopback mode to false */
3202 pdata->lb_mode = false;
3203
3204 msm_int_dt_parse_cap_info(pdev, pdata);
3205
3206 card->dev = &pdev->dev;
3207 platform_set_drvdata(pdev, card);
3208 snd_soc_card_set_drvdata(card, pdata);
3209 ret = snd_soc_of_parse_card_name(card, "qcom,model");
3210 if (ret)
3211 goto err;
3212 /* initialize timer */
3213 INIT_DELAYED_WORK(&pdata->disable_int_mclk0_work,
3214 msm_disable_int_mclk0);
3215 mutex_init(&pdata->cdc_int_mclk0_mutex);
3216 atomic_set(&pdata->int_mclk0_rsc_ref, 0);
3217 atomic_set(&pdata->int_mclk0_enabled, false);
3218
3219 dev_info(&pdev->dev, "%s: default codec configured\n", __func__);
3220
3221 return 0;
3222err:
3223 return ret;
3224}
3225
3226/**
3227 * msm_int_cdc_init - internal codec machine specific init.
3228 *
3229 * @pdev: platform device handle
3230 * @pdata: private data of machine driver
3231 * @card: sound card pointer reference
3232 * @mbhc_cfg: MBHC config reference
3233 *
3234 * Returns 0.
3235 */
3236int msm_int_cdc_init(struct platform_device *pdev,
3237 struct msm_asoc_mach_data *pdata,
3238 struct snd_soc_card **card,
3239 struct wcd_mbhc_config *mbhc_cfg)
3240{
3241 mbhc_cfg_ptr = mbhc_cfg;
3242
3243 *card = msm_int_populate_sndcard_dailinks(&pdev->dev);
3244 msm_internal_init(pdev, pdata, *card);
3245 return 0;
3246}
3247EXPORT_SYMBOL(msm_int_cdc_init);