blob: b8e6a64438cd523701812b0ea550419098651935 [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Mansoor Aftabe9912a62014-07-15 01:40:26 -07002 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Shalaj Jain1f9725a2015-03-04 17:53:49 -080052#ifdef ION_FLAG_CP_PIXEL
53#define CP_HEAP_ID ION_SECURE_HEAP_ID
54#else
55#define ION_FLAG_CP_PIXEL 0
56#define CP_HEAP_ID ION_CP_MM_HEAP_ID
57#endif
58
59#ifndef ION_FLAG_ALLOW_NON_CONTIG
60#define ION_FLAG_ALLOW_NON_CONTIG 0
61#endif
62
Iliyan Malchev202a77d2012-06-11 14:41:12 -070063using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070064using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070065
Naomi Luisa44100c2013-02-08 12:42:03 -080066ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
67
Sushil Chauhan65e26302015-01-14 10:48:57 -080068static void getUBwcWidthAndHeight(int, int, int, int&, int&);
69static unsigned int getUBwcSize(int, int, int, const int, const int);
70
Iliyan Malchev202a77d2012-06-11 14:41:12 -070071//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070072
Saurabh Shah1adcafe2014-12-19 10:05:41 -080073/* The default policy is to return cached buffers unless the client explicity
74 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
75 * read or written in software. Any combination with a _RARELY_ flag will be
76 * treated as uncached. */
77static bool useUncached(const int& usage) {
78 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
79 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
80 GRALLOC_USAGE_SW_WRITE_RARELY) or
81 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
82 GRALLOC_USAGE_SW_READ_RARELY))
83 return true;
84
85 return false;
86}
87
Naomi Luisa44100c2013-02-08 12:42:03 -080088//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080089AdrenoMemInfo::AdrenoMemInfo()
90{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080091 LINK_adreno_compute_aligned_width_and_height = NULL;
92 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070093 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080094 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -080095 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080096
Naomi Luis01f5c8e2013-02-11 12:46:24 -080097 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
98 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080099 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700100 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
101 *(void **)&LINK_adreno_compute_padding =
102 ::dlsym(libadreno_utils, "compute_surface_padding");
103 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
104 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800105 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
106 ::dlsym(libadreno_utils,
107 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800108 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
109 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800110 }
111}
112
113AdrenoMemInfo::~AdrenoMemInfo()
114{
115 if (libadreno_utils) {
116 ::dlclose(libadreno_utils);
117 }
118}
119
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700120int AdrenoMemInfo::isMacroTilingSupportedByGPU()
121{
122 if ((libadreno_utils)) {
123 if(LINK_adreno_isMacroTilingSupportedByGpu) {
124 return LINK_adreno_isMacroTilingSupportedByGpu();
125 }
126 }
127 return 0;
128}
129
130
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800131void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800132 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800133{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800134
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800135 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700136 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800137 int tileEnabled = isMacroTileEnabled(format, usage);
138 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
139 height, format, tileEnabled, aligned_w, aligned_h);
140 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800141 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800142
143 if (isUBwcEnabled(format, usage)) {
144 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
145 return;
146 }
147
148 aligned_w = width;
149 aligned_h = height;
150 switch (format)
151 {
152 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
153 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
154 case HAL_PIXEL_FORMAT_RAW_SENSOR:
155 aligned_w = ALIGN(width, 32);
156 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700157 case HAL_PIXEL_FORMAT_RAW10:
158 aligned_w = ALIGN(width * 10 /8, 16);
159 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800160 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
161 aligned_w = ALIGN(width, 128);
162 break;
163 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
164 case HAL_PIXEL_FORMAT_YV12:
165 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
166 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
167 case HAL_PIXEL_FORMAT_YCbCr_422_I:
168 case HAL_PIXEL_FORMAT_YCrCb_422_I:
169 aligned_w = ALIGN(width, 16);
170 break;
171 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
172 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
173 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
174 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
175 break;
176 case HAL_PIXEL_FORMAT_BLOB:
177 break;
178 case HAL_PIXEL_FORMAT_NV21_ZSL:
179 aligned_w = ALIGN(width, 64);
180 aligned_h = ALIGN(height, 64);
181 break;
182 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
183 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
184 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
185 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
186 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
187 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
188 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
189 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
199 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
200 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
201 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
202 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
203 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
204 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
205 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
206 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
207 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
208 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
209 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
210 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
211 int bytesPerPixel = 0;
212 int raster_mode = 0; //Adreno unknown raster mode.
213 int padding_threshold = 512; //Threshold for padding
214 //surfaces.
215
216 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
217 width, height, format, 0,raster_mode, padding_threshold,
218 &aligned_w, &aligned_h, &bytesPerPixel);
219 } else {
220 ALOGW("%s: Warning!! Symbols" \
221 " compute_compressedfmt_aligned_width_and_height" \
222 " not found", __FUNCTION__);
223 }
224 break;
225 default: break;
226 }
227}
228
229void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
230 int tile_enabled, int& aligned_w, int& aligned_h)
231{
232 aligned_w = ALIGN(width, 32);
233 aligned_h = ALIGN(height, 32);
234
235 // Don't add any additional padding if debug.gralloc.map_fb_memory
236 // is enabled
237 char property[PROPERTY_VALUE_MAX];
238 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
239 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
240 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
241 return;
242 }
243
244 int bpp = 4;
245 switch(format)
246 {
247 case HAL_PIXEL_FORMAT_RGB_888:
248 bpp = 3;
249 break;
250 case HAL_PIXEL_FORMAT_RGB_565:
251 case HAL_PIXEL_FORMAT_RGBA_5551:
252 case HAL_PIXEL_FORMAT_RGBA_4444:
253 bpp = 2;
254 break;
255 default: break;
256 }
257
258 if (libadreno_utils) {
259 int raster_mode = 0; // Adreno unknown raster mode.
260 int padding_threshold = 512; // Threshold for padding surfaces.
261 // the function below computes aligned width and aligned height
262 // based on linear or macro tile mode selected.
263 if(LINK_adreno_compute_aligned_width_and_height) {
264 LINK_adreno_compute_aligned_width_and_height(width,
265 height, bpp, tile_enabled,
266 raster_mode, padding_threshold,
267 &aligned_w, &aligned_h);
268
269 } else if(LINK_adreno_compute_padding) {
270 int surface_tile_height = 1; // Linear surface
271 aligned_w = LINK_adreno_compute_padding(width, bpp,
272 surface_tile_height, raster_mode,
273 padding_threshold);
274 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
275 __FUNCTION__);
276 } else {
277 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
278 "compute_aligned_width_and_height not found", __FUNCTION__);
279 }
280 }
281}
282
283int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
284{
Sushil Chauhan082acd62015-01-14 16:49:29 -0800285 if (libadreno_utils) {
286 if (LINK_adreno_isUBWCSupportedByGpu) {
287 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
288 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
289 }
290 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800291 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800292}
293
Sushil Chauhan082acd62015-01-14 16:49:29 -0800294ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
295{
296 switch (hal_format) {
297 case HAL_PIXEL_FORMAT_RGBA_8888:
298 return ADRENO_PIXELFORMAT_R8G8B8A8;
Sushil Chauhan6686c802015-04-15 11:30:39 -0700299 case HAL_PIXEL_FORMAT_RGBX_8888:
300 return ADRENO_PIXELFORMAT_R8G8B8X8;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800301 case HAL_PIXEL_FORMAT_RGB_565:
302 return ADRENO_PIXELFORMAT_B5G6R5;
303 case HAL_PIXEL_FORMAT_sRGB_A_8888:
304 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
305 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800306 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800307 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
308 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800309 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800310 default:
311 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
312 break;
313 }
314 return ADRENO_PIXELFORMAT_UNKNOWN;
315}
316
Naomi Luisa44100c2013-02-08 12:42:03 -0800317//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700318IAllocController* IAllocController::sController = NULL;
319IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700320{
321 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700322 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700323 }
324 return sController;
325}
326
327
328//-------------- IonController-----------------------//
329IonController::IonController()
330{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530331 allocateIonMem();
332}
333
334void IonController::allocateIonMem()
335{
336 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700337}
338
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700339int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700340{
341 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500342 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700343 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700344
345 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700346 data.allocType = 0;
347
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530348 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530349 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800350 ionHeapId = ION_HEAP(CP_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500351 ionFlags |= ION_SECURE;
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800352 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
353 /*
354 * There is currently no flag in ION for Secure Display
355 * VM. Please add it here once available.
356 *
357 ionFlags |= <Ion flag for Secure Display>;
358 */
359 } else {
360 ionFlags |= ION_FLAG_CP_PIXEL;
361 }
362
Shalaj Jain13cdf812014-12-02 16:20:54 -0800363 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
364 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
365 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530366 } else {
367 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500368 // do not set ion secure flag & MM heap. Fallback to system heap.
369 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530370 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500371 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530372 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
373 //MM Heap is exclusively a secure heap.
374 //If it is used for non secure cases, fallback to IOMMU heap
375 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
376 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500377 trying to use system heap instead !!");
378 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500379 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700380
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700381 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500382 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700383
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700384 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500385 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700386
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530387 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500388 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700389
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500390 // if no ion heap flags are set, default to system heap
391 if(!ionHeapId)
392 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700393
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500394 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700395 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500396 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700397 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700398
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700399 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700400 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500401 } else {
402 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
403 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700404 }
405
406 return ret;
407}
408
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700409IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700410{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700411 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700412 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
413 memalloc = mIonAlloc;
414 } else {
415 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
416 }
417
418 return memalloc;
419}
420
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700421bool isMacroTileEnabled(int format, int usage)
422{
423 bool tileEnabled = false;
424
425 // Check whether GPU & MDSS supports MacroTiling feature
426 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
427 qdutils::MDPVersion::getInstance().supportsMacroTile())
428 {
429 // check the format
430 switch(format)
431 {
432 case HAL_PIXEL_FORMAT_RGBA_8888:
433 case HAL_PIXEL_FORMAT_RGBX_8888:
434 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800435 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700436 {
437 tileEnabled = true;
438 // check the usage flags
439 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
440 GRALLOC_USAGE_SW_WRITE_MASK)) {
441 // Application intends to use CPU for rendering
442 tileEnabled = false;
443 }
444 break;
445 }
446 default:
447 break;
448 }
449 }
450 return tileEnabled;
451}
452
453// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800454unsigned int getSize(int format, int width, int height, int usage,
455 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700456
Sushil Chauhan65e26302015-01-14 10:48:57 -0800457 if (isUBwcEnabled(format, usage)) {
458 return getUBwcSize(width, height, format, alignedw, alignedh);
459 }
460
461 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700462 switch (format) {
463 case HAL_PIXEL_FORMAT_RGBA_8888:
464 case HAL_PIXEL_FORMAT_RGBX_8888:
465 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700466 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700467 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700468 size = alignedw * alignedh * 4;
469 break;
470 case HAL_PIXEL_FORMAT_RGB_888:
471 size = alignedw * alignedh * 3;
472 break;
473 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700474 case HAL_PIXEL_FORMAT_RGBA_5551:
475 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400476 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700477 size = alignedw * alignedh * 2;
478 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700479 case HAL_PIXEL_FORMAT_RAW10:
480 size = ALIGN(alignedw * alignedh, 4096);
481 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700482
483 // adreno formats
484 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
485 size = ALIGN(alignedw*alignedh, 4096);
486 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
487 break;
488 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
489 // The chroma plane is subsampled,
490 // but the pitch in bytes is unchanged
491 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700492 size = ALIGN( alignedw * alignedh, 8192);
493 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
494 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700495 case HAL_PIXEL_FORMAT_YV12:
496 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
497 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800498 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700499 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400500 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700501 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700502 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700503 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800504 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
505 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400506 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800507 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700508 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
509 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700510 case HAL_PIXEL_FORMAT_YCbCr_422_I:
511 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700512 if(width & 1) {
513 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800514 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700515 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700516 size = ALIGN(alignedw * alignedh * 2, 4096);
517 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700518 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400519 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700520 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700521 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400522 case HAL_PIXEL_FORMAT_BLOB:
523 if(height != 1) {
524 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
525 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800526 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400527 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400528 size = width;
529 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700530 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700531 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
532 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500533 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
534 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
535 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
536 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
537 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
538 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
539 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
540 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
541 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
542 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
543 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
544 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
545 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
546 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
547 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
548 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
549 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
550 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
551 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
552 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
553 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
554 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
555 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
556 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
557 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
558 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
559 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800560 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500561 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
562 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700563 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800564 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800565 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700566 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700567 return size;
568}
569
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700570unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700571 int& alignedw, int &alignedh)
572{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700573 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700574
575 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
576 height,
577 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800578 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700579 alignedw,
580 alignedh);
581
Sushil Chauhan65e26302015-01-14 10:48:57 -0800582 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700583
584 return size;
585}
586
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700587
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700588unsigned int getBufferSizeAndDimensions(int width, int height, int format,
589 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700590{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700591 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700592
593 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
594 height,
595 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800596 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700597 alignedw,
598 alignedh);
599
Sushil Chauhan65e26302015-01-14 10:48:57 -0800600 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700601
602 return size;
603}
604
605
606void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700607 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700608{
609 tileEnabled = isMacroTileEnabled(format, usage);
610
611 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
612 height,
613 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800614 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700615 alignedw,
616 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800617 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700618}
619
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400620int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
621{
622 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700623 int width = hnd->width;
624 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700625 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800626 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700627
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400628 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
629
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700630 // Check metadata if the geometry has been updated.
631 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
632 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
633 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
634 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
635 }
636
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400637 // Get the chroma offsets from the handle width/height. We take advantage
638 // of the fact the width _is_ the stride
639 switch (hnd->format) {
640 //Semiplanar
641 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
642 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
643 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
644 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700645 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400646 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700647 ycbcr->cb = (void*)(hnd->base + ystride * height);
648 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400649 ycbcr->ystride = ystride;
650 ycbcr->cstride = cstride;
651 ycbcr->chroma_step = 2;
652 break;
653
Sushil Chauhan4686c972015-02-20 15:44:52 -0800654 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
655 // NV12_UBWC buffer has these 4 planes in the following sequence:
656 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
657 unsigned int y_meta_stride, y_meta_height, y_meta_size;
658 unsigned int y_stride, y_height, y_size;
659 unsigned int c_meta_stride, c_meta_height, c_meta_size;
660
661 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
662 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
663 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
664
665 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
666 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
667 y_size = ALIGN((y_stride * y_height), alignment);
668
669 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
670 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
671 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
672
673 ycbcr->y = (void*)(hnd->base + y_meta_size);
674 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
675 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
676 c_meta_size + 1);
677 ycbcr->ystride = y_stride;
678 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
679 ycbcr->chroma_step = 2;
680 break;
681
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400682 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
683 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
684 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
685 case HAL_PIXEL_FORMAT_NV21_ZSL:
686 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700687 case HAL_PIXEL_FORMAT_RAW10:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700688 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400689 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700690 ycbcr->cr = (void*)(hnd->base + ystride * height);
691 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400692 ycbcr->ystride = ystride;
693 ycbcr->cstride = cstride;
694 ycbcr->chroma_step = 2;
695 break;
696
697 //Planar
698 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700699 ystride = width;
700 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400701 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700702 ycbcr->cr = (void*)(hnd->base + ystride * height);
703 ycbcr->cb = (void*)(hnd->base + ystride * height +
704 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400705 ycbcr->ystride = ystride;
706 ycbcr->cstride = cstride;
707 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400708 break;
709 //Unsupported formats
710 case HAL_PIXEL_FORMAT_YCbCr_422_I:
711 case HAL_PIXEL_FORMAT_YCrCb_422_I:
712 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
713 default:
714 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
715 hnd->format);
716 err = -EINVAL;
717 }
718 return err;
719
720}
721
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700722
723
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700724// Allocate buffer from width, height and format into a
725// private_handle_t. It is the responsibility of the caller
726// to free the buffer using the free_buffer function
727int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
728{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700729 alloc_data data;
730 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700731 gralloc::IAllocController* sAlloc =
732 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700733 data.base = 0;
734 data.fd = -1;
735 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700736 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
737 alignedh);
738
Naseer Ahmed29a26812012-06-14 00:56:20 -0700739 data.align = getpagesize();
740 data.uncached = useUncached(usage);
741 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700742
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700743 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700744 if (0 != err) {
745 ALOGE("%s: allocate failed", __FUNCTION__);
746 return -ENOMEM;
747 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700748
Naseer Ahmed29a26812012-06-14 00:56:20 -0700749 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700750 data.allocType, 0, format,
751 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700752 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700753 hnd->offset = data.offset;
754 hnd->gpuaddr = 0;
755 *pHnd = hnd;
756 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700757}
758
759void free_buffer(private_handle_t *hnd)
760{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700761 gralloc::IAllocController* sAlloc =
762 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700763 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700764 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700765 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
766 }
767 if(hnd)
768 delete hnd;
769
770}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800771
772// UBWC helper functions
773static bool isUBwcFormat(int format)
774{
775 // Explicitly defined UBWC formats
776 switch(format)
777 {
778 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
779 return true;
780 default:
781 return false;
782 }
783}
784
785static bool isUBwcSupported(int format)
786{
787 // Existing HAL formats with UBWC support
788 switch(format)
789 {
790 case HAL_PIXEL_FORMAT_RGB_565:
791 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700792 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800793 case HAL_PIXEL_FORMAT_sRGB_A_8888:
794 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
795 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
796 return true;
797 default:
798 return false;
799 }
800}
801
802bool isUBwcEnabled(int format, int usage)
803{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800804 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
805 if (isUBwcFormat(format))
806 return true;
807
808 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
809 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
810 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
811 // Allow UBWC, only if CPU usage flags are not set
812 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800813 GRALLOC_USAGE_SW_WRITE_MASK))) {
814 return true;
815 }
816 }
817 return false;
818}
819
820static void getUBwcWidthAndHeight(int width, int height, int format,
821 int& aligned_w, int& aligned_h)
822{
823 switch (format)
824 {
825 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
826 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
827 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
828 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
829 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
830 break;
831 default:
832 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
833 aligned_w = 0;
834 aligned_h = 0;
835 break;
836 }
837}
838
839static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
840{
841 block_width = 0;
842 block_height = 0;
843
844 switch(bpp)
845 {
846 case 2:
847 case 4:
848 block_width = 16;
849 block_height = 4;
850 break;
851 case 8:
852 block_width = 8;
853 block_height = 4;
854 break;
855 case 16:
856 block_width = 4;
857 block_height = 4;
858 break;
859 default:
860 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
861 break;
862 }
863}
864
865static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
866{
867 unsigned int size = 0;
868 int meta_width, meta_height;
869 int block_width, block_height;
870
871 getUBwcBlockSize(bpp, block_width, block_height);
872
873 if (!block_width || !block_height) {
874 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
875 return size;
876 }
877
878 // Align meta buffer height to 16 blocks
879 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
880
881 // Align meta buffer width to 64 blocks
882 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
883
884 // Align meta buffer size to 4K
885 size = ((meta_width * meta_height), 4096);
886 return size;
887}
888
889static unsigned int getUBwcSize(int width, int height, int format,
890 const int alignedw, const int alignedh) {
891
892 unsigned int size = 0;
893 switch (format) {
894 case HAL_PIXEL_FORMAT_RGB_565:
895 size = alignedw * alignedh * 2;
896 size += getUBwcMetaBufferSize(width, height, 2);
897 break;
898 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700899 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800900 case HAL_PIXEL_FORMAT_sRGB_A_8888:
901 size = alignedw * alignedh * 4;
902 size += getUBwcMetaBufferSize(width, height, 4);
903 break;
904 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
905 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
906 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
907 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
908 break;
909 default:
910 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
911 break;
912 }
913 return size;
914}