blob: 4639e23c5549cd53b8c9759802d0e12e17fc611a [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Mansoor Aftabe9912a62014-07-15 01:40:26 -07002 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Shalaj Jain1f9725a2015-03-04 17:53:49 -080052#ifdef ION_FLAG_CP_PIXEL
53#define CP_HEAP_ID ION_SECURE_HEAP_ID
54#else
55#define ION_FLAG_CP_PIXEL 0
56#define CP_HEAP_ID ION_CP_MM_HEAP_ID
57#endif
58
59#ifndef ION_FLAG_ALLOW_NON_CONTIG
60#define ION_FLAG_ALLOW_NON_CONTIG 0
61#endif
62
Iliyan Malchev202a77d2012-06-11 14:41:12 -070063using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070064using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070065
Naomi Luisa44100c2013-02-08 12:42:03 -080066ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
67
Sushil Chauhan65e26302015-01-14 10:48:57 -080068static void getUBwcWidthAndHeight(int, int, int, int&, int&);
69static unsigned int getUBwcSize(int, int, int, const int, const int);
70
Iliyan Malchev202a77d2012-06-11 14:41:12 -070071//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070072
Saurabh Shah1adcafe2014-12-19 10:05:41 -080073/* The default policy is to return cached buffers unless the client explicity
74 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
75 * read or written in software. Any combination with a _RARELY_ flag will be
76 * treated as uncached. */
77static bool useUncached(const int& usage) {
78 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
79 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
80 GRALLOC_USAGE_SW_WRITE_RARELY) or
81 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
82 GRALLOC_USAGE_SW_READ_RARELY))
83 return true;
84
85 return false;
86}
87
Naomi Luisa44100c2013-02-08 12:42:03 -080088//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080089AdrenoMemInfo::AdrenoMemInfo()
90{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080091 LINK_adreno_compute_aligned_width_and_height = NULL;
92 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070093 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080094 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -080095 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080096
Naomi Luis01f5c8e2013-02-11 12:46:24 -080097 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
98 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080099 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700100 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
101 *(void **)&LINK_adreno_compute_padding =
102 ::dlsym(libadreno_utils, "compute_surface_padding");
103 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
104 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800105 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
106 ::dlsym(libadreno_utils,
107 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800108 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
109 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800110 }
111}
112
113AdrenoMemInfo::~AdrenoMemInfo()
114{
115 if (libadreno_utils) {
116 ::dlclose(libadreno_utils);
117 }
118}
119
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700120int AdrenoMemInfo::isMacroTilingSupportedByGPU()
121{
122 if ((libadreno_utils)) {
123 if(LINK_adreno_isMacroTilingSupportedByGpu) {
124 return LINK_adreno_isMacroTilingSupportedByGpu();
125 }
126 }
127 return 0;
128}
129
130
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800131void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800132 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800133{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800134
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800135 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700136 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800137 int tileEnabled = isMacroTileEnabled(format, usage);
138 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
139 height, format, tileEnabled, aligned_w, aligned_h);
140 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800141 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800142
143 if (isUBwcEnabled(format, usage)) {
144 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
145 return;
146 }
147
148 aligned_w = width;
149 aligned_h = height;
150 switch (format)
151 {
152 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
153 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
154 case HAL_PIXEL_FORMAT_RAW_SENSOR:
155 aligned_w = ALIGN(width, 32);
156 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700157 case HAL_PIXEL_FORMAT_RAW10:
158 aligned_w = ALIGN(width * 10 /8, 16);
159 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800160 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
161 aligned_w = ALIGN(width, 128);
162 break;
163 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
164 case HAL_PIXEL_FORMAT_YV12:
165 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
166 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
167 case HAL_PIXEL_FORMAT_YCbCr_422_I:
168 case HAL_PIXEL_FORMAT_YCrCb_422_I:
169 aligned_w = ALIGN(width, 16);
170 break;
171 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
172 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
173 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
174 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
175 break;
176 case HAL_PIXEL_FORMAT_BLOB:
177 break;
178 case HAL_PIXEL_FORMAT_NV21_ZSL:
179 aligned_w = ALIGN(width, 64);
180 aligned_h = ALIGN(height, 64);
181 break;
182 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
183 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
184 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
185 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
186 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
187 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
188 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
189 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
199 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
200 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
201 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
202 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
203 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
204 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
205 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
206 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
207 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
208 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
209 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
210 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
211 int bytesPerPixel = 0;
212 int raster_mode = 0; //Adreno unknown raster mode.
213 int padding_threshold = 512; //Threshold for padding
214 //surfaces.
215
216 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
217 width, height, format, 0,raster_mode, padding_threshold,
218 &aligned_w, &aligned_h, &bytesPerPixel);
219 } else {
220 ALOGW("%s: Warning!! Symbols" \
221 " compute_compressedfmt_aligned_width_and_height" \
222 " not found", __FUNCTION__);
223 }
224 break;
225 default: break;
226 }
227}
228
229void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
230 int tile_enabled, int& aligned_w, int& aligned_h)
231{
232 aligned_w = ALIGN(width, 32);
233 aligned_h = ALIGN(height, 32);
234
235 // Don't add any additional padding if debug.gralloc.map_fb_memory
236 // is enabled
237 char property[PROPERTY_VALUE_MAX];
238 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
239 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
240 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
241 return;
242 }
243
244 int bpp = 4;
245 switch(format)
246 {
247 case HAL_PIXEL_FORMAT_RGB_888:
248 bpp = 3;
249 break;
250 case HAL_PIXEL_FORMAT_RGB_565:
251 case HAL_PIXEL_FORMAT_RGBA_5551:
252 case HAL_PIXEL_FORMAT_RGBA_4444:
253 bpp = 2;
254 break;
255 default: break;
256 }
257
258 if (libadreno_utils) {
259 int raster_mode = 0; // Adreno unknown raster mode.
260 int padding_threshold = 512; // Threshold for padding surfaces.
261 // the function below computes aligned width and aligned height
262 // based on linear or macro tile mode selected.
263 if(LINK_adreno_compute_aligned_width_and_height) {
264 LINK_adreno_compute_aligned_width_and_height(width,
265 height, bpp, tile_enabled,
266 raster_mode, padding_threshold,
267 &aligned_w, &aligned_h);
268
269 } else if(LINK_adreno_compute_padding) {
270 int surface_tile_height = 1; // Linear surface
271 aligned_w = LINK_adreno_compute_padding(width, bpp,
272 surface_tile_height, raster_mode,
273 padding_threshold);
274 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
275 __FUNCTION__);
276 } else {
277 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
278 "compute_aligned_width_and_height not found", __FUNCTION__);
279 }
280 }
281}
282
283int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
284{
Sushil Chauhan082acd62015-01-14 16:49:29 -0800285 if (libadreno_utils) {
286 if (LINK_adreno_isUBWCSupportedByGpu) {
287 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
288 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
289 }
290 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800291 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800292}
293
Sushil Chauhan082acd62015-01-14 16:49:29 -0800294ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
295{
296 switch (hal_format) {
297 case HAL_PIXEL_FORMAT_RGBA_8888:
298 return ADRENO_PIXELFORMAT_R8G8B8A8;
299 case HAL_PIXEL_FORMAT_RGB_565:
300 return ADRENO_PIXELFORMAT_B5G6R5;
301 case HAL_PIXEL_FORMAT_sRGB_A_8888:
302 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
303 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800304 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800305 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
306 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800307 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800308 default:
309 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
310 break;
311 }
312 return ADRENO_PIXELFORMAT_UNKNOWN;
313}
314
Naomi Luisa44100c2013-02-08 12:42:03 -0800315//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700316IAllocController* IAllocController::sController = NULL;
317IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700318{
319 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700320 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700321 }
322 return sController;
323}
324
325
326//-------------- IonController-----------------------//
327IonController::IonController()
328{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530329 allocateIonMem();
330}
331
332void IonController::allocateIonMem()
333{
334 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700335}
336
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700337int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700338{
339 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500340 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700341 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700342
343 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700344 data.allocType = 0;
345
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530346 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530347 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800348 ionHeapId = ION_HEAP(CP_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500349 ionFlags |= ION_SECURE;
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800350 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
351 /*
352 * There is currently no flag in ION for Secure Display
353 * VM. Please add it here once available.
354 *
355 ionFlags |= <Ion flag for Secure Display>;
356 */
357 } else {
358 ionFlags |= ION_FLAG_CP_PIXEL;
359 }
360
Shalaj Jain13cdf812014-12-02 16:20:54 -0800361 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
362 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
363 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530364 } else {
365 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500366 // do not set ion secure flag & MM heap. Fallback to system heap.
367 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530368 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500369 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530370 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
371 //MM Heap is exclusively a secure heap.
372 //If it is used for non secure cases, fallback to IOMMU heap
373 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
374 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500375 trying to use system heap instead !!");
376 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500377 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700378
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700379 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500380 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700381
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700382 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500383 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700384
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530385 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500386 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700387
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500388 // if no ion heap flags are set, default to system heap
389 if(!ionHeapId)
390 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700391
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500392 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700393 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500394 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700395 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700396
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700397 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700398 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500399 } else {
400 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
401 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700402 }
403
404 return ret;
405}
406
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700407IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700408{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700409 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700410 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
411 memalloc = mIonAlloc;
412 } else {
413 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
414 }
415
416 return memalloc;
417}
418
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700419bool isMacroTileEnabled(int format, int usage)
420{
421 bool tileEnabled = false;
422
423 // Check whether GPU & MDSS supports MacroTiling feature
424 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
425 qdutils::MDPVersion::getInstance().supportsMacroTile())
426 {
427 // check the format
428 switch(format)
429 {
430 case HAL_PIXEL_FORMAT_RGBA_8888:
431 case HAL_PIXEL_FORMAT_RGBX_8888:
432 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800433 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700434 {
435 tileEnabled = true;
436 // check the usage flags
437 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
438 GRALLOC_USAGE_SW_WRITE_MASK)) {
439 // Application intends to use CPU for rendering
440 tileEnabled = false;
441 }
442 break;
443 }
444 default:
445 break;
446 }
447 }
448 return tileEnabled;
449}
450
451// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800452unsigned int getSize(int format, int width, int height, int usage,
453 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700454
Sushil Chauhan65e26302015-01-14 10:48:57 -0800455 if (isUBwcEnabled(format, usage)) {
456 return getUBwcSize(width, height, format, alignedw, alignedh);
457 }
458
459 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700460 switch (format) {
461 case HAL_PIXEL_FORMAT_RGBA_8888:
462 case HAL_PIXEL_FORMAT_RGBX_8888:
463 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700464 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700465 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700466 size = alignedw * alignedh * 4;
467 break;
468 case HAL_PIXEL_FORMAT_RGB_888:
469 size = alignedw * alignedh * 3;
470 break;
471 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700472 case HAL_PIXEL_FORMAT_RGBA_5551:
473 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400474 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700475 size = alignedw * alignedh * 2;
476 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700477 case HAL_PIXEL_FORMAT_RAW10:
478 size = ALIGN(alignedw * alignedh, 4096);
479 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700480
481 // adreno formats
482 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
483 size = ALIGN(alignedw*alignedh, 4096);
484 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
485 break;
486 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
487 // The chroma plane is subsampled,
488 // but the pitch in bytes is unchanged
489 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700490 size = ALIGN( alignedw * alignedh, 8192);
491 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
492 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700493 case HAL_PIXEL_FORMAT_YV12:
494 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
495 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800496 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700497 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400498 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700499 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700500 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700501 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800502 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
503 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400504 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800505 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700506 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
507 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700508 case HAL_PIXEL_FORMAT_YCbCr_422_I:
509 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700510 if(width & 1) {
511 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800512 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700513 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700514 size = ALIGN(alignedw * alignedh * 2, 4096);
515 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700516 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400517 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700518 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700519 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400520 case HAL_PIXEL_FORMAT_BLOB:
521 if(height != 1) {
522 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
523 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800524 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400525 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400526 size = width;
527 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700528 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700529 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
530 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500531 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
532 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
533 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
534 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
535 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
536 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
537 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
538 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
539 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
540 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
541 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
542 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
543 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
544 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
545 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
546 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
547 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
548 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
549 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
550 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
551 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
552 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
553 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
554 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
555 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
556 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
557 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800558 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500559 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
560 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700561 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800562 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800563 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700564 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700565 return size;
566}
567
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700568unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700569 int& alignedw, int &alignedh)
570{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700571 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700572
573 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
574 height,
575 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800576 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700577 alignedw,
578 alignedh);
579
Sushil Chauhan65e26302015-01-14 10:48:57 -0800580 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700581
582 return size;
583}
584
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700585
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700586unsigned int getBufferSizeAndDimensions(int width, int height, int format,
587 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700588{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700589 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700590
591 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
592 height,
593 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800594 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700595 alignedw,
596 alignedh);
597
Sushil Chauhan65e26302015-01-14 10:48:57 -0800598 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700599
600 return size;
601}
602
603
604void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700605 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700606{
607 tileEnabled = isMacroTileEnabled(format, usage);
608
609 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
610 height,
611 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800612 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700613 alignedw,
614 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800615 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700616}
617
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400618int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
619{
620 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700621 int width = hnd->width;
622 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700623 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800624 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700625
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400626 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
627
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700628 // Check metadata if the geometry has been updated.
629 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
630 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
631 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
632 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
633 }
634
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400635 // Get the chroma offsets from the handle width/height. We take advantage
636 // of the fact the width _is_ the stride
637 switch (hnd->format) {
638 //Semiplanar
639 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
640 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
641 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
642 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700643 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400644 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700645 ycbcr->cb = (void*)(hnd->base + ystride * height);
646 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400647 ycbcr->ystride = ystride;
648 ycbcr->cstride = cstride;
649 ycbcr->chroma_step = 2;
650 break;
651
Sushil Chauhan4686c972015-02-20 15:44:52 -0800652 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
653 // NV12_UBWC buffer has these 4 planes in the following sequence:
654 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
655 unsigned int y_meta_stride, y_meta_height, y_meta_size;
656 unsigned int y_stride, y_height, y_size;
657 unsigned int c_meta_stride, c_meta_height, c_meta_size;
658
659 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
660 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
661 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
662
663 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
664 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
665 y_size = ALIGN((y_stride * y_height), alignment);
666
667 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
668 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
669 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
670
671 ycbcr->y = (void*)(hnd->base + y_meta_size);
672 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
673 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
674 c_meta_size + 1);
675 ycbcr->ystride = y_stride;
676 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
677 ycbcr->chroma_step = 2;
678 break;
679
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400680 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
681 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
682 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
683 case HAL_PIXEL_FORMAT_NV21_ZSL:
684 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700685 case HAL_PIXEL_FORMAT_RAW10:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700686 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400687 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700688 ycbcr->cr = (void*)(hnd->base + ystride * height);
689 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400690 ycbcr->ystride = ystride;
691 ycbcr->cstride = cstride;
692 ycbcr->chroma_step = 2;
693 break;
694
695 //Planar
696 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700697 ystride = width;
698 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400699 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700700 ycbcr->cr = (void*)(hnd->base + ystride * height);
701 ycbcr->cb = (void*)(hnd->base + ystride * height +
702 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400703 ycbcr->ystride = ystride;
704 ycbcr->cstride = cstride;
705 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400706 break;
707 //Unsupported formats
708 case HAL_PIXEL_FORMAT_YCbCr_422_I:
709 case HAL_PIXEL_FORMAT_YCrCb_422_I:
710 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
711 default:
712 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
713 hnd->format);
714 err = -EINVAL;
715 }
716 return err;
717
718}
719
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700720
721
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700722// Allocate buffer from width, height and format into a
723// private_handle_t. It is the responsibility of the caller
724// to free the buffer using the free_buffer function
725int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
726{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700727 alloc_data data;
728 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700729 gralloc::IAllocController* sAlloc =
730 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700731 data.base = 0;
732 data.fd = -1;
733 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700734 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
735 alignedh);
736
Naseer Ahmed29a26812012-06-14 00:56:20 -0700737 data.align = getpagesize();
738 data.uncached = useUncached(usage);
739 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700740
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700741 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700742 if (0 != err) {
743 ALOGE("%s: allocate failed", __FUNCTION__);
744 return -ENOMEM;
745 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700746
Naseer Ahmed29a26812012-06-14 00:56:20 -0700747 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700748 data.allocType, 0, format,
749 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700750 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700751 hnd->offset = data.offset;
752 hnd->gpuaddr = 0;
753 *pHnd = hnd;
754 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700755}
756
757void free_buffer(private_handle_t *hnd)
758{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700759 gralloc::IAllocController* sAlloc =
760 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700761 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700762 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700763 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
764 }
765 if(hnd)
766 delete hnd;
767
768}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800769
770// UBWC helper functions
771static bool isUBwcFormat(int format)
772{
773 // Explicitly defined UBWC formats
774 switch(format)
775 {
776 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
777 return true;
778 default:
779 return false;
780 }
781}
782
783static bool isUBwcSupported(int format)
784{
785 // Existing HAL formats with UBWC support
786 switch(format)
787 {
788 case HAL_PIXEL_FORMAT_RGB_565:
789 case HAL_PIXEL_FORMAT_RGBA_8888:
790 case HAL_PIXEL_FORMAT_sRGB_A_8888:
791 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
792 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
793 return true;
794 default:
795 return false;
796 }
797}
798
799bool isUBwcEnabled(int format, int usage)
800{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800801 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
802 if (isUBwcFormat(format))
803 return true;
804
805 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
806 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
807 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
808 // Allow UBWC, only if CPU usage flags are not set
809 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800810 GRALLOC_USAGE_SW_WRITE_MASK))) {
811 return true;
812 }
813 }
814 return false;
815}
816
817static void getUBwcWidthAndHeight(int width, int height, int format,
818 int& aligned_w, int& aligned_h)
819{
820 switch (format)
821 {
822 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
823 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
824 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
825 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
826 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
827 break;
828 default:
829 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
830 aligned_w = 0;
831 aligned_h = 0;
832 break;
833 }
834}
835
836static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
837{
838 block_width = 0;
839 block_height = 0;
840
841 switch(bpp)
842 {
843 case 2:
844 case 4:
845 block_width = 16;
846 block_height = 4;
847 break;
848 case 8:
849 block_width = 8;
850 block_height = 4;
851 break;
852 case 16:
853 block_width = 4;
854 block_height = 4;
855 break;
856 default:
857 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
858 break;
859 }
860}
861
862static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
863{
864 unsigned int size = 0;
865 int meta_width, meta_height;
866 int block_width, block_height;
867
868 getUBwcBlockSize(bpp, block_width, block_height);
869
870 if (!block_width || !block_height) {
871 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
872 return size;
873 }
874
875 // Align meta buffer height to 16 blocks
876 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
877
878 // Align meta buffer width to 64 blocks
879 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
880
881 // Align meta buffer size to 4K
882 size = ((meta_width * meta_height), 4096);
883 return size;
884}
885
886static unsigned int getUBwcSize(int width, int height, int format,
887 const int alignedw, const int alignedh) {
888
889 unsigned int size = 0;
890 switch (format) {
891 case HAL_PIXEL_FORMAT_RGB_565:
892 size = alignedw * alignedh * 2;
893 size += getUBwcMetaBufferSize(width, height, 2);
894 break;
895 case HAL_PIXEL_FORMAT_RGBA_8888:
896 case HAL_PIXEL_FORMAT_sRGB_A_8888:
897 size = alignedw * alignedh * 4;
898 size += getUBwcMetaBufferSize(width, height, 4);
899 break;
900 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
901 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
902 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
903 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
904 break;
905 default:
906 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
907 break;
908 }
909 return size;
910}
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700911
912int getRgbDataAddress(private_handle_t* hnd, void* rgb_data)
913{
914 int err = 0;
915
916 // This api is for RGB* formats
917 if (hnd->format > HAL_PIXEL_FORMAT_sRGB_X_8888) {
918 return -EINVAL;
919 }
920
921 // linear buffer
922 if (!(hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED)) {
923 rgb_data = (void*)hnd->base;
924 return err;
925 }
926
927 unsigned int meta_size = 0;
928 switch (hnd->format) {
929 case HAL_PIXEL_FORMAT_RGB_565:
930 meta_size = getUBwcMetaBufferSize(hnd->width, hnd->height, 2);
931 break;
932 case HAL_PIXEL_FORMAT_RGBA_8888:
933 case HAL_PIXEL_FORMAT_RGBX_8888:
934 case HAL_PIXEL_FORMAT_sRGB_A_8888:
935 meta_size = getUBwcMetaBufferSize(hnd->width, hnd->height, 4);
936 break;
937 default:
938 ALOGE("%s:Unsupported RGB format: 0x%x", __FUNCTION__, hnd->format);
939 err = -EINVAL;
940 break;
941 }
942
943 rgb_data = (void*)(hnd->base + meta_size);
944 return err;
945}