blob: 5a4cdba6ba8bb5eb88b2911eb80279d68c3afc43 [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Mansoor Aftabe9912a62014-07-15 01:40:26 -07002 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Shalaj Jain1f9725a2015-03-04 17:53:49 -080052#ifdef ION_FLAG_CP_PIXEL
53#define CP_HEAP_ID ION_SECURE_HEAP_ID
54#else
55#define ION_FLAG_CP_PIXEL 0
56#define CP_HEAP_ID ION_CP_MM_HEAP_ID
57#endif
58
59#ifndef ION_FLAG_ALLOW_NON_CONTIG
60#define ION_FLAG_ALLOW_NON_CONTIG 0
61#endif
62
Iliyan Malchev202a77d2012-06-11 14:41:12 -070063using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070064using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070065
Naomi Luisa44100c2013-02-08 12:42:03 -080066ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
67
Sushil Chauhan65e26302015-01-14 10:48:57 -080068static void getUBwcWidthAndHeight(int, int, int, int&, int&);
69static unsigned int getUBwcSize(int, int, int, const int, const int);
70
Iliyan Malchev202a77d2012-06-11 14:41:12 -070071//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070072
Saurabh Shah1adcafe2014-12-19 10:05:41 -080073/* The default policy is to return cached buffers unless the client explicity
74 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
75 * read or written in software. Any combination with a _RARELY_ flag will be
76 * treated as uncached. */
77static bool useUncached(const int& usage) {
78 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
79 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
80 GRALLOC_USAGE_SW_WRITE_RARELY) or
81 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
82 GRALLOC_USAGE_SW_READ_RARELY))
83 return true;
84
85 return false;
86}
87
Naomi Luisa44100c2013-02-08 12:42:03 -080088//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080089AdrenoMemInfo::AdrenoMemInfo()
90{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080091 LINK_adreno_compute_aligned_width_and_height = NULL;
92 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070093 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080094 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -080095 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080096
Naomi Luis01f5c8e2013-02-11 12:46:24 -080097 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
98 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080099 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700100 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
101 *(void **)&LINK_adreno_compute_padding =
102 ::dlsym(libadreno_utils, "compute_surface_padding");
103 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
104 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800105 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
106 ::dlsym(libadreno_utils,
107 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800108 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
109 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800110 }
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700111
112 // Check if the overriding property debug.gralloc.gfx_ubwc_disable
113 // that disables UBWC allocations for the graphics stack is set
114 gfx_ubwc_disable = 0;
115 char property[PROPERTY_VALUE_MAX];
116 property_get("debug.gralloc.gfx_ubwc_disable", property, "0");
117 if(!(strncmp(property, "1", PROPERTY_VALUE_MAX)) ||
118 !(strncmp(property, "true", PROPERTY_VALUE_MAX))) {
119 gfx_ubwc_disable = 1;
120 }
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800121}
122
123AdrenoMemInfo::~AdrenoMemInfo()
124{
125 if (libadreno_utils) {
126 ::dlclose(libadreno_utils);
127 }
128}
129
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700130int AdrenoMemInfo::isMacroTilingSupportedByGPU()
131{
132 if ((libadreno_utils)) {
133 if(LINK_adreno_isMacroTilingSupportedByGpu) {
134 return LINK_adreno_isMacroTilingSupportedByGpu();
135 }
136 }
137 return 0;
138}
139
140
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800141void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800142 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800143{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800144
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800145 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700146 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800147 int tileEnabled = isMacroTileEnabled(format, usage);
148 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
149 height, format, tileEnabled, aligned_w, aligned_h);
150 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800151 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800152
153 if (isUBwcEnabled(format, usage)) {
154 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
155 return;
156 }
157
158 aligned_w = width;
159 aligned_h = height;
160 switch (format)
161 {
162 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
163 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
164 case HAL_PIXEL_FORMAT_RAW_SENSOR:
165 aligned_w = ALIGN(width, 32);
166 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700167 case HAL_PIXEL_FORMAT_RAW10:
168 aligned_w = ALIGN(width * 10 /8, 16);
169 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800170 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
171 aligned_w = ALIGN(width, 128);
172 break;
173 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
174 case HAL_PIXEL_FORMAT_YV12:
175 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
176 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
177 case HAL_PIXEL_FORMAT_YCbCr_422_I:
178 case HAL_PIXEL_FORMAT_YCrCb_422_I:
179 aligned_w = ALIGN(width, 16);
180 break;
181 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
182 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
183 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
184 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
185 break;
186 case HAL_PIXEL_FORMAT_BLOB:
187 break;
188 case HAL_PIXEL_FORMAT_NV21_ZSL:
189 aligned_w = ALIGN(width, 64);
190 aligned_h = ALIGN(height, 64);
191 break;
192 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
199 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
200 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
201 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
202 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
203 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
204 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
205 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
206 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
207 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
208 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
209 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
210 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
211 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
212 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
213 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
214 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
215 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
216 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
217 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
218 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
219 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
220 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
221 int bytesPerPixel = 0;
222 int raster_mode = 0; //Adreno unknown raster mode.
223 int padding_threshold = 512; //Threshold for padding
224 //surfaces.
225
226 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
227 width, height, format, 0,raster_mode, padding_threshold,
228 &aligned_w, &aligned_h, &bytesPerPixel);
229 } else {
230 ALOGW("%s: Warning!! Symbols" \
231 " compute_compressedfmt_aligned_width_and_height" \
232 " not found", __FUNCTION__);
233 }
234 break;
235 default: break;
236 }
237}
238
239void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
240 int tile_enabled, int& aligned_w, int& aligned_h)
241{
242 aligned_w = ALIGN(width, 32);
243 aligned_h = ALIGN(height, 32);
244
245 // Don't add any additional padding if debug.gralloc.map_fb_memory
246 // is enabled
247 char property[PROPERTY_VALUE_MAX];
248 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
249 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
250 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
251 return;
252 }
253
254 int bpp = 4;
255 switch(format)
256 {
257 case HAL_PIXEL_FORMAT_RGB_888:
258 bpp = 3;
259 break;
260 case HAL_PIXEL_FORMAT_RGB_565:
261 case HAL_PIXEL_FORMAT_RGBA_5551:
262 case HAL_PIXEL_FORMAT_RGBA_4444:
263 bpp = 2;
264 break;
265 default: break;
266 }
267
268 if (libadreno_utils) {
269 int raster_mode = 0; // Adreno unknown raster mode.
270 int padding_threshold = 512; // Threshold for padding surfaces.
271 // the function below computes aligned width and aligned height
272 // based on linear or macro tile mode selected.
273 if(LINK_adreno_compute_aligned_width_and_height) {
274 LINK_adreno_compute_aligned_width_and_height(width,
275 height, bpp, tile_enabled,
276 raster_mode, padding_threshold,
277 &aligned_w, &aligned_h);
278
279 } else if(LINK_adreno_compute_padding) {
280 int surface_tile_height = 1; // Linear surface
281 aligned_w = LINK_adreno_compute_padding(width, bpp,
282 surface_tile_height, raster_mode,
283 padding_threshold);
284 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
285 __FUNCTION__);
286 } else {
287 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
288 "compute_aligned_width_and_height not found", __FUNCTION__);
289 }
290 }
291}
292
293int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
294{
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700295 if (!gfx_ubwc_disable && libadreno_utils) {
Sushil Chauhan082acd62015-01-14 16:49:29 -0800296 if (LINK_adreno_isUBWCSupportedByGpu) {
297 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
298 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
299 }
300 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800301 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800302}
303
Sushil Chauhan082acd62015-01-14 16:49:29 -0800304ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
305{
306 switch (hal_format) {
307 case HAL_PIXEL_FORMAT_RGBA_8888:
308 return ADRENO_PIXELFORMAT_R8G8B8A8;
309 case HAL_PIXEL_FORMAT_RGB_565:
310 return ADRENO_PIXELFORMAT_B5G6R5;
311 case HAL_PIXEL_FORMAT_sRGB_A_8888:
312 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
313 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800314 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800315 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
316 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800317 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800318 default:
319 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
320 break;
321 }
322 return ADRENO_PIXELFORMAT_UNKNOWN;
323}
324
Naomi Luisa44100c2013-02-08 12:42:03 -0800325//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700326IAllocController* IAllocController::sController = NULL;
327IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700328{
329 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700330 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700331 }
332 return sController;
333}
334
335
336//-------------- IonController-----------------------//
337IonController::IonController()
338{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530339 allocateIonMem();
340}
341
342void IonController::allocateIonMem()
343{
344 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700345}
346
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700347int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700348{
349 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500350 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700351 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700352
353 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700354 data.allocType = 0;
355
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530356 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530357 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800358 ionHeapId = ION_HEAP(CP_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500359 ionFlags |= ION_SECURE;
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800360 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
361 /*
362 * There is currently no flag in ION for Secure Display
363 * VM. Please add it here once available.
364 *
365 ionFlags |= <Ion flag for Secure Display>;
366 */
367 } else {
368 ionFlags |= ION_FLAG_CP_PIXEL;
369 }
370
Shalaj Jain13cdf812014-12-02 16:20:54 -0800371 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
372 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
373 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530374 } else {
375 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500376 // do not set ion secure flag & MM heap. Fallback to system heap.
377 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530378 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500379 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530380 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
381 //MM Heap is exclusively a secure heap.
382 //If it is used for non secure cases, fallback to IOMMU heap
383 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
384 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500385 trying to use system heap instead !!");
386 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500387 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700388
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700389 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500390 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700391
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700392 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500393 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700394
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530395 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500396 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700397
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500398 // if no ion heap flags are set, default to system heap
399 if(!ionHeapId)
400 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700401
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500402 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700403 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500404 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700405 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700406
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700407 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700408 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500409 } else {
410 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
411 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700412 }
413
414 return ret;
415}
416
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700417IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700418{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700419 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700420 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
421 memalloc = mIonAlloc;
422 } else {
423 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
424 }
425
426 return memalloc;
427}
428
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700429bool isMacroTileEnabled(int format, int usage)
430{
431 bool tileEnabled = false;
432
433 // Check whether GPU & MDSS supports MacroTiling feature
434 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
435 qdutils::MDPVersion::getInstance().supportsMacroTile())
436 {
437 // check the format
438 switch(format)
439 {
440 case HAL_PIXEL_FORMAT_RGBA_8888:
441 case HAL_PIXEL_FORMAT_RGBX_8888:
442 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800443 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700444 {
445 tileEnabled = true;
446 // check the usage flags
447 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
448 GRALLOC_USAGE_SW_WRITE_MASK)) {
449 // Application intends to use CPU for rendering
450 tileEnabled = false;
451 }
452 break;
453 }
454 default:
455 break;
456 }
457 }
458 return tileEnabled;
459}
460
461// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800462unsigned int getSize(int format, int width, int height, int usage,
463 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700464
Sushil Chauhan65e26302015-01-14 10:48:57 -0800465 if (isUBwcEnabled(format, usage)) {
466 return getUBwcSize(width, height, format, alignedw, alignedh);
467 }
468
469 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700470 switch (format) {
471 case HAL_PIXEL_FORMAT_RGBA_8888:
472 case HAL_PIXEL_FORMAT_RGBX_8888:
473 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700474 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700475 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700476 size = alignedw * alignedh * 4;
477 break;
478 case HAL_PIXEL_FORMAT_RGB_888:
479 size = alignedw * alignedh * 3;
480 break;
481 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700482 case HAL_PIXEL_FORMAT_RGBA_5551:
483 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400484 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700485 size = alignedw * alignedh * 2;
486 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700487 case HAL_PIXEL_FORMAT_RAW10:
488 size = ALIGN(alignedw * alignedh, 4096);
489 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700490
491 // adreno formats
492 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
493 size = ALIGN(alignedw*alignedh, 4096);
494 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
495 break;
496 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
497 // The chroma plane is subsampled,
498 // but the pitch in bytes is unchanged
499 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700500 size = ALIGN( alignedw * alignedh, 8192);
501 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
502 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700503 case HAL_PIXEL_FORMAT_YV12:
504 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
505 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800506 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700507 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400508 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700509 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700510 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700511 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800512 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
513 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400514 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800515 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700516 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
517 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700518 case HAL_PIXEL_FORMAT_YCbCr_422_I:
519 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700520 if(width & 1) {
521 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800522 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700523 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700524 size = ALIGN(alignedw * alignedh * 2, 4096);
525 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700526 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400527 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700528 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700529 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400530 case HAL_PIXEL_FORMAT_BLOB:
531 if(height != 1) {
532 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
533 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800534 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400535 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400536 size = width;
537 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700538 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700539 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
540 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500541 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
542 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
543 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
544 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
545 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
546 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
547 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
548 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
549 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
550 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
551 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
552 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
553 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
554 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
555 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
556 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
557 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
558 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
559 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
560 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
561 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
562 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
563 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
564 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
565 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
566 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
567 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800568 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500569 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
570 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700571 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800572 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800573 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700574 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700575 return size;
576}
577
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700578unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700579 int& alignedw, int &alignedh)
580{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700581 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700582
583 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
584 height,
585 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800586 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700587 alignedw,
588 alignedh);
589
Sushil Chauhan65e26302015-01-14 10:48:57 -0800590 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700591
592 return size;
593}
594
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700595
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700596unsigned int getBufferSizeAndDimensions(int width, int height, int format,
597 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700598{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700599 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700600
601 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
602 height,
603 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800604 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700605 alignedw,
606 alignedh);
607
Sushil Chauhan65e26302015-01-14 10:48:57 -0800608 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700609
610 return size;
611}
612
613
614void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700615 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700616{
617 tileEnabled = isMacroTileEnabled(format, usage);
618
619 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
620 height,
621 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800622 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700623 alignedw,
624 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800625 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700626}
627
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400628int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
629{
630 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700631 int width = hnd->width;
632 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700633 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800634 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700635
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400636 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
637
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700638 // Check metadata if the geometry has been updated.
639 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
640 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
641 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
642 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
643 }
644
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400645 // Get the chroma offsets from the handle width/height. We take advantage
646 // of the fact the width _is_ the stride
647 switch (hnd->format) {
648 //Semiplanar
649 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
650 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
651 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
652 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700653 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400654 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700655 ycbcr->cb = (void*)(hnd->base + ystride * height);
656 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400657 ycbcr->ystride = ystride;
658 ycbcr->cstride = cstride;
659 ycbcr->chroma_step = 2;
660 break;
661
Sushil Chauhan4686c972015-02-20 15:44:52 -0800662 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
663 // NV12_UBWC buffer has these 4 planes in the following sequence:
664 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
665 unsigned int y_meta_stride, y_meta_height, y_meta_size;
666 unsigned int y_stride, y_height, y_size;
667 unsigned int c_meta_stride, c_meta_height, c_meta_size;
668
669 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
670 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
671 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
672
673 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
674 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
675 y_size = ALIGN((y_stride * y_height), alignment);
676
677 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
678 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
679 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
680
681 ycbcr->y = (void*)(hnd->base + y_meta_size);
682 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
683 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
684 c_meta_size + 1);
685 ycbcr->ystride = y_stride;
686 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
687 ycbcr->chroma_step = 2;
688 break;
689
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400690 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
691 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
692 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
693 case HAL_PIXEL_FORMAT_NV21_ZSL:
694 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700695 case HAL_PIXEL_FORMAT_RAW10:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700696 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400697 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700698 ycbcr->cr = (void*)(hnd->base + ystride * height);
699 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400700 ycbcr->ystride = ystride;
701 ycbcr->cstride = cstride;
702 ycbcr->chroma_step = 2;
703 break;
704
705 //Planar
706 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700707 ystride = width;
708 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400709 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700710 ycbcr->cr = (void*)(hnd->base + ystride * height);
711 ycbcr->cb = (void*)(hnd->base + ystride * height +
712 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400713 ycbcr->ystride = ystride;
714 ycbcr->cstride = cstride;
715 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400716 break;
717 //Unsupported formats
718 case HAL_PIXEL_FORMAT_YCbCr_422_I:
719 case HAL_PIXEL_FORMAT_YCrCb_422_I:
720 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
721 default:
722 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
723 hnd->format);
724 err = -EINVAL;
725 }
726 return err;
727
728}
729
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700730
731
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700732// Allocate buffer from width, height and format into a
733// private_handle_t. It is the responsibility of the caller
734// to free the buffer using the free_buffer function
735int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
736{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700737 alloc_data data;
738 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700739 gralloc::IAllocController* sAlloc =
740 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700741 data.base = 0;
742 data.fd = -1;
743 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700744 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
745 alignedh);
746
Naseer Ahmed29a26812012-06-14 00:56:20 -0700747 data.align = getpagesize();
748 data.uncached = useUncached(usage);
749 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700750
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700751 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700752 if (0 != err) {
753 ALOGE("%s: allocate failed", __FUNCTION__);
754 return -ENOMEM;
755 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700756
Naseer Ahmed29a26812012-06-14 00:56:20 -0700757 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700758 data.allocType, 0, format,
759 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700760 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700761 hnd->offset = data.offset;
762 hnd->gpuaddr = 0;
763 *pHnd = hnd;
764 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700765}
766
767void free_buffer(private_handle_t *hnd)
768{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700769 gralloc::IAllocController* sAlloc =
770 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700771 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700772 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700773 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
774 }
775 if(hnd)
776 delete hnd;
777
778}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800779
780// UBWC helper functions
781static bool isUBwcFormat(int format)
782{
783 // Explicitly defined UBWC formats
784 switch(format)
785 {
786 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
787 return true;
788 default:
789 return false;
790 }
791}
792
793static bool isUBwcSupported(int format)
794{
795 // Existing HAL formats with UBWC support
796 switch(format)
797 {
798 case HAL_PIXEL_FORMAT_RGB_565:
799 case HAL_PIXEL_FORMAT_RGBA_8888:
800 case HAL_PIXEL_FORMAT_sRGB_A_8888:
801 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
802 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
803 return true;
804 default:
805 return false;
806 }
807}
808
809bool isUBwcEnabled(int format, int usage)
810{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800811 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
812 if (isUBwcFormat(format))
813 return true;
814
815 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
816 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
817 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
818 // Allow UBWC, only if CPU usage flags are not set
819 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800820 GRALLOC_USAGE_SW_WRITE_MASK))) {
821 return true;
822 }
823 }
824 return false;
825}
826
827static void getUBwcWidthAndHeight(int width, int height, int format,
828 int& aligned_w, int& aligned_h)
829{
830 switch (format)
831 {
832 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
833 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
834 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
835 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
836 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
837 break;
838 default:
839 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
840 aligned_w = 0;
841 aligned_h = 0;
842 break;
843 }
844}
845
846static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
847{
848 block_width = 0;
849 block_height = 0;
850
851 switch(bpp)
852 {
853 case 2:
854 case 4:
855 block_width = 16;
856 block_height = 4;
857 break;
858 case 8:
859 block_width = 8;
860 block_height = 4;
861 break;
862 case 16:
863 block_width = 4;
864 block_height = 4;
865 break;
866 default:
867 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
868 break;
869 }
870}
871
872static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
873{
874 unsigned int size = 0;
875 int meta_width, meta_height;
876 int block_width, block_height;
877
878 getUBwcBlockSize(bpp, block_width, block_height);
879
880 if (!block_width || !block_height) {
881 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
882 return size;
883 }
884
885 // Align meta buffer height to 16 blocks
886 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
887
888 // Align meta buffer width to 64 blocks
889 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
890
891 // Align meta buffer size to 4K
892 size = ((meta_width * meta_height), 4096);
893 return size;
894}
895
896static unsigned int getUBwcSize(int width, int height, int format,
897 const int alignedw, const int alignedh) {
898
899 unsigned int size = 0;
900 switch (format) {
901 case HAL_PIXEL_FORMAT_RGB_565:
902 size = alignedw * alignedh * 2;
903 size += getUBwcMetaBufferSize(width, height, 2);
904 break;
905 case HAL_PIXEL_FORMAT_RGBA_8888:
906 case HAL_PIXEL_FORMAT_sRGB_A_8888:
907 size = alignedw * alignedh * 4;
908 size += getUBwcMetaBufferSize(width, height, 4);
909 break;
910 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
911 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
912 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
913 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
914 break;
915 default:
916 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
917 break;
918 }
919 return size;
920}