diff --git a/CORE/DXE/src/wlan_qct_dxe.c b/CORE/DXE/src/wlan_qct_dxe.c
index d4d2696..1bcfaf5 100644
--- a/CORE/DXE/src/wlan_qct_dxe.c
+++ b/CORE/DXE/src/wlan_qct_dxe.c
@@ -2748,9 +2748,9 @@
    }
    else
    {
-      wpalReadRegister(WALNDEX_DMA_CSR_ADDRESS, &regValue);
-      regValue &= ~WLANDXE_RX_INTERRUPT_HANDLE_MASK;
-      wpalWriteRegister(WALNDEX_DMA_CSR_ADDRESS, regValue);
+      wpalReadRegister(WLAN_PMU_SPARE_OUT_ADDRESS, &regValue);
+      regValue &= (~WLAN_PMU_POWER_DOWN_MASK);
+      wpalWriteRegister(WLAN_PMU_SPARE_OUT_ADDRESS, regValue);
    }
 
    /* Enable system level ISR */
@@ -2897,9 +2897,9 @@
    }
    else
    {
-      wpalReadRegister(WALNDEX_DMA_CSR_ADDRESS, &regValue);
-      regValue |= WLANDXE_RX_INTERRUPT_HANDLE_MASK;
-      wpalWriteRegister(WALNDEX_DMA_CSR_ADDRESS, regValue);
+      wpalReadRegister(WLAN_PMU_SPARE_OUT_ADDRESS, &regValue);
+      regValue |= WLAN_PMU_POWER_DOWN_MASK;
+      wpalWriteRegister(WLAN_PMU_SPARE_OUT_ADDRESS, regValue);
    }
 
    /* Disable interrupt at here
diff --git a/CORE/DXE/src/wlan_qct_dxe_i.h b/CORE/DXE/src/wlan_qct_dxe_i.h
index d4753dd..dacc1e1 100644
--- a/CORE/DXE/src/wlan_qct_dxe_i.h
+++ b/CORE/DXE/src/wlan_qct_dxe_i.h
@@ -103,6 +103,9 @@
 
 #define WLANDXE_REGISTER_BASE_ADDRESS     0x202000
 
+#define WLAN_PMU_SPARE_OUT_ADDRESS        0x21c088
+#define WLAN_PMU_POWER_DOWN_MASK          0x04000000
+
 /* Common over the channels register addresses */
 #define WALNDEX_DMA_CSR_ADDRESS          (WLANDXE_REGISTER_BASE_ADDRESS + 0x00)
 #define WALNDEX_DMA_ENCH_ADDRESS         (WLANDXE_REGISTER_BASE_ADDRESS + 0x04)
@@ -171,7 +174,6 @@
 #define WLANDXE_DMA_CSR_RESERVED_OFFSET       0x10
 #define WLANDXE_DMA_CSR_RESERVED_DEFAULT      0x0
 
-#define WLANDXE_RX_INTERRUPT_HANDLE_MASK      0x80000
 
 #define WLANDXE_DMA_CSR_H2H_SYNC_EN_MASK      0x8000
 #define WLANDXE_DMA_CSR_H2H_SYNC_EN_OFFSET    0x0F